JPH0293839U - - Google Patents
Info
- Publication number
- JPH0293839U JPH0293839U JP185689U JP185689U JPH0293839U JP H0293839 U JPH0293839 U JP H0293839U JP 185689 U JP185689 U JP 185689U JP 185689 U JP185689 U JP 185689U JP H0293839 U JPH0293839 U JP H0293839U
- Authority
- JP
- Japan
- Prior art keywords
- channel
- mos transistor
- channel mos
- analog switch
- semiconductor analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electronic Switches (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
第1図は本考案の実施例を示す平面図、第2図
及び第3図は、従来技術を示す平面図、第4図a
,bは、第3図に示されたアナログスイツチの動
作を示す図である。
9……P−MOS、10……N型半導体、11
……Pウエル、12……N−MOS、13……入
力端子、14……出力端子、15,16……ゲー
ト電極。
Fig. 1 is a plan view showing an embodiment of the present invention, Figs. 2 and 3 are plan views showing the prior art, and Fig. 4 a.
, b are diagrams showing the operation of the analog switch shown in FIG. 3. 9...P-MOS, 10...N-type semiconductor, 11
... P well, 12 ... N-MOS, 13 ... input terminal, 14 ... output terminal, 15, 16 ... gate electrode.
Claims (1)
ンネルMOSトランジスタとが並列接続され、各
々が合い反するレベルの信号によつて制御される
半導体アナログスイツチにおいて、 前記PチヤンネルMOSトランジスタとNチヤ
ンネルの各々のチヤンネル幅とチヤンネル長を互
いに異ならしめると共にPチヤンネルMOSトラ
ンジスタとNチヤンネルの各々のゲート面積を等
しくすることを特徴とする半導体アナログスイツ
チ。 (2) 請求項第1項記載の半導体アナログスイツ
チにおいて、前記PチヤンネルMOSトランジス
タとNチヤンネルのオン抵抗を等しくすることを
特徴とする半導体アナログスイツチ。[Claims for Utility Model Registration] (1) In a semiconductor analog switch in which a P-channel MOS transistor and an N-channel MOS transistor are connected in parallel and each is controlled by signals of opposing levels, the P-channel MOS transistor and A semiconductor analog switch characterized in that the channel width and channel length of each of the N channels are made different from each other, and the gate area of each of the P channel MOS transistor and the N channel is made equal. (2) The semiconductor analog switch according to claim 1, wherein the on-resistance of the P-channel MOS transistor and the N-channel are made equal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989001856U JP2568101Y2 (en) | 1989-01-11 | 1989-01-11 | Semiconductor analog switch |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989001856U JP2568101Y2 (en) | 1989-01-11 | 1989-01-11 | Semiconductor analog switch |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0293839U true JPH0293839U (en) | 1990-07-25 |
JP2568101Y2 JP2568101Y2 (en) | 1998-04-08 |
Family
ID=31202109
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989001856U Expired - Lifetime JP2568101Y2 (en) | 1989-01-11 | 1989-01-11 | Semiconductor analog switch |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2568101Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002535866A (en) * | 1999-01-12 | 2002-10-22 | クゥアルコム・インコーポレイテッド | Linear sampling switch |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59117318A (en) * | 1982-12-24 | 1984-07-06 | Hitachi Ltd | Semiconductor switching circuit |
JPH0228141U (en) * | 1988-08-11 | 1990-02-23 |
-
1989
- 1989-01-11 JP JP1989001856U patent/JP2568101Y2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59117318A (en) * | 1982-12-24 | 1984-07-06 | Hitachi Ltd | Semiconductor switching circuit |
JPH0228141U (en) * | 1988-08-11 | 1990-02-23 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002535866A (en) * | 1999-01-12 | 2002-10-22 | クゥアルコム・インコーポレイテッド | Linear sampling switch |
Also Published As
Publication number | Publication date |
---|---|
JP2568101Y2 (en) | 1998-04-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |