JPH0258777B2 - - Google Patents

Info

Publication number
JPH0258777B2
JPH0258777B2 JP11277982A JP11277982A JPH0258777B2 JP H0258777 B2 JPH0258777 B2 JP H0258777B2 JP 11277982 A JP11277982 A JP 11277982A JP 11277982 A JP11277982 A JP 11277982A JP H0258777 B2 JPH0258777 B2 JP H0258777B2
Authority
JP
Japan
Prior art keywords
pattern
wafer
patterns
inspection
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP11277982A
Other languages
English (en)
Japanese (ja)
Other versions
JPS594019A (ja
Inventor
Eiji Nishikata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57112779A priority Critical patent/JPS594019A/ja
Publication of JPS594019A publication Critical patent/JPS594019A/ja
Publication of JPH0258777B2 publication Critical patent/JPH0258777B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
JP57112779A 1982-06-30 1982-06-30 パタ−ン比較検査方法 Granted JPS594019A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57112779A JPS594019A (ja) 1982-06-30 1982-06-30 パタ−ン比較検査方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57112779A JPS594019A (ja) 1982-06-30 1982-06-30 パタ−ン比較検査方法

Publications (2)

Publication Number Publication Date
JPS594019A JPS594019A (ja) 1984-01-10
JPH0258777B2 true JPH0258777B2 (ko) 1990-12-10

Family

ID=14595279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57112779A Granted JPS594019A (ja) 1982-06-30 1982-06-30 パタ−ン比較検査方法

Country Status (1)

Country Link
JP (1) JPS594019A (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0172558B1 (ko) * 1995-03-22 1999-03-20 김주용 노광 마스크의 제조방법
DE10142316A1 (de) 2001-08-30 2003-04-17 Advanced Micro Devices Inc Halbleiterstruktur und Verfahren zur Bestimmung kritischer Dimensionen und Überlagerungsfehler
DE10224164B4 (de) 2002-05-31 2007-05-10 Advanced Micro Devices, Inc., Sunnyvale Eine zweidimensionale Struktur zum Bestimmen einer Überlagerungsgenauigkeit mittels Streuungsmessung
CN1501174A (zh) 2002-10-28 2004-06-02 Asml 检测掩模缺陷的方法，计算机程序和基准衬底

Also Published As

Publication number Publication date
JPS594019A (ja) 1984-01-10

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