JPH0254249U - - Google Patents

Info

Publication number
JPH0254249U
JPH0254249U JP13376588U JP13376588U JPH0254249U JP H0254249 U JPH0254249 U JP H0254249U JP 13376588 U JP13376588 U JP 13376588U JP 13376588 U JP13376588 U JP 13376588U JP H0254249 U JPH0254249 U JP H0254249U
Authority
JP
Japan
Prior art keywords
semiconductor element
accommodating
outer dimension
placing part
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13376588U
Other languages
Japanese (ja)
Other versions
JPH0650991Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13376588U priority Critical patent/JPH0650991Y2/en
Publication of JPH0254249U publication Critical patent/JPH0254249U/ja
Application granted granted Critical
Publication of JPH0650991Y2 publication Critical patent/JPH0650991Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の半導体素子収納用パツケージ
の一実施例を示す平面図、第2図は第1図のパツ
ケージの側面図、第3図は従来の半導体素子収納
用パツケージの平面図、第4図は第3図に示すパ
ツケージの側面図である。 1:絶縁基体、2:絶縁枠体、4:外部リード
端子、5:ガラス。
FIG. 1 is a plan view showing an embodiment of a package for storing semiconductor devices according to the present invention, FIG. 2 is a side view of the package shown in FIG. 1, and FIG. 3 is a plan view of a conventional package for storing semiconductor devices. FIG. 4 is a side view of the package shown in FIG. 3. 1: Insulating base, 2: Insulating frame, 4: External lead terminal, 5: Glass.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子が載置される載置部を有する絶縁基
体と該載置部を囲繞し、内部に半導体素子を収容
する空所を形成するための絶縁枠体とを、その間
に外部リード端子を挟んでガラス付けして成る半
導体素子収納用パツケージにおいて、前記絶縁基
体の外形寸法を絶縁枠体の外形寸法より小さくし
たことを特徴とする半導体素子収納用パツケージ
An insulating base body having a placing part on which a semiconductor element is placed, and an insulating frame body surrounding the placing part and forming a cavity for accommodating the semiconductor element therein, with external lead terminals sandwiched therebetween. 1. A package for accommodating a semiconductor element formed by attaching glass to the semiconductor element, characterized in that the outer dimension of the insulating base is smaller than the outer dimension of the insulating frame.
JP13376588U 1988-10-13 1988-10-13 Package for storing semiconductor devices Expired - Lifetime JPH0650991Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13376588U JPH0650991Y2 (en) 1988-10-13 1988-10-13 Package for storing semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13376588U JPH0650991Y2 (en) 1988-10-13 1988-10-13 Package for storing semiconductor devices

Publications (2)

Publication Number Publication Date
JPH0254249U true JPH0254249U (en) 1990-04-19
JPH0650991Y2 JPH0650991Y2 (en) 1994-12-21

Family

ID=31391929

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13376588U Expired - Lifetime JPH0650991Y2 (en) 1988-10-13 1988-10-13 Package for storing semiconductor devices

Country Status (1)

Country Link
JP (1) JPH0650991Y2 (en)

Also Published As

Publication number Publication date
JPH0650991Y2 (en) 1994-12-21

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