JPH0250559B2 - - Google Patents

Info

Publication number
JPH0250559B2
JPH0250559B2 JP58078983A JP7898383A JPH0250559B2 JP H0250559 B2 JPH0250559 B2 JP H0250559B2 JP 58078983 A JP58078983 A JP 58078983A JP 7898383 A JP7898383 A JP 7898383A JP H0250559 B2 JPH0250559 B2 JP H0250559B2
Authority
JP
Japan
Prior art keywords
decoder
clock
regular
redundant bits
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58078983A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59203299A (ja
Inventor
Kitoku Murotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58078983A priority Critical patent/JPS59203299A/ja
Priority to US06/607,050 priority patent/US4723227A/en
Priority to EP84105145A priority patent/EP0124900B1/en
Priority to DE8484105145T priority patent/DE3483593D1/de
Publication of JPS59203299A publication Critical patent/JPS59203299A/ja
Publication of JPH0250559B2 publication Critical patent/JPH0250559B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/842—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by introducing a delay in a signal path

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
JP58078983A 1983-05-06 1983-05-06 冗長ビット付メモリ Granted JPS59203299A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP58078983A JPS59203299A (ja) 1983-05-06 1983-05-06 冗長ビット付メモリ
US06/607,050 US4723227A (en) 1983-05-06 1984-05-04 Redundant type memory circuit with an improved clock generator
EP84105145A EP0124900B1 (en) 1983-05-06 1984-05-07 Reduntant type memory circuit with an improved clock generator
DE8484105145T DE3483593D1 (de) 1983-05-06 1984-05-07 Redundanztypspeicherschaltung mit verbessertem taktgeber.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58078983A JPS59203299A (ja) 1983-05-06 1983-05-06 冗長ビット付メモリ

Publications (2)

Publication Number Publication Date
JPS59203299A JPS59203299A (ja) 1984-11-17
JPH0250559B2 true JPH0250559B2 (enEXAMPLES) 1990-11-02

Family

ID=13677120

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58078983A Granted JPS59203299A (ja) 1983-05-06 1983-05-06 冗長ビット付メモリ

Country Status (4)

Country Link
US (1) US4723227A (enEXAMPLES)
EP (1) EP0124900B1 (enEXAMPLES)
JP (1) JPS59203299A (enEXAMPLES)
DE (1) DE3483593D1 (enEXAMPLES)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021065353A (ja) * 2019-10-21 2021-04-30 中島　秀夫 無電動小旋回身体移動補助機能と電動小旋回身体移動補助機能とを有し自分で自分の体を小旋回移動する天秤介護方法。

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6177946A (ja) * 1984-09-26 1986-04-21 Hitachi Ltd 半導体記憶装置
JPS62222500A (ja) * 1986-03-20 1987-09-30 Fujitsu Ltd 半導体記憶装置
JP2580128B2 (ja) * 1986-07-18 1997-02-12 日立超エル・エス・アイエンジニアリング株式会社 半導体記憶装置
JP2577724B2 (ja) * 1986-07-31 1997-02-05 三菱電機株式会社 半導体記憶装置
DE3685654D1 (de) * 1986-08-22 1992-07-16 Ibm Dekodierverfahren und -schaltungsanordnung fuer einen redundanten cmos-halbleiterspeicher.
JPS63244494A (ja) * 1987-03-31 1988-10-11 Toshiba Corp 半導体記憶装置
US5022006A (en) * 1988-04-01 1991-06-04 International Business Machines Corporation Semiconductor memory having bit lines with isolation circuits connected between redundant and normal memory cells
JPH02177087A (ja) * 1988-12-27 1990-07-10 Nec Corp リダンダンシーデコーダ
JP2659436B2 (ja) * 1989-08-25 1997-09-30 富士通株式会社 半導体記憶装置
JPH03252998A (ja) * 1990-02-28 1991-11-12 Sharp Corp 半導体記憶装置
US5177744A (en) * 1990-09-04 1993-01-05 International Business Machines Corporation Method and apparatus for error recovery in arrays
KR940002272B1 (ko) * 1991-05-24 1994-03-19 삼성전자 주식회사 리던던시 기능을 가지는 반도체 메모리 장치
JP2888034B2 (ja) * 1991-06-27 1999-05-10 日本電気株式会社 半導体メモリ装置
JP3129440B2 (ja) * 1992-04-16 2001-01-29 シーメンス アクチエンゲゼルシヤフト 冗長装置を有する集積半導体メモリ
US5557618A (en) * 1993-01-19 1996-09-17 Tektronix, Inc. Signal sampling circuit with redundancy
US5568433A (en) * 1995-06-19 1996-10-22 International Business Machines Corporation Memory array having redundant word line
KR100196515B1 (ko) * 1995-06-30 1999-06-15 김영환 반도체 메모리 장치의 리던던시 회로
GB9609834D0 (en) * 1996-05-10 1996-07-17 Memory Corp Plc Semiconductor device
US5708613A (en) * 1996-07-22 1998-01-13 International Business Machines Corporation High performance redundancy in an integrated memory system
US5968180A (en) * 1997-09-30 1999-10-19 Intel Corporation Data capture circuit for asynchronous data transfer
US6317370B2 (en) 1998-01-12 2001-11-13 Micron Technology, Inc. Timing fuse option for row repair
KR100340113B1 (ko) * 1998-06-29 2002-09-26 주식회사 하이닉스반도체 반도체메모리장치
US6134176A (en) * 1998-11-24 2000-10-17 Proebsting; Robert J. Disabling a defective element in an integrated circuit device having redundant elements
JP3398686B2 (ja) * 1999-06-14 2003-04-21 エヌイーシーマイクロシステム株式会社 半導体記憶装置
US6970045B1 (en) 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
US20090161470A1 (en) * 2007-12-20 2009-06-25 Micron Technology, Inc. Circuit for dynamic readout of fused data in image sensors

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782297A (en) * 1980-11-11 1982-05-22 Nippon Telegr & Teleph Corp <Ntt> Semiconductor storage device
US4576455A (en) * 1984-02-10 1986-03-18 Panavision, Inc. Dual motor reversible drive film magazine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021065353A (ja) * 2019-10-21 2021-04-30 中島　秀夫 無電動小旋回身体移動補助機能と電動小旋回身体移動補助機能とを有し自分で自分の体を小旋回移動する天秤介護方法。

Also Published As

Publication number Publication date
EP0124900A3 (en) 1987-08-26
JPS59203299A (ja) 1984-11-17
US4723227A (en) 1988-02-02
EP0124900B1 (en) 1990-11-14
EP0124900A2 (en) 1984-11-14
DE3483593D1 (de) 1990-12-20

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