JPH025014B2 - - Google Patents

Info

Publication number
JPH025014B2
JPH025014B2 JP60248656A JP24865685A JPH025014B2 JP H025014 B2 JPH025014 B2 JP H025014B2 JP 60248656 A JP60248656 A JP 60248656A JP 24865685 A JP24865685 A JP 24865685A JP H025014 B2 JPH025014 B2 JP H025014B2
Authority
JP
Japan
Prior art keywords
plate
plating
opening
plates
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60248656A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62216250A (ja
Inventor
Yukiharu Takeuchi
Kunyuki Hori
Shinobu Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Shindo Denshi Kogyo KK
Original Assignee
Shinko Electric Industries Co Ltd
Shindo Denshi Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd, Shindo Denshi Kogyo KK filed Critical Shinko Electric Industries Co Ltd
Priority to JP24865685A priority Critical patent/JPS62216250A/ja
Publication of JPS62216250A publication Critical patent/JPS62216250A/ja
Publication of JPH025014B2 publication Critical patent/JPH025014B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP24865685A 1985-11-06 1985-11-06 プリント基板型pgaパツケ−ジの製造方法 Granted JPS62216250A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24865685A JPS62216250A (ja) 1985-11-06 1985-11-06 プリント基板型pgaパツケ−ジの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24865685A JPS62216250A (ja) 1985-11-06 1985-11-06 プリント基板型pgaパツケ−ジの製造方法

Publications (2)

Publication Number Publication Date
JPS62216250A JPS62216250A (ja) 1987-09-22
JPH025014B2 true JPH025014B2 (fr) 1990-01-31

Family

ID=17181373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24865685A Granted JPS62216250A (ja) 1985-11-06 1985-11-06 プリント基板型pgaパツケ−ジの製造方法

Country Status (1)

Country Link
JP (1) JPS62216250A (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63255996A (ja) * 1987-04-14 1988-10-24 シチズン時計株式会社 半導体チツプ実装用多層基板
JP2520429B2 (ja) * 1987-10-27 1996-07-31 松下電工株式会社 電子部品実装用プリント配線板
US5804422A (en) * 1995-09-20 1998-09-08 Shinko Electric Industries Co., Ltd. Process for producing a semiconductor package
JPH09232465A (ja) * 1996-02-27 1997-09-05 Fuji Kiko Denshi Kk 半導体実装用プリント配線板
US6011694A (en) * 1996-08-01 2000-01-04 Fuji Machinery Mfg. & Electronics Co., Ltd. Ball grid array semiconductor package with solder ball openings in an insulative base
JPH10223800A (ja) * 1997-02-12 1998-08-21 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法
CN103227164A (zh) * 2013-03-21 2013-07-31 日月光半导体制造股份有限公司 半导体封装构造及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568855A (en) * 1979-07-04 1981-01-29 Mitsubishi Electric Corp Container for semiconductor
JPS5892248A (ja) * 1981-11-28 1983-06-01 Mitsubishi Electric Corp 大規模実装化半導体装置
JPS59201449A (ja) * 1983-03-09 1984-11-15 プリンテツド・サ−キツツ・インタ−ナシヨナル・インコ−ポレイテツド ヒ−トシンクを有する半導体チツプ担体パツケ−ジ及びその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568855A (en) * 1979-07-04 1981-01-29 Mitsubishi Electric Corp Container for semiconductor
JPS5892248A (ja) * 1981-11-28 1983-06-01 Mitsubishi Electric Corp 大規模実装化半導体装置
JPS59201449A (ja) * 1983-03-09 1984-11-15 プリンテツド・サ−キツツ・インタ−ナシヨナル・インコ−ポレイテツド ヒ−トシンクを有する半導体チツプ担体パツケ−ジ及びその製造方法

Also Published As

Publication number Publication date
JPS62216250A (ja) 1987-09-22

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term