JPH024180B2 - - Google Patents

Info

Publication number
JPH024180B2
JPH024180B2 JP58248174A JP24817483A JPH024180B2 JP H024180 B2 JPH024180 B2 JP H024180B2 JP 58248174 A JP58248174 A JP 58248174A JP 24817483 A JP24817483 A JP 24817483A JP H024180 B2 JPH024180 B2 JP H024180B2
Authority
JP
Japan
Prior art keywords
clock
frame pulse
output
frame
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58248174A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60137147A (ja
Inventor
Shigeki Shimazaki
Hisao Yagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58248174A priority Critical patent/JPS60137147A/ja
Publication of JPS60137147A publication Critical patent/JPS60137147A/ja
Publication of JPH024180B2 publication Critical patent/JPH024180B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58248174A 1983-12-26 1983-12-26 クロツク切替方式 Granted JPS60137147A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58248174A JPS60137147A (ja) 1983-12-26 1983-12-26 クロツク切替方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58248174A JPS60137147A (ja) 1983-12-26 1983-12-26 クロツク切替方式

Publications (2)

Publication Number Publication Date
JPS60137147A JPS60137147A (ja) 1985-07-20
JPH024180B2 true JPH024180B2 (enrdf_load_stackoverflow) 1990-01-26

Family

ID=17174308

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58248174A Granted JPS60137147A (ja) 1983-12-26 1983-12-26 クロツク切替方式

Country Status (1)

Country Link
JP (1) JPS60137147A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164841A (ja) 2000-11-29 2002-06-07 Nec Corp 携帯電話の制御装置及び制御方法

Also Published As

Publication number Publication date
JPS60137147A (ja) 1985-07-20

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term