JPH024172B2 - - Google Patents

Info

Publication number
JPH024172B2
JPH024172B2 JP55010870A JP1087080A JPH024172B2 JP H024172 B2 JPH024172 B2 JP H024172B2 JP 55010870 A JP55010870 A JP 55010870A JP 1087080 A JP1087080 A JP 1087080A JP H024172 B2 JPH024172 B2 JP H024172B2
Authority
JP
Japan
Prior art keywords
clock
gate
circuit
local clock
bistable trigger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55010870A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55105718A (en
Inventor
Boodoo Jannpieeru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telecommunications Radioelectriques et Telephoniques SA TRT
Original Assignee
Telecommunications Radioelectriques et Telephoniques SA TRT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telecommunications Radioelectriques et Telephoniques SA TRT filed Critical Telecommunications Radioelectriques et Telephoniques SA TRT
Publication of JPS55105718A publication Critical patent/JPS55105718A/ja
Publication of JPH024172B2 publication Critical patent/JPH024172B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP1087080A 1979-02-05 1980-02-02 High speed resynchronization circuit Granted JPS55105718A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7902902A FR2448257A1 (fr) 1979-02-05 1979-02-05 Dispositif de resynchronisation rapide d'une horloge

Publications (2)

Publication Number Publication Date
JPS55105718A JPS55105718A (en) 1980-08-13
JPH024172B2 true JPH024172B2 (US06826419-20041130-M00005.png) 1990-01-26

Family

ID=9221609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1087080A Granted JPS55105718A (en) 1979-02-05 1980-02-02 High speed resynchronization circuit

Country Status (6)

Country Link
US (1) US4309662A (US06826419-20041130-M00005.png)
EP (1) EP0015014B1 (US06826419-20041130-M00005.png)
JP (1) JPS55105718A (US06826419-20041130-M00005.png)
CA (1) CA1137567A (US06826419-20041130-M00005.png)
DE (1) DE3062653D1 (US06826419-20041130-M00005.png)
FR (1) FR2448257A1 (US06826419-20041130-M00005.png)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56160157A (en) * 1980-04-22 1981-12-09 Sony Corp Bit clock reproducing circuit
USRE36803E (en) * 1980-04-22 2000-08-01 Sony Corporation Bit clock reproducing circuit
US4380742A (en) * 1980-08-04 1983-04-19 Texas Instruments Incorporated Frequency/phase locked loop circuit using digitally controlled oscillator
DE3173313D1 (en) * 1980-09-25 1986-02-06 Toshiba Kk Clock synchronization signal generating circuit
US4740998A (en) * 1981-03-30 1988-04-26 Data General Corporation Clock recovery circuit and method
US4389643A (en) * 1981-10-05 1983-06-21 Edison Control Corporation Multiplexed pulse tone signal receiving apparatus
US4408165A (en) * 1981-11-16 1983-10-04 International Standard Electric Corporation Digital phase detector
EP0082901B1 (fr) * 1981-12-29 1985-03-27 International Business Machines Corporation Dispositif de synchronisation d'horloge et de données dans un système de transmission
GB2132042B (en) * 1982-12-15 1986-09-24 British Broadcasting Corp Frequency and timing sources
US4611229A (en) * 1983-06-17 1986-09-09 Zenith Electronics Corporation Auto range horizontal automatic phase control
US4560950A (en) * 1983-09-29 1985-12-24 Tektronix, Inc. Method and circuit for phase lock loop initialization
NL8303561A (nl) * 1983-10-17 1985-05-17 Philips Nv Geregelde oscillatorschakeling.
US4600845A (en) * 1983-12-30 1986-07-15 The Charles Stark Draper Laboratory, Inc. Fault-tolerant clock system
JPS60154709A (ja) * 1984-01-25 1985-08-14 Toshiba Corp クロツク信号発生回路
US4636746A (en) * 1985-08-26 1987-01-13 Stifter Francis J Frequency lock system
IT1200896B (it) * 1985-12-18 1989-01-27 Sgs Microelettronica Spa Circuito di risincronizzazione di segnali impulsivi,particolarmente per periferiche di microprocessori
DE3831903A1 (de) * 1988-09-20 1990-03-29 Standard Elektrik Lorenz Ag Multiplexer/demultiplexer fuer ein datenuebertragungssystem
DE4138543A1 (de) * 1991-11-23 1993-05-27 Philips Patentverwaltung Digitaler phasenregelkreis
FR2704373B1 (fr) * 1993-04-20 1995-06-30 Bouvier Jacky Procede pour favoriser l'activation d'une boucle a verrouillage de phase et boucle correspondante.
DE102008051222B4 (de) * 2008-10-14 2017-05-11 Atmel Corp. Schaltung eines Funksystems, Verwendung und Verfahren zum Betrieb

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL248231A (US06826419-20041130-M00005.png) * 1959-02-18
US2980858A (en) * 1959-12-07 1961-04-18 Collins Radio Co Digital synchronization circuit operating by inserting extra pulses into or delayingpulses from clock pulse train
US3370252A (en) * 1966-07-11 1968-02-20 Avco Corp Digital automatic frequency control system
US3696422A (en) * 1970-02-27 1972-10-03 King Radio Corp Navigation receiver/communications transceiver and frequency synthesizer associated therewith
NL7111888A (US06826419-20041130-M00005.png) * 1971-08-28 1973-03-02
FR2194075B1 (US06826419-20041130-M00005.png) * 1972-07-27 1976-08-13 Materiel Telephonique
US3931585A (en) * 1974-06-17 1976-01-06 Navidyne Corporation Phase comparison systems employing improved phaselock loop apparatus
US3921095A (en) * 1974-11-14 1975-11-18 Hewlett Packard Co Startable phase-locked loop oscillator
US3956710A (en) * 1974-11-20 1976-05-11 Motorola, Inc. Phase locked loop lock detector and method
US3983498A (en) * 1975-11-13 1976-09-28 Motorola, Inc. Digital phase lock loop
US4005479A (en) * 1976-01-16 1977-01-25 Control Data Corporation Phase locked circuits
GB1580060A (en) * 1976-09-01 1980-11-26 Racal Res Ltd Electrical circuit arrangements
DE2748075C3 (de) * 1977-10-26 1980-08-07 Siemens Ag, 1000 Berlin Und 8000 Muenchen Phasenregelkreis

Also Published As

Publication number Publication date
CA1137567A (en) 1982-12-14
FR2448257B1 (US06826419-20041130-M00005.png) 1983-12-16
EP0015014A1 (fr) 1980-09-03
FR2448257A1 (fr) 1980-08-29
US4309662A (en) 1982-01-05
EP0015014B1 (fr) 1983-04-13
JPS55105718A (en) 1980-08-13
DE3062653D1 (en) 1983-05-19

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