JPH0237093B2 - - Google Patents
Info
- Publication number
- JPH0237093B2 JPH0237093B2 JP56009085A JP908581A JPH0237093B2 JP H0237093 B2 JPH0237093 B2 JP H0237093B2 JP 56009085 A JP56009085 A JP 56009085A JP 908581 A JP908581 A JP 908581A JP H0237093 B2 JPH0237093 B2 JP H0237093B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- film
- gate electrode
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
- H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
- H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
Landscapes
- Electrodes Of Semiconductors (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56009085A JPS57124476A (en) | 1981-01-26 | 1981-01-26 | Manufacture of semiconductor device |
| US06/645,536 US4622735A (en) | 1980-12-12 | 1984-08-29 | Method for manufacturing a semiconductor device utilizing self-aligned silicide regions |
| US06/832,647 US4830971A (en) | 1980-12-12 | 1986-02-25 | Method for manufacturing a semiconductor device utilizing self-aligned contact regions |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56009085A JPS57124476A (en) | 1981-01-26 | 1981-01-26 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57124476A JPS57124476A (en) | 1982-08-03 |
| JPH0237093B2 true JPH0237093B2 (enExample) | 1990-08-22 |
Family
ID=11710773
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56009085A Granted JPS57124476A (en) | 1980-12-12 | 1981-01-26 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57124476A (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58161372A (ja) * | 1982-02-10 | 1983-09-24 | Nec Corp | Mos集積回路の製造方法 |
| JPS5999774A (ja) * | 1982-11-29 | 1984-06-08 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH0644572B2 (ja) * | 1983-03-23 | 1994-06-08 | 株式会社東芝 | 半導体装置の製造方法 |
| US4503601A (en) * | 1983-04-18 | 1985-03-12 | Ncr Corporation | Oxide trench structure for polysilicon gates and interconnects |
| JPS6037770A (ja) * | 1983-08-10 | 1985-02-27 | Seiko Epson Corp | 半導体装置 |
| JPS61129873A (ja) * | 1984-11-28 | 1986-06-17 | Seiko Epson Corp | 半導体製造装置 |
| CA1235824A (en) * | 1985-06-28 | 1988-04-26 | Vu Q. Ho | Vlsi mosfet circuits using refractory metal and/or refractory metal silicide |
| JPS62162362A (ja) * | 1986-01-10 | 1987-07-18 | Mitsubishi Electric Corp | Mos型集積回路及びその製造方法 |
| JPS641283A (en) * | 1987-06-23 | 1989-01-05 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
| JPH01298768A (ja) * | 1988-05-27 | 1989-12-01 | Sony Corp | Misトランジスタの製造方法 |
-
1981
- 1981-01-26 JP JP56009085A patent/JPS57124476A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57124476A (en) | 1982-08-03 |
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