JPH02234131A - Production of liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent a signal line which is formed on the outside of an insulating film used as a gate insulating film from being disconnected by forming a peripheral protective film consisting of the same film as the insulating film on the outside of the insulating film at the time of forming the insulating film used as the gate insulating film. CONSTITUTION:Since the peripheral protective film CCI consisting of the same film as the insulating film GI is formed on the outside of the insulating film GI at the time of forming the insulating film GI, water is prevented from entering between the surface of a lower transparent glass substrate SUB 1 and the protective film PSV 1 with the aid of the peripheral protective film CCI. Therefore, conductive film g11 and d1 constituting a scanning signal line and a video signal line formed on the outside of the insulating film GI are not ionized even if spaces between the scanning signal line and between the video signal lines formed on the outside of the insulating film GI are small and the potential differences between adjacent scanning signal lines and between adjacent video signal lines are large. Thus, the scanning signal line and the video signal line formed on the outside of the insulating film GI are prevented from being disconnected.

Description

[Detailed description of the invention]

[Industrial Field of Application] The present invention relates to a method for manufacturing a liquid crystal display device such as an active matrix color liquid crystal display device in which a thin film transistor and a pixel electrode are used as constituent elements of a pixel. [Prior Art] In a conventional method for manufacturing an active matrix type liquid crystal display device, first, as shown in FIG. 24(.), scanning signal lines and gate electrodes are formed on a lower transparent glass substrate SUBI. Afterwards, a silicon nitride film GIL is provided. Next, as shown in FIG. 24(b), the silicon nitride film GIL is selectively etched to form a #@edge film GI used as a gate insulating film.・
Next, as shown in FIG. 24(c), after forming the video signal line, source electrode, drain electrode, and pixel electrode,
A protective film PSVI is formed by providing a silicon nitride film and selectively etching the silicon nitride film. An active matrix type liquid crystal display device using thin film transistors is known, for example, from Nikkei Electronics, page 211, September 10, 1984, published by Nikkei McGraw-Hill. [Problems to be Solved by the Invention] However, in this method of manufacturing a liquid crystal display device, when forming the insulating film GI, the surface of the lower transparent glass substrate SUBI is contaminated in the portion where the silicon nitride film GIL has been removed. As a result, moisture may enter between the surface of the lower transparent glass substrate SUBI and the protective film PSVI, and the insulating film GI
The interval between the scanning signal lines and video signal lines formed on the outside of the frame is approximately 40 mm. Therefore, when the potential difference between adjacent scanning signal lines and video signal lines is large, the conductive films forming the scanning signal lines and video signal lines formed outside the insulating film GI are ionized, and the insulating film GI The scanning signal lines and video signal lines formed outside the insulating film GI may corrode, and the scanning signal lines and video signal lines formed outside the insulating film GI may become disconnected. This invention has been made to solve the above-mentioned problems, and provides a method for manufacturing a liquid crystal display device in which the signal line formed on the outside of the insulating film used as the gate #@edge film is not disconnected. The purpose is to [Means for Solving the Problem] In order to achieve this object, the present invention provides a method for manufacturing an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel. When forming an insulating film used as an insulating film, a surrounding protective film made of the same film as the insulating film is formed on the outside of the insulating film. [Function] In this method for manufacturing a liquid crystal display device, when forming an insulating film used as a gate insulating film, a surrounding protective film made of the same film as the insulating film is formed on the outside of the insulating film, so that the surrounding Since the protective film can prevent moisture from entering between the substrate surface and the protective film, the distance between the signal lines formed outside the insulating film used as the gate insulating film is small, and adjacent signals can be Even if the potential difference between the lines is large, the conductive film forming the signal line formed outside the insulating film used as the gate insulating film will not be ionized. [Example] One pixel of a liquid crystal display section of an active matrix color liquid crystal display device to which this invention is applied is shown in FIG.
FIG. 3 shows a cross section taken along the section line ``--'' in FIG. 2. Also, in Figure 4 (plan view of main parts),
2 shows a main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2 are arranged. As shown in FIGS. 2 to 4, the liquid crystal display device includes pixels having thin film transistors TPT and transparent electrodes ITO on the inner surface (liquid crystal side) of a lower transparent glass substrate SUBI. Lower transparent glass substrate SUBI
For example, the thickness is about 1.1 mm. Each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) OL and two adjacent video signal lines (
(drain signal line or vertical signal line) DL (in the area surrounded by the four signal lines). As shown in FIGS. 2 and 4, the scanning signal lines GL extend in the column direction, and a plurality of scanning signal lines GL are arranged in the row direction. The video signals 11DL extend in the row direction, and a plurality of video signals 11DL are arranged in the column direction. The thin film transistor TPT of each pixel has three
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI, TPT2, and TPT3. Each of the thin film transistors TPTI to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPT1 to TFT3 mainly has a gate electrode G.
T, insulating film GI, i-type (intrinsic, not doped with conductivity type determining impurities) silicon (Si
), a pair of source electrodes SDI
and a drain electrode SD2. Note that the source and drain are originally determined by the bias polarity between them, and in this liquid crystal display circuit, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following explanation as well, for convenience, one side will be fixedly expressed as a source and the other as a drain. As shown in detail in FIG. 5 (a plan view of the main part in a predetermined manufacturing process), the gate electrode GT has a T-shape that protrudes from the scanning signal line OL in the row direction (downward in FIGS. 2 and 5). It is composed of shapes (branched into a T-shape). In other words, the gate electrode GT is connected to the video signal line DL.
It is constructed so that it extends substantially parallel to the The gate electrode GT is configured to protrude to the formation region of each of the thin film transistors TPT1 to TFT3. The gate electrodes GT of each of the thin film transistors TPTI to TFT3 are integrally formed (as a common gate electrode) and are continuously formed on the same scanning signal line GL. The gate electrode GT is formed of a single-layer first conductive film g1 so as to avoid creating a large step as much as possible in the formation region of the thin film transistor TPT. The first conductive film g1 is formed using, for example, a chromium (Cr) film formed by sputtering, and has a film thickness of about 100%. As shown in FIGS. 2, 3, and 6, the gate electrode GT is formed to be thicker than the i-type semiconductor layer AS (as viewed from below) so as to completely cover the i-type semiconductor layer AS. Therefore, when a backlight such as a fluorescent lamp is attached below the lower transparent glass substrate SUBI, the gate electrode GT made of opaque chromium forms a shadow, and the backlight light does not hit the i-type semiconductor layer AS. First, the aforementioned conduction phenomenon due to light irradiation, that is, the deterioration of the off-characteristics of the thin film 1-transistor TFT, is less likely to occur. Note that the original size of the gate electrode GT is the same as that of the source/drain electrode SDi. Channel #! The depth that determines w is determined by the ratio of the distance (channel length) L between the source and drain electrodes, that is, the factor W/L that determines the mutual conductance gm. The size of the gate electrode in this liquid crystal display device is of course larger than the original size mentioned above. Considering only the function of the gate and light shielding of the gate electrode GT, the gate electrode GT and its wiring GL may be integrally formed in a single layer. In this case, aluminum containing silicon is used as an opaque conductive material. AI). Pure aluminum, aluminum containing palladium (Pd), silicon, aluminum containing titanium (Ti), silicon, aluminum containing i (Cu), etc. can be selected. The scanning signal line GL is composed of a composite film including a first conductive film g1 and a second conductive film g2 provided on the first conductive film g1. The first conductive film g1 of the scanning signal line GL is formed in the same manufacturing process as the first conductive film g1 of the gate electrode GT, and is configured integrally. The second conductive film g2 is made of, for example, an aluminum film formed by sputtering.
It is formed with a film thickness of about 00 to 4000 [people]. The second conductive film g2 is configured to reduce the resistance value of the scanning signal line GL and increase the signal transmission speed (writing characteristics of pixel information). Further, the scanning signal line GL is connected to the ".". The width of the second conductive film g2 is made smaller than the width of the conductive film g1.
That is, since the scanning signal line GL can have a gentle stepped shape on its side wall, the upper layer 4! Membrane G
It is constructed so that the surface of I can be flattened. The insulating film Gl is used as a gate insulating film for each of the thin film transistors TPTI to TFT3. The insulating film G is formed above the gate electrode GT and the scanning signal IGL. The insulating film GI is formed using, for example, a silicon nitride film formed by plasma CVD, and has a thickness of about 3,500 [layers]. As mentioned above, the surface of the insulating film GI is
The regions where the thin film transistors TPTI to TFT3 are formed and the regions where the scanning signals and IIXGL are formed are flattened. As shown in detail in FIG. 6 (a plan view of main parts in a predetermined manufacturing process), the i-type semiconductor layer AS is divided into a plurality of layers, which are used as channel forming regions for each of the thin film transistors TPTI to TFT3, which are divided into a plurality of parts. The J-type semiconductor RAS of each of the divided thin film transistors TPTI to TFT3 is integrally configured within the pixel. In other words, a plurality of thin film transistors TPT into which a pixel is divided
Each of TFTs 1 to 3 is composed of one (common) island region of i-type semiconductor NAs. i-type semiconductor layer AS
is formed of a non-quality silicon film or a polycrystalline silicon film, and is formed to a film thickness of approximately 2000 [cm thick]. This i-type semiconductor layer AS is made of Si by changing the components of the supplied gas.
, N4, in the same plasma CVD apparatus, without being exposed to the outside from the apparatus. Further, a P-doped N0 type semiconductor layer do (FIG. 3) for ohmic contact is also continuously formed to a thickness of about 300 cλ. After that, the lower transparent glass substrate SUBI is taken out from the CVD apparatus, and an N'' type semiconductor layer dO is formed using photo processing technology.
and i-type semiconductor layer AS in FIG. 2, 31i! And, as shown in FIG. 6, it is patterned into independent islands. In this way, by integrally configuring the i-type semiconductor layer AS of each of the thin film transistors TPTI to TFT3 divided into a plurality of pixels, the thin film transistors TPTI to
The drain electrode SD2 common to each of the TFTs 3 is connected to the i-type semiconductor layer AS (actually, the thickness of the first conductive film g1, N+
The step corresponding to the sum of the film thickness of the type semiconductor layer dO and the film thickness of the i-type semiconductor layer AS) is the drain electrode SD2.
Since it only crosses over once from the side toward the i-type semiconductor layer AS side, the probability that the drain electrode SD2 is disconnected is low, and the probability that a point defect occurs can be reduced. That is, in this liquid crystal display device, the point defects that occur within the pixel when the drain electrode SD2 crosses the step of the i-type semiconductor layer AS can be reduced to one-third. Although the layout of this liquid crystal display device is different, when the video signal line DL directly crosses over the i-type semiconductor layer AS and the video signal line DL in this overpassed portion is configured as the drain electrode SD2, the video signal line DL (drain Electrode SD
2) It is possible to reduce the probability of line defects occurring due to disconnection when the wire crosses the i-type semiconductor layer As. In other words, the thin film transistor TPTI divided into a plurality of pixels
~By integrally configuring each i-type semiconductor layer As of TFT3, the video signal @DL (drain electrode SD2
) crosses the i-type semiconductor layer As only once (actually twice, at the beginning and end of the ride). As shown in detail in FIGS. 2 and 6, the i-type semiconductor layer AS is provided so as to extend to a point where the scanning signal line GL and the video signal line DL intersect (crossover section). ing. This extended i-type semiconductor layer AS is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. Thin film transistors TpT1 to Tp divided into a plurality of pixels
Each source electrode SD1 and drain electrode S of FT3
As shown in detail in FIG. 2, FIG. 3, and FIG. 7 (plan views of main parts in predetermined manufacturing steps), D2 is provided on the i-type semiconductor layer As at a distance from each other. Source electrode SDI. Each of the drain electrodes SD2 is configured such that its source and drain operationally switch when the bias polarity of the circuit changes; that is, the thin film transistor TPT is bidirectional like a FET. Each of the source electrode SDI and drain electrode SD2 is
A first conductive film d1, a second conductive film d2, and a third conductive film d3 are sequentially stacked one on top of the other from the lower layer side in contact with the N4'' type semiconductor layer dO.The first conductive film d1 of the source electrode SDI, The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as each of the drain electrodes SD2.The first conductive film d1 uses a chromium film formed by sputtering, and The thickness of the chromium film (in this liquid crystal display device, the film thickness is about 600 [man]) is formed.As the chromium film is formed thicker, the stress increases, so the film thickness should not exceed 2000 [man]. The chromium film has good contact with the N+ type semiconductor layer dO.The chromium film is a so-called barrier that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N+ type semiconductor layer do. The first conductive film d1 that constitutes the layer is as follows:
In addition to chromium film, high melting point metals (Mo, Ti.Ta, W)
film, high melting point metal silicide (MoSi2, TiS
i2, TaSi, WSi2) film. After patterning the first conductive film d1 by photo processing, the N+ type semiconductor layer dO is removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the i-type semiconductor layer A. The portions of the N+ type semiconductor layer do remaining on S except for the first conductive film d1 are removed by self-alignment. , 2, the N+ type semiconductor layer do is etched to remove its entire thickness, so the i type semiconductor layer AS is also slightly etched at its surface, but the extent can be controlled by the etching time. good. Thereafter, the second conductive film d2 is formed by aluminum sputtering to a thickness of 3,000 to 5,500 mm (in this liquid crystal display device, a film thickness of approximately 3,500 mm). Aluminum film has less stress than chromium film and can be formed to a thick film thickness, making it suitable for source electrode S.
It is configured to reduce the resistance values of DI, drain electrode SD2, and video signal line DL. The second conductive film d2 is configured to increase the operating speed of the thin film transistor TPT and the signal transmission speed of the video signal iDL. In other words, the second conductive film d2 is
Writing characteristics of pixels can be improved. Second conductive 11
In addition to the aluminum film, 1d2 may be formed of an aluminum film containing silicon, palladium, titanium, copper, or the like as an additive. After patterning the second conductive film d2 using photo processing technology,
The third conductive film d3 is a transparent conductive film (I
TO: Nesa film) is used to form a film with a thickness of 300 to 2400 [in] (in this liquid crystal display device, a film thickness of about 1200 [in]). This third conductive film d3 is connected to the source electrode S
It constitutes the DI, drain electrode SD2, and video signal line DL, and also constitutes the transparent pixel electrode ITO. First conductive film d1 of source electrode SDI, drain electrode SD
Each of the two first conductive films d1 has an upper second conductive film d1.
The channel forming region side is configured to have a larger size than the second and third conductive films d3. That is, the first conductive film d1
Even if mask misalignment occurs in the manufacturing process between the first conductive film d1, the second conductive film d2, and the third conductive film d3, the size is larger than that of the second conductive film d2 and the third conductive film d3. (The channel forming region side of each of the first to third conductive films d1 to d3 may be on-the-line). The first conductive film d1 of the source electrode SDI and the first conductive film d1 of the drain electrode SD2 are each configured to define the gate 1 to the length L of the thin film transistor TPT. In this way, in the thin film transistors T F "r 1 to TFT3 divided into a plurality of pixels, the source electrode S
D.I. ．． By configuring the channel forming region side of each of the first conductive films d1 of the drain electrode SD2 to have a larger size than the second conductive film d2 and the third conductive film d3, 1 conductive film d1, thin film transistor TPT
The gate length L can be specified. First conductive film dl
Since the separation dimension (gate length L) between them can be defined by processing accuracy (patterning accuracy), the gate lengths L of each of the thin film transistors TFTI to TFT3 can be made uniform. As described above, the source electrode SDI is connected to the transparent pixel electrode IT.
Connected to O. The source electrode SDI has a step shape in the i-type semiconductor layer AS (a step corresponding to the sum of the thickness of the first conductive film g1, the thickness of the N+ type semiconductor layer do, and the thickness of the i-type semiconductor layer AS). ). Specifically, the source electrode SDi includes a first conductive film d1 formed along the step shape of the i-type semiconductor layer AS, and a first conductive film d1 formed along the step shape of the i-type semiconductor layer AS.
A second conductive film d2 is formed on the conductive film d1 in a smaller size than that on the side connected to the transparent pixel electrode To.
and a third conductive film d3 connected to the first conductive film d1 exposed from the second conductive film d2. The first conductive film d1 of the source electrode SDI has good adhesion to the N+ type semiconductor layer do, and is mainly configured as a barrier layer against diffused substances from the second conductive film d2. The second conductive film d2 of the source electrode SDI cannot be formed thickly because the chromium film of the first conductive film d1 increases stress and cannot overcome the stepped shape of the i-type semiconductor layer As. It is designed to overcome. In other words, the second conductive film d2 improves the stepping force barrier by forming it thickly. Since the second conductive film d2 can be formed thickly, the resistance value of the source electrode SDI (drain electrode S
The same applies to D2 and video signal line DL). The third conductive film d3 is i of the second conductive film d2.
Since the step shape caused by the semiconductor layer AS cannot be overcome, the second conductive film d2 is configured to be connected to the exposed first conductive film d1 by reducing the size of the second conductive film d2. The first conductive film d1 and the third conductive film d3 not only have good adhesion but also have a small step shape at the connection between them, so that they can be reliably connected. In this way, the source electrode SD of the thin film transistor TPT
I, a first conductive film d1 as a barrier layer formed at least along the i-type semiconductor layer As, and this first conductive film d
A second conductive film d2 is formed on top of the first conductive film d2 and has a smaller specific resistance value than the first conductive film d1 and a smaller size than the first conductive film d1. A third transparent pixel electrode made of ITO is formed on the exposed first conductive film d1.
By connecting the conductive film d3, the thin film transistor T
Since the PT and the transparent pixel electrode ITO can be reliably connected, point defects caused by disconnections can be reduced. Furthermore, the second conductive film d2 (aluminum film) having a low resistance value can be used for the source electrode SDI due to the barrier effect of the first conductive film d1, so that the resistance value can be reduced. The drain electrode SD2 is configured integrally with the video signal line DL, and is formed in the same manufacturing process. The drain electrode SD2 has an L-shape that protrudes in the column direction intersecting the video signal line DL. That is, the respective drain electrodes SD2 of the thin film transistors TPTI to TFT3 divided into a plurality of pixels are connected to the same video signal line DL. The transparent pixel electrode ITO is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITO is divided into three transparent pixel electrodes (divided transparent pixel electrodes) ITOI, ITO2, and ITO3 corresponding to each of the plurality of divided thin film transistors TPTI to TFT3 of the pixel. Transparent pixel electrode IT
O1 is the source electrode SDI of the thin film transistor TPT1
It is connected to the. The transparent pixel electrode ITO2 is connected to the source electrode SDI of the thin film transistor TFT2. The transparent pixel electrode ITO3 is a thin film transistor TFT3.
is connected to the source electrode SDI of . transparent pixel electrode r
Each of TO1-ITO3 is a thin film transistor TP
Like each of TI to TFT3, they are configured with substantially the same size. Transparent pixel electrode ITOI~ITO3
Since each of the 4-type semiconductor layers AS of the thin film transistors TPT1 to TFT3 is integrally formed (the divided thin film transistors TPT are arranged in a concentrated manner), each of the thin film transistors TPT1 to TFT3 is formed in an L-shape. are doing. In this way, the thin film transistor TPT of the pixel arranged in the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL is
By dividing the pixel into PT1 to TFT3 and connecting each of the divided transparent pixel electrodes ITOI to ITO3 to each of the divided thin film transistors TPTI to TFT3, a divided part of the pixel (for example, thin film transistor TFT1) is formed. becomes only a point defect,
Since the pixel as a whole is no longer a point defect (the thin film transistors TFT2 and TFT3 are not point defects), it is possible to reduce point defects in the pixel as a whole. Further, some of the point defects into which the pixel is divided are smaller than the entire area of the pixel (in the case of this liquid crystal display device, the area is one-third of the pixel). can be made difficult to see. Further, by configuring each of the divided transparent pixel electrodes ITo1 to ITO3 of the pixel to have substantially the same size, the area of point defects within the pixel can be made uniform. In addition, the divided transparent pixel electrode IT○], ~
By configuring each of the IT○3 to have substantially the same size, each liquid crystal capacitor (Cpix) constituted by each of the transparent pixel electrodes ITOI to ITO3 and the common transparent pixel electrode ITO, and this transparent pixel electrode IT ○1～
Transparent pixel electrode ITOI added to each ITO3
~The superposition capacitance (Cgs) caused by superposition of ITO3 and gate electrode GT can be made uniform. In other words, since each of the transparent pixel electrodes ITOI to IT○3 can have a uniform liquid crystal capacitance and superimposed capacitance, the DC component that is applied to the liquid crystal molecules of the liquid crystal LC due to this superposed capacitance can be made uniform. If this method of canceling the DC component is adopted, the variation in the DC component applied to the liquid crystal of each pixel can be reduced. Thin film transistor TPT and transparent pixel electrode ITo
A protective film PSVI is provided thereon. The protective film PSVI is formed mainly to protect the thin film transistor TPT from moisture, etc., and a film with high transparency and good moisture resistance is used. The protective film PSVI is
For example, it is made of silicon oxide film or silicon nitride film formed by plasma CVD, and
Film thickness of [on] (in this liquid crystal display device, aoooc person)
It is formed with a film thickness of about A shielding film LS is provided above the protective film PSVI on the thin film transistor TFT to prevent external light from entering the i-type semiconductor IAs used as a channel formation region. As shown in FIG. 2, the shielding film LS is configured within a region surrounded by a dotted line. The shielding film LS is formed of a film having a high shielding property against light, such as an aluminum film or a chromium film, and is formed to a thickness of approximately 1000 mm by sputtering. Therefore, thin film transistor TPT]~T F'T3
The common semiconductor layer As is sandwiched between the upper and lower light shielding films LS and the thick gate electrode GT, and is not exposed to external natural light or backlight light. Light shielding film L
S and the gate electrode GT are thicker than the semiconductor layer AS and are formed to have a similar shape, and their sizes are almost the same (in the figure, the gate electrode GT is connected to the light shielding film L so that the boundary line can be seen).
(drawn smaller than S). Note that it is also possible to attach the backlight to the upper transparent glass substrate SUB2 side and set the lower transparent glass substrate SUBI to the viewing side (externally exposed side). In this case, the light shielding films E, S
acts as a light shield for backlight light, and gate electrode GT acts as a light shield for natural light. The thin film transistor TPT is configured such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large. That is, the thin film transistor TPT is configured to control the voltage applied to the transparent pixel electrode ITO. The liquid crystal LC is defined by a lower alignment film ORII and an upper alignment film ORI2, which set the orientation of liquid crystal molecules, and is enclosed in a space formed between a lower transparent glass substrate SUBI and an upper transparent glass substrate SUB2. There is. The lower alignment film ORII is formed on the protective film PSVI on the lower transparent glass substrate SUBI side. On the inner surface (liquid crystal side) of the upper transparent glass substrate SUB2, a color filter FIL, a protective film PSv2, a common transparent pixel electrode (COM) ITO, and the upper alignment film ORI are provided.
2 are sequentially stacked. The common transparent pixel electrode ITO is connected to the lower transparent glass substrate S.
It faces the transparent pixel electrode ITO provided for each pixel on the UBI side and is configured integrally with another adjacent common transparent pixel electrode ITO. A common voltage V cova is applied to this common transparent pixel electrode ITO. The common voltage vcoII1 is an intermediate potential between the low level driving voltage V d sin and the high level driving voltage V d wax applied to the video signal line DL. The color filter FIL is constructed by coloring a dyed base material made of a resin material such as acrylic resin with a dye.
The color filter FIL is arranged for each pixel at a position facing the pixel, and is colored differently. That is, the color filter FIL, like the pixel, is configured within the intersection area of two adjacent scanning signal lines GL and two adjacent video signal lines DL. Each pixel has a color filter F
Each predetermined color filter of the IL is divided into a plurality of parts. Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB2, and the dyed base material other than the red filter formation area is removed using photolithography technology. After this, the dyed base material is dyed with red dye, fixed treatment is applied, and red filter R
form. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps. In this way, by forming each color filter of the color filter FIL in the intersection area facing each pixel, each of the scanning signal line GL and the video signal line DL exists between each color filter of the color filter FIL. Corresponding to their existence, it is possible to secure an alignment margin between each pixel and each color filter of the color filter FIL (increase the alignment margin). Furthermore, when forming each color filter of the color filter FIL, it is possible to secure alignment margin dimensions between different color filters. That is, in this liquid crystal display device, a pixel is formed within the intersection area of two adjacent scanning signal lines OL and two adjacent video signal lines DL, and this pixel is divided into a plurality of parts, and a pixel opposite to this pixel is formed. By forming each color filter of the color filter FIL at the position where the color filter FIL is located, the above-mentioned point defects can be reduced, and an alignment margin between each pixel and each color filter can be secured. The protective film PSV2 is provided to prevent the dyes used to dye the color filter FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. This liquid crystal display device has a lower transparent glass substrate SU? l side,
Each layer on the upper transparent glass substrate SUB2 side is formed separately, and then the lower transparent glass substrate SUBI and the upper transparent glass substrate SUB2 are superimposed, and a liquid crystal LC is placed between them.
It is assembled by enclosing. As shown in FIG. 4, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends, and are arranged in pixel columns X1, x,, x3, X,...・Constitutes each of the following. Each pixel column Xttx,,X3,
Each pixel of X4,... is a thin film transistor T
PT1~TFT3 and transparent pixel electrode IT01~ITO
3 are arranged in the same position. In other words, pixel column x
In each of the pixels 1, Each pixel in the next pixel column xt, X,,... in the row direction of each pixel column X, X,... It is composed of pixels arranged line-symmetrically with respect to line DL. That is, in each pixel of the pixel rows X, X, . Then, the pixel rows X,, X4
,... each pixel is a pixel column X,, X3,...
Each pixel in ... is shifted (shifted) by half a pixel in the column direction. In other words, pixel row
If each pixel interval is 1.0 (1.0 pitch), then the next pixel row (0.5 pitch)
It's off. Video signal line D extending between each pixel in the row direction
L is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. In this way, in the liquid crystal display section, the thin film transistor T
A plurality of pixels with the same PT and transparent pixel electrode ITO are arranged in the column direction to form a pixel column X, and the next pixel column X of the pixel column By configuring the pixel array with pixels arranged line-symmetrically with respect to the signal line DL, and moving the next pixel column by half a pixel interval with respect to the previous pixel column, the structure shown in FIG. As shown in the main part plan view in a superimposed state), a pixel on which a predetermined color filter is formed in the previous pixel row
and the pixel on which the same color filter of the next pixel row X is formed (
For example, the pixel on which the red filter R of the pixel row X4 is formed can be separated by 1.5 pixel intervals (1.5 pitch). In other words, the pixels in the previous pixel row FIL can configure an RGB triangular arrangement structure. Color filter FIL R
The triangular arrangement structure of GB can improve the mixing of each color, and therefore can improve the resolution of a color image. Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. I want to. Video signal line D
Figure 9 shows the configuration of this liquid crystal display section in circuit terms. (Equivalent circuit diagram of liquid crystal display section). XiG, Xi+IG, . . . shown in FIG. 9 are video signal lines DL connected to the pixels in which the green filter G is formed *X i B , Xi + I B , −.
- is a video signal line DL connected to the pixel where the blue filter B is formed. Xi+IR, Xi+2R,...
is a video signal line DL connected to a pixel in which a red filter R is formed. These video signal lines DL are selected by a video signal drive circuit. Yi is shown in @Figure 4 and Figure 8 above.
This is a scanning signal line OL that selects pixel column XE shown in the figure. Similarly, each of Yi+1, Yi+2, . . . is a scanning signal line OL that selects each of the pixel columns X2sx3, . These scanning signal lines OL are connected to a vertical scanning circuit. The center part of FIG. 3 shows the cross section of one pixel part, while the left side shows the cross section of the left edge part of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2 where the external lead wiring is present. ). The right side shows a cross section of the right side of the transparent glass substrates SUBI and SUB2 without external lead wiring. The sealing material SL shown on the left and right sides of FIG. 3 is configured to seal the liquid crystal LC, and the transparent glass substrate SUBI excluding the liquid crystal sealing opening (Is not shown)
and is formed along the entire edge of SUB2. The sealing material SL is made of, for example, epoxy resin. The common transparent pixel electrode IT○ on the side of the upper transparent glass substrate SUBZ is connected at least in one place to an external lead wiring formed on the side of the lower transparent glass substrate SBI by a silver paste material SIL. This external lead wiring is formed in the same manufacturing process as each of the gate electrode GT, source electrode SDI, and drain electrode SD2 described above. Said alignment film ○RI1 and ORI2, transparent pixel electrode IT
O, common transparent pixel electrode TO, protective film PSVI and P
The respective layers of SV2 and the insulating film GI are formed inside the sealing material SL.8@Light plate POL is formed on the outer surface of each of the lower transparent glass substrate SUBI and the upper transparent glass substrate SUB2. FIG. 10 is a cross-sectional view of the main part of the pixel and the periphery of the seal part of the liquid crystal display part of another active matrix color liquid crystal display device to which the present invention is applied, and FIG.
0 is a plan view showing one pixel of the liquid crystal display section of the liquid crystal display device shown in FIG. 14 to 16 are plan views of main parts of a liquid crystal display section in which a plurality of pixels are arranged. FIGS. 14 to 16 are plan views of main parts in a predetermined manufacturing process of the pixels shown in FIG. This is a plan view of the main parts in a state in which color filters are superimposed. In this liquid crystal display device, it is possible to improve the aperture ratio of each pixel in the liquid crystal display section, reduce the direct current component applied to the liquid crystal, reduce point defects in the liquid crystal display section, and reduce black unevenness. can. In this liquid crystal display device, as shown in FIG. 11, the i-type semiconductor layer As in each pixel of the liquid crystal display section is
It is divided into FTI to TFT3. In other words, the thin film transistor TPTI divided into a plurality of pixels
Each of the TFTs 3 is composed of an independent island region of an i-type semiconductor layer AS. Further, each of the transparent pixel electrodes ITOI to TO3 connected to each of the thin film transistors TPTI to TFT3 is connected to the scanning signal line GL of the next stage in the row direction on the side opposite to the side connected to the thin film transistors TPTI to TFT3. They are superimposed. In this superposition, each of the transparent pixel electrodes ITOI to ITO3 is used as one electrode,
A storage capacitance element (capacitance element) Cadd is configured with the next stage scanning signal line GL as the other electrode. The dielectric film of this storage capacitor element C add is a thin film transistor TFT.
It is composed of the same layer as the insulating film GI used as the gate insulating film. The gate electrode GT is formed to be thicker than the i-type semiconductor layer As, similar to the liquid crystal display device shown in FIG.
is formed for each independent i-type semiconductor layer AS, so a thick pattern is formed for each thin film transistor TPT. In addition, the scanning signal line OL, video signal line DL, thin film transistor TP of the upper transparent glass substrate SUB2
Black matrix pattern BM on the part corresponding to T
is provided, so the outline of the pixel becomes clear,
Contrast is improved and external natural light can be prevented from hitting the thin film transistor TPT. An equivalent circuit of the pixel shown in FIG. 11 is shown in FIG. 18 (equivalent circuit diagram). In FIG. 18, as before, C
gs is a superimposed capacitance formed by the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the superposition capacitance Cgs is an insulating film GI++
Cpix is a liquid crystal capacitance formed between the transparent pixel electrode ITO (PIX) and the common transparent pixel electrode ITO (COM). The dielectric films of the liquid crystal capacitor C pix are the liquid crystal LC, the protective film psv1, and the alignment films ORII and ORI2. V
lc is the midpoint potential. The storage capacitance element C add is a thin film transistor TP
When T switches, the midpoint potential (pixel electrode potential)
It works to reduce the influence of gate potential change ΔVg on v1c. This situation can be expressed as the following formula. ΔV lc = ((Cgs/ (Cgs+Cadd+
Cpix)) XΔVg Here, ΔVlc represents the change in midpoint potential due to ΔVg. This change ΔVlc causes a DC component applied to the liquid crystal, but the storage capacitance element C
The larger the storage capacity of add, the smaller its value can be. In addition, the storage capacitance element C add has the effect of lengthening the discharge time delay, and the thin film transistor TPT
Stores video information for a long time after it is turned off. Reducing the DC component applied to the liquid crystal LC improves the life of the liquid crystal LC,
It is possible to reduce so-called burn-in, where the previous image remains when switching LCD screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the semiconductor layer AS, the overlapping area with the source/drain electrodes SD1 and SD2 increases, and therefore the parasitic capacitance Cgs increases, and the midpoint potential Vlc decreases. This has the opposite effect of becoming more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the storage capacitor element C add, this disadvantage can also be eliminated. Further, in a liquid crystal display device having pixels in an intersection area of two scanning signal lines GL and two video signal lines DL, one scanning signal line OL of the two scanning signal lines GL
The thin film transistor TPT of the pixel selected by is divided into a plurality of parts, and the divided thin film transistors TPTI to TF
A transparent pixel electrode ITO divided into a plurality of parts (IT○1 to ITO3) is connected to each of T3, and the pixel electrode IT○ is used as one electrode for each of the divided transparent pixel electrodes ITOI to ITO3. By using the other scanning signal line GL of the scanning signal lines OL of the book as a capacitive electrode line and configuring the storage capacitor element Cadd which serves as the other electrode, a divided part of the pixel can be turned into a point as described above. It's just a defect. Since the pixel as a whole is no longer a point defect, it is possible to reduce the point defect of the pixel, and it is also possible to reduce the direct current component applied to the liquid crystal LC by the storage capacitor element Cadd, thereby improving the life of the liquid crystal LC. You can cheat. In particular, by dividing the pixel, it is possible to eliminate point defects caused by a short circuit between the gate electrode GT and the source electrode SDI or drain electrode SD2 of the thin film transistor TPT, and also to eliminate the point defects caused by the short circuit between the gate electrode GT and the source electrode SDI or drain electrode SD2 of the thin film transistor TPT. and storage capacitor C
It is possible to reduce point defects caused by short circuits between the add and the other electrode (capacitor electrode line). In this liquid crystal display device, the number of point defects on the latter side is one third. As a result, some of the point defects into which the pixel is divided are smaller than the entire area of the pixel, making it difficult to see the point defects. The storage capacitance of the storage capacitance element C add is 4 to 8 times (4.
Cpix<Cadd<El(, pix). 8 to 32 times the superposition capacitance Cgs (8 ・Cgs< Ca
dd<32・Cgs). Further, the scanning signal line GL is connected to a first conductive film (chromium film) g.
The other electrode of the storage capacitor element C add, that is, the branched portion of the capacitor electrode wire, is formed by a composite film in which a second conductive film (aluminum film) g2 is superimposed on the second conductive film (aluminum film) g2. By forming a single-layer film consisting of one conductive film G1, it is possible to reduce the resistance value of the scanning signal line GL and improve the write characteristics, and also to improve the storage capacitance element Ca.
One electrode of the storage capacitor C add (transparent pixel electrode I'I
” O ) can be bonded onto the insulating film GI, it is possible to reduce disconnection of one electrode of the storage capacitor element C add. Also, the other electrode of the storage capacitor element C add can be bonded to a single-layer electrode. By forming the first conductive film g1 and not forming the second conductive film g2 which is an aluminum film, it is possible to prevent a short circuit between the other electrode of the storage capacitor element C add and one electrode due to hillocks of the aluminum film. The source electrode SD is provided in a portion between each of the transparent pixel electrodes ITOI to ITO3 that are overlapped to form the storage capacitor element C add and the capacitor electrode line portion.
Similarly to I, the first conductive film d1 is used to prevent the transparent pixel electrode ITO from being disconnected when climbing over the stepped shape of the capacitor electrode line.
and an island region made up of the second conductive film d2. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode ITO.
In this way, between one electrode of the storage capacitance element C add and the insulating film GI used as its dielectric film,
A base layer is formed of a first conductive film d1 and a second conductive film d2 formed on the first conductive film d1, which has a lower specific resistance value and a smaller size than the first conductive film d1.
By connecting the third conductive film d3) to the first conductive film d1 exposed from the underlying second conductive film d2, the storage capacitor can be reliably moved along the stepped portion based on the other electrode of the storage capacitor element C add. Since one electrode of the element Cadd can be bonded, disconnection of one electrode of the storage capacitor element Cadd can be reduced. A storage capacitor element C ad is attached to the transparent element-resistant electrode ITO of the pixel.
The liquid crystal display section of the liquid crystal display device provided with d is constructed as shown in FIG. 20 (equivalent circuit diagram showing the liquid crystal display section). The liquid crystal display section is composed of repeating unit basic patterns including pixels, scanning signal lines OL, and video signal lines DL. The final stage scanning signal line OL (or first stage scanning signal line GL) used as a capacitor electrode line is connected to a common transparent pixel electrode (Vcom) ITO, as shown in FIG. As shown in FIG.
is connected to the external lead wiring. Moreover, some of the conductive layers (gL and g2) of this external lead wiring are constructed in the same manufacturing process as the scanning signal line GL. As a result, the final stage scanning signal line GL (capacitive electrode line) can be easily connected to the common transparent pixel electrode ITO. In this way, by connecting the final stage of the capacitive electrode line to the common transparent pixel electrode (Vcom) ITO of the pixel, the final stage of the capacitive electrode line can be configured integrally with a part of the conductive layer of the external wiring. Moreover, since the common transparent pixel electrode ITO is connected to the external lead wiring, the final stage capacitor electrode line can be connected to the common transparent pixel electrode IT○ with a simple configuration. In addition, the liquid crystal display device is based on the DC cancellation method described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present invention, as shown in FIG. 19 (time chart). By controlling the drive voltage of the scanning signal line DL, it is possible to further reduce the DC component applied to the liquid crystal LC. In FIG. 19, Vi is the drive voltage of an arbitrary scanning signal line OL, and Vi+1 is the drive voltage of the scanning signal line GL at the next stage. Vee is a low-level driving voltage Vdmin applied to the scanning signal line GL.
．． Vd d is a high-level drive voltage V d s+ax applied to the scanning signal line GL. Each time t = t~
The voltage change ΔVe~Δv4 of the midpoint potential v1c (see Fig. 18) at t, is the total capacitance of the pixel (Cgs+
If Cpix+Cadd) is C, then the following equation is obtained. Δv1=-(Cgs/C)・v2 AV*=+(Cgs/C)・(V 1 +
V2)-(Cadd/C)172 Δv3=-(Cgs/C)・v1+(Cadd/C){V1+V2)ΔV4
=-(Cadd/C)・Vl Here, if the drive voltage applied to the scanning signal line GL is sufficient (see below)

(See Note), the DC voltage applied to the liquid crystal LC is expressed by the following formula. ΔV, +ΔV4= (Cadd−V 2 − Cgs−
V 1 )/C Therefore, Cadd-v2=Cgs-
When v1, the DC voltage applied to the liquid crystal LC becomes O.

〔Effect of the invention〕

As explained above, in the method for manufacturing a liquid crystal display device according to the present invention, when forming an insulating film used as a gate insulating film, a surrounding protection film made of the same film as the insulating film is provided on the outside of the insulating film. Since a film is formed, the surrounding protective film can prevent moisture from entering between the substrate surface and the protective film, so the signal formed outside the insulating film used as the gate insulating film Even if the distance between the lines is small and the potential difference between adjacent signal lines is large, the conductive film forming the signal line formed on the outside of the insulating film used as the gate insulation film will not be ionized. Signal lines formed outside the insulating film used as a gate insulating film will not corrode, and signal lines formed outside the insulating film used as a gate insulating film will not be disconnected. As described above, the effects of this invention are remarkable.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a method for manufacturing an active matrix color liquid crystal display device according to the present invention, and FIG. 2 is a pixel of a liquid crystal display section of an active matrix color liquid crystal display device to which the present invention is applied. Figure 3 is a cross-sectional view of the area taken along the line ■-■ in Figure 2 and the area around the seal, Figure 4 is a liquid crystal display section with multiple pixels shown in Figure 2. FIGS. 5 to 7 are plan views of main parts in a predetermined manufacturing process of the pixel shown in FIG.
FIG. 8 is a plan view of main parts in a state where the pixels and color filters shown in FIG. 4 are superimposed, FIG. 9 is an equivalent circuit diagram showing the liquid crystal display section of the above active matrix type color liquid crystal display device, 1st. Figure 0 is a sectional view of the main part of the pixel and the periphery of the seal part of the liquid crystal display part of another active matrix color liquid crystal display device to which the present invention is applied, and Figure 11 is the liquid crystal display shown in Figure 10. 12 is a plan view showing one pixel of the liquid crystal display section of the device; FIG. 12 is a sectional view taken along the line A-A in FIG. 11; FIG.
FIG. 1 is a plan view of a main part of a liquid crystal display section in which a plurality of pixels are arranged as shown in FIG. 1, FIGS. 18 is an equivalent circuit diagram of the pixel shown in FIG. 1, and FIG. 19 is an active voltage of the scanning signal line using the DC cancellation method. 20 and 21 are equivalent circuit diagrams showing the liquid crystal display section of the active matrix color liquid crystal display device shown in FIG. 13, and FIG. 22 is a time chart showing the manufacturing method in FIG. FIG. 23 is a plan view of a part of the liquid crystal display device explained in a predetermined manufacturing process, FIG. 23 is a cross-sectional view of a part of the liquid crystal display device whose manufacturing method was explained in FIG. FIG. 2 is an explanatory diagram of a method for manufacturing a liquid crystal display device. SUB...Transparent glass substrate OL...Scanning signal line DL...Video signal line GI...Insulating film GT...Gate electrode AS...I-type semiconductor reservoir SD...Source electrode or drain Electrode psv...
Protective film LS...Light shielding film LC...Liquid crystal TPT...Thin film transistor ITO (COM)...Transparent pixel electrode g. d... Conductive film C add... Holding capacitor element Cgs... Superposition capacitance C pix... Liquid crystal capacitance BM... Black matrix pattern CCI...
Surrounding protective film Figure 1 GI---Ichitsu, line ccr---Ippu Ijo! Around II Fig. 18 VLc t1 t2 t3 t4 GI-111 Sanskrit connection Fig. 22 CCI---One round FfJ Hosei record GI-111 bag ball order

Claims (1)

[Claims] 1. In a method for manufacturing an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, when forming an insulating film to be used as a gate insulating film, 1. A method of manufacturing a liquid crystal display device, comprising forming a surrounding protective film made of the same film as an insulating film.