JPH02197193A - Formation of viahole - Google Patents

Abstract

PURPOSE:To improve a viahole section of a second insulating layer in connectability by a method wherein the viahole of a first insulating layer is formed and then a conductor is formed inside the viahole through electroless plating, and the viahole of the second insulating layer is formed. CONSTITUTION:A filler-contained polyimide layer 3 is made to coat the whole surface of a board 1 where a lower wiring pattern 2 has been formed. Then, only a required part of the surface of the layer 3 is exposed to ultraviolet rays through a glass mask 5. Next, a developing process is executed for the formation of a viahole. The film 3 is cured to turn into imide and thus a first insulating layer is formed. Next, a conductor is formed in the viahole section of the first layer through electroless plating 4. Then, a second film 3 is made to coat. At this point, the surface of the film 3 is flat because of the effect of viahole burying plating. And, the film 3 is exposed to ultraviolet rays through the mask 5. When the film 3 is developed, a viahole small ln depth can be obtained as the conductor has been formed in the viahole section, so that the viahole excellent inn connectability can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming via holes, particularly a method for forming via holes for connecting upper and lower conductor layers of a high-density multilayer wiring board for LSI mounting used in electronic devices such as computers. Regarding.

[Conventional technology]

In the conventional via hole forming method, a photosensitive bolimide containing a filler such as 5i02 is formed into two thick layers in order to obtain predetermined insulation properties and signal transmission properties.

Next, a conventional via hole forming method will be described in detail with reference to the drawings.

FIGS. 2(a) and 2(b) are cross-sectional views for explaining an example of a conventional via hole forming method.

The via hole forming method shown in FIGS. 2(a) and (b) is as follows:
After forming the first insulating layer, when forming the second insulating layer, spin coating is performed to have the same thickness as the first insulating layer, and as shown in FIG. 2(a), via holes on the wiring pattern 2 are formed. Since the thickness of the second insulating layer is thicker than that of the first insulating layer, when the photosensitive bolimide film containing 5i02 of the second insulating layer is exposed, due to the thick film, less ultraviolet rays pass through during exposure. When developed, as shown in FIG. 2(b), due to the thick film, the development speed on the side surface of the via hole is faster than the development speed in the depth direction of the via hole, so that an inverted Taber-shaped via hole is likely to be formed.

[Problem to be solved by the invention]

The above-described conventional via hole forming method has the disadvantage that a reverse tapered via hole is likely to be formed, resulting in poor connectivity of the via hole between the side surface of the reverse tapered via hole and the upper wiring pattern.

In addition, stress is applied to the opening of the inverted taper via hole, resulting in cracks.

[Means to solve the problem]

The via hole forming method of the present invention includes forming a via hole in a first insulating layer, forming a conductor in the via hole portion by electroless plating, and forming a via hole in a second insulating layer on the conductor. Consists of.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(h) are cross-sectional views for explaining one embodiment of the present invention.

In the method of forming a via hole on a substrate 1, a lower wiring pattern 2 is formed. [FIG. 1(a)] A filler-containing polyimide film 3 is spin-coated over the entire surface of the substrate 1 and dried at a constant temperature. [Figure 1(b)] At this time, the filler bolimide yA3 is 20 to 30
μm, not yet imidized.

Next, the filler-containing polymide film 3 is exposed to ultraviolet light through a glass mask 5 so that only a desired portion of the surface thereof is irradiated with light energy, and then dried at a low temperature. [FIG. 1(C)] Next, when developing, the portions not irradiated with ultraviolet rays are removed and via holes are formed. 300 to 400 of this patterned filler-filled borimid film 3
C. and imidized to form the first insulating layer. [FIG. 1(d)] Next, a conductor is formed in the via hole portion of the first layer by electroless plating. [FIG. 1(e)] Next, a second layer of filler, Borimide IIgB, is spin-coated and dried at low temperature. [FIG. 1(f)] At this time, the filler-filled borimid film 3 has a thickness of 20 to 30 μm, similar to the first layer, and has a flat surface due to the effect of via filling plating.

Next, only desired portions of the surface are exposed to ultraviolet light through the glass mask 5 and dried at low temperature. [FIG. 1(g)] At this time, it is desirable that the dimensions of the via portion of the second layer be smaller.

Next, when developed, due to the effect of forming a conductor in the via hole part by electroless plating, the film thickness of the via hole becomes thinner, the latitude of the development time becomes wider, the development speed of the side surface of the via hole is suppressed, and the connectivity is improved. A good beer hall will be formed. Finally, this patterned filler Borimid II! 3 is cured and imidized to form a second insulating layer. [Figure 1 (h
)] [Effects of the Invention] The via hole forming method of the present invention has a structure in which, after forming a via hole in a first insulating layer, a conductor is formed in the via hole portion by electroless plating to form a via hole in a second insulating layer. This has the effect of reducing the thickness of the via hole portion of the second insulating layer and forming an insulating layer with excellent connectivity of the via hole in the second insulating layer and excellent crack resistance due to the shape of the via hole. .

[Brief explanation of the drawing]

FIGS. 1(a) to 1(h) are sectional views for explaining an embodiment of the present invention, and FIGS. 2(a) and 2(b) are sectional views for explaining a conventional example. 1... Board, 2... Wiring pattern, 3
・・・・・・Filler volimide membrane, 4・・・・・・
・Electroless plating, 5...Glass mask, 6...
... Thickness of the first insulating layer, 7... Thickness of the second insulating layer.

Claims (1)

[Claims] After forming the via hole in the first insulating layer, a conductor is formed in the via hole part by electroless plating, and a second conductor is formed on the conductor.
and forming a via hole in an insulating layer.