JPH02154482A - 樹脂封止型半導体発光装置 - Google Patents

樹脂封止型半導体発光装置

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Publication number
JPH02154482A
JPH02154482A JP63309301A JP30930188A JPH02154482A JP H02154482 A JPH02154482 A JP H02154482A JP 63309301 A JP63309301 A JP 63309301A JP 30930188 A JP30930188 A JP 30930188A JP H02154482 A JPH02154482 A JP H02154482A
Authority
JP
Japan
Prior art keywords
light emitting
emitting element
mounting surface
lead
mount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63309301A
Other languages
English (en)
Inventor
Yoshinari Kimura
木村 義成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63309301A priority Critical patent/JPH02154482A/ja
Publication of JPH02154482A publication Critical patent/JPH02154482A/ja
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体発光装置に関し、特に発光素
子のマウント面側の裏面電極を導電性接着剤でマウント
リードの素子マウント面に接着接続するm造の樹脂封止
型半導体発光装置に関する。
〔従来の技術〕
従来、この種の樹脂封止型半導体発光装置は、第2図(
a)、(b)に示すように、発光素子2Aのマウン)・
面側の裏面電極23Aが導電性接着剤の銀ペースト3に
よってマウントリード1の素子マウントifI]]−1
に固着され、発光素子5への表面側の電極がホンディン
ク線5で他のリード4に接続され、全体がエポキシ樹脂
6で封止される構造となっていた。
発光素子2Aのマウント状態は、第2図(b)に示すよ
うに、銀ペースト3が発光素子2Aのマウント面側にp
−n接合部21に接触しない範囲に塗布され、平坦な裏
面電極23Aと平坦な素子マウント面]1とが接着接続
するようになっていた。
また、マウント材の導電性接着剤は、光出力の通電劣化
に影響を与えるマウント歪を抑えるため、上述したよう
に、銀ペーストが多く用いられ上述した従来の樹脂封止
型半導体発光装置は、発光素子2Aのマウント面側に銀
ペースト3か1゛)n接合部21に接触しない範囲で塗
布され、平坦な裏面電極23Aと平坦な素子マウント面
11とが接着接続する構造となっているので、銀ペース
ト3の塗布量が多量の場合、発光素子2Aの側面に露出
しているp−n接合部2】に接して短絡不良が発生し、
反対に塗布量か少量の場合は、はんだ付は実装時等の熱
的1機械的ス)・レス或は、実動作時の熱的ストレス等
の影響によってマウント面の密着性が低下し、発光素子
2Aのはく能が生じ、その結果接続不良が発生するなめ
、塗布量管理は厳しく、従って発光素子2Aのマウント
作業が困難になるという欠点がある。
本発明の目的は、銀ペーストの塗布量管理が緩和されて
マウント作業が容易となり、かつマウント面の接着強度
を向上することかできる樹脂¥1止型半導体発光装置を
提供することにある。
〔課題を解決するための手段〕
本発明の樹脂封止型半導体発光装置は、素子マウント作
業を備えたマウン1へリードと、ラウンl−面側に深さ
がp−n結合部までの深さより浅く形成された複数の?
Ik部と前記マウント面に形成された裏面電極とを備え
た発光素子と、この発光素子の裏面電極を前記マウント
リードの素子7971〜面に接着接続してこの発光素子
を固定する導電性接着剤とを有している。
〔実施例〕
次に、本発明の実施例について図面を参照して説明する
第1図<a、)、(b)はそれぞれ本発明の一実施例を
示す断面図及び部分拡大断面図である。
この実施例は、素子マウント面〕1を備えたラウンl−
リート]と、マウント面側に深さがp−n接合部21ま
での深さより浅く形成された複数の溝部22とマウン1
へ而に形成された裏面電極23とを備えた発光素子2と
、この発光素子2の裏面電極23とマウン)〜リート]
の素子マウン)〜面】1に接着接続して発光素子2を固
定する導電性接着材の銀ペースト3と、マウントリード
1と対をなすリード4と、発光素子2の表面側の電極を
リード4に接続するボンディング線5と、マウン)〜リ
ード]及びリード4の一部を除き他の部分全体を覆って
封止するエポキシ樹脂6とを有する構造となっている。
銀ペースト3は発光素子2のマウント面側にト)n接合
部21に接触しない範囲で塗布されるが、発光素子2の
側面の塗布量を少なめにすることにより、銀ペースト3
がp−n接合部21に接触するのを防止することかでき
、しかも鋼部22に銀ペースト3が入り込むので接着表
面積が大きくなり、接着強度を高めることができる。
従って銀ペースト4の塗布量管理が緩和され、塗布作業
が容易になる。
なお、この発光素子2は、ます、マウン)・面に凹状の
溝部22を選択エツチンクにより形成し、次に蒸着法に
よって凸部先端に裏面電極23を形成することで容易に
製造可能である。
〔発明の効果〕
以上説明したように本発明は、発光素子のマウント面に
複数の溝部を形成することにより、銀ペーストとの接着
表面積を大きくすることができるのてマウン)・面の接
着強度を増すことができ、また、銀ペース1〜の側面の
塗布量を少なめにすることでp−11接合と銀ペースト
との接触を防止でき、従って銀ペース1への塗布量管理
が緩和され、塗布作業が容易になるという効果がある。
【図面の簡単な説明】
第1図<a)、(b)はそれぞれ本発明の一実施例を示
す断面図及び部分拡大断面図、第2図(a)、(b)は
それぞれ従来の樹脂封止型半導体発光装置の一例を示す
断面図及び部分拡大断面図である。 ]・・・マウントリード、2,2A・・発光素子、3・
・・銀ペース1へ、4・・リード、5・・・ボンディン
グ線、6・・・エポキシ樹脂、]トトラマウント、21
・・・p−n接合部、22・・・溝部、23.23A・
・・裏面電極。

Claims (1)

    【特許請求の範囲】
  1. 素子マウント面を備えたマウントリードと、マウント面
    側に深さがp−n結合部までの深さより浅く形成された
    複数の溝部と前記マウント面に形成された裏面電極とを
    備えた発光素子と、この発光素子の裏面電極を前記マウ
    ントリードの素子マウント面に接着接続してこの発光素
    子を固定する導電性接着剤とを有することを特徴とする
    樹脂封止型半導体発光装置。
JP63309301A 1988-12-06 1988-12-06 樹脂封止型半導体発光装置 Pending JPH02154482A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63309301A JPH02154482A (ja) 1988-12-06 1988-12-06 樹脂封止型半導体発光装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63309301A JPH02154482A (ja) 1988-12-06 1988-12-06 樹脂封止型半導体発光装置

Publications (1)

Publication Number Publication Date
JPH02154482A true JPH02154482A (ja) 1990-06-13

Family

ID=17991359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63309301A Pending JPH02154482A (ja) 1988-12-06 1988-12-06 樹脂封止型半導体発光装置

Country Status (1)

Country Link
JP (1) JPH02154482A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5789820A (en) * 1996-02-28 1998-08-04 Nec Corporation Method for manufacturing heat radiating resin-molded semiconductor device
US7038245B2 (en) 2002-03-14 2006-05-02 Kabushiki Kaisha Toshiba Semiconductor light emitting device having angled side surface
JP5351267B2 (ja) * 2009-07-24 2013-11-27 パナソニック株式会社 半導体部品、半導体ウェハ部品、半導体部品の製造方法、及び、接合構造体の製造方法
US20150176779A1 (en) * 2013-12-20 2015-06-25 Panasonic Intellectual Property Management Co., Ltd. Electronic component mounting system, electronic component mounting method, and electronic component mounting machine

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5789820A (en) * 1996-02-28 1998-08-04 Nec Corporation Method for manufacturing heat radiating resin-molded semiconductor device
US7038245B2 (en) 2002-03-14 2006-05-02 Kabushiki Kaisha Toshiba Semiconductor light emitting device having angled side surface
US7329903B2 (en) 2002-03-14 2008-02-12 Kabushiki Kaisha Toshiba Semiconductor light emitting element having three side surfaces inclined to connect the top and bottom surfaces of the transparent substrate
JP5351267B2 (ja) * 2009-07-24 2013-11-27 パナソニック株式会社 半導体部品、半導体ウェハ部品、半導体部品の製造方法、及び、接合構造体の製造方法
US20150176779A1 (en) * 2013-12-20 2015-06-25 Panasonic Intellectual Property Management Co., Ltd. Electronic component mounting system, electronic component mounting method, and electronic component mounting machine
US9227387B2 (en) * 2013-12-20 2016-01-05 Panasonic Intellectual Property Management Co., Ltd. Electronic component mounting system, electronic component mounting method, and electronic component mounting machine
US9572295B2 (en) 2013-12-20 2017-02-14 Panasonic Intellectual Property Management Co., Ltd. Electronic component mounting system, electronic component mounting method, and electronic component mounting machine

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