JPH02146774A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to form a transistor having high dielectric strength with a small number of masks and self-alignedly by a method wherein a field oxide film is provided on both sides of a gate oxide film and an impurity diffusion layer extending from both sides of the field oxide film to the area directly under the field oxide film and a part of the area directly under the field oxide film. CONSTITUTION:A gate oxide film 6 is provided near the surface of a semiconductor substrate 1. A field oxide film 2 is provided on both sides of the gate oxide film 6 without space and a gate electrode 8 is provided without space on the gate oxide film 6 and on a part of the field oxide film 2 on both sides. There are provided with first and second impurity diffusion layers 5 extending to the area directly under the field oxide film 2 of both sides and to parts of the areas directly under near both ends of the gate oxide film 6. On the surfaces of the first and second impurity diffusion layers 5 is provided a reversely conductive type high-concentration impurity area 7. For example, the impurity diffusion layer 5 and the high-concentration impurity area 7 are formed by ion implantation via a protective layer 4 formed between field oxide films 2.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an MO3 type semiconductor device.

[Summary of the invention]

The present invention provides field oxide films on both sides of the gate oxide film, and further provides impurity diffusion regions extending from both sides of the field oxide film to a region immediately below the field oxide film and a part of the region directly below the gate oxide film. This makes it possible to form a high breakdown voltage transistor with a small number of masks and in self-alignment with respect to the field oxide film.

[Conventional technology]

Conventionally, as shown in FIG. 2, a low concentration impurity region 5 of a conductivity type opposite to that of a semiconductor substrate 1 is provided in an active region with a gate electrode 8.
The high concentration impurity region 7 of the conductivity type opposite to that of the semiconductor substrate 1 is formed offset from the gate electrode 8 using a mask. In addition, 2
5 is a field oxide film, 5 is a low concentration impurity region, 6 is a gate oxide film, and 7 is a high concentration impurity region.

[Problem to be solved by the invention]

However, the conventional technique requires at least two types of masks to form a low concentration impurity region and a high concentration impurity region of conductivity type opposite to that of the semiconductor substrate, resulting in high costs.
Another drawback is that the voltage transfer rate becomes unstable due to mask misalignment between the gate electrode and the high concentration impurity region.

[Failure to solve the problem]

In order to solve the problems described above, in the present invention, impurity diffusion regions are formed that extend from both sides of the field oxide film to a region immediately below the field oxide film and further to a part of the region immediately below the gate oxide film.

[Effect]

A semiconductor device having an impurity diffusion region formed as described above can realize cost reduction and stabilization of voltage transfer rate.

Therefore, it has become possible to reduce the cost and improve the reliability of high-voltage transistors.

〔Example〕

Embodiments of the present invention will be described in detail with reference to the drawings. 1st
Figures (al to Fdl) show the steps for manufacturing the MO3 type semiconductor device of the present invention, taking an n-channel type as an example. A field oxide film 2 for element isolation is formed near the surface.Next, in the step shown in FIG. Open the window and place P", As", s in this area.
Ion implantation of an n-type dopant such as b+ is performed to form an n-type impurity region 5a. Next, in the step shown in FIG. 1(C), after the n-type impurity region 5a is made into the n-type impurity diffusion region 5 by long-term diffusion, a window is opened again using the first mask.
After forming an n-type high concentration impurity region 7 by ion implantation and diffusion of n-type dopants such as P", As', Sb", etc. and providing a gate oxide film 6, a polycrystalline silicon film is deposited on the entire surface and patterned. Then, gate electrode 8 is formed. After this, although not shown, the entire surface is covered with a CVD oxide film, contact holes are made, and necessary metal wiring is provided to complete the process.

〔Effect of the invention〕

As is clear from the above description, the present invention provides impurity diffusion regions that extend from both sides of a field oxide film to a region immediately below the field oxide film and further to a part of the region directly below the gate oxide film in an MO8 type semiconductor device. This formation has the effects of increasing the breakdown voltage of the source and drain, lowering the cost by reducing the number of costs, and stabilizing the characteristics by using self-alignment. Therefore, the present invention makes it possible to improve reliability.

6...Gate oxide film 7...N-type high concentration impurity region 8...Gate electrode that's all Applicant: Seiko Electronics Industries Co., Ltd. Agent: Patent Attorney: Keinosuke Hayashi

[Brief explanation of the drawing]

Figures 1 (al to d) are cross-sectional views showing the process order when manufacturing the MO3 type semiconductor device of the present invention, and Figure 2 is a cross-sectional view of a conventional MO3 type semiconductor device. - P type Semiconductor substrate field oxide film photoresist protective film n-type impurity region n-type impurity diffusion region 1 ・ ・ 2 ・ ・ 3 ・ ・ ・ 4 ・ ・ ・ 5 a ・ ・ 5 ・ ・ ・

Claims (1)

[Claims] A gate oxide film is provided near the surface of the semiconductor substrate, and field oxide films are provided on both sides of the gate oxide film with no gaps between them. A gate electrode is provided without any gap between the gate electrodes, and first and second impurity diffusion regions each extend from a region immediately below the field oxide films on both sides to a part of a region immediately below near both ends of the gate oxide film. A semiconductor device, further comprising: a high concentration impurity region having a conductivity type opposite to that of the semiconductor substrate in a surface portion of the first and second impurity diffusion regions.