JPH02135762A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH02135762A
JPH02135762A JP63290779A JP29077988A JPH02135762A JP H02135762 A JPH02135762 A JP H02135762A JP 63290779 A JP63290779 A JP 63290779A JP 29077988 A JP29077988 A JP 29077988A JP H02135762 A JPH02135762 A JP H02135762A
Authority
JP
Japan
Prior art keywords
semiconductor element
substrate
adhesive
bump
sealing cap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63290779A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0583186B2 (enrdf_load_stackoverflow
Inventor
Hiroshi Saito
宏 斉藤
Shigenari Takami
茂成 高見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP63290779A priority Critical patent/JPH02135762A/ja
Publication of JPH02135762A publication Critical patent/JPH02135762A/ja
Publication of JPH0583186B2 publication Critical patent/JPH0583186B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP63290779A 1988-11-16 1988-11-16 半導体装置 Granted JPH02135762A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63290779A JPH02135762A (ja) 1988-11-16 1988-11-16 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63290779A JPH02135762A (ja) 1988-11-16 1988-11-16 半導体装置

Publications (2)

Publication Number Publication Date
JPH02135762A true JPH02135762A (ja) 1990-05-24
JPH0583186B2 JPH0583186B2 (enrdf_load_stackoverflow) 1993-11-25

Family

ID=17760404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63290779A Granted JPH02135762A (ja) 1988-11-16 1988-11-16 半導体装置

Country Status (1)

Country Link
JP (1) JPH02135762A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6271058B1 (en) 1998-01-06 2001-08-07 Nec Corporation Method of manufacturing semiconductor device in which semiconductor chip is mounted facedown on board
US6294408B1 (en) * 1999-01-06 2001-09-25 International Business Machines Corporation Method for controlling thermal interface gap distance
JP2002313972A (ja) * 2001-04-18 2002-10-25 Matsushita Electric Ind Co Ltd 電子部品組立体および電子部品組立体の製造方法
JP2016122783A (ja) * 2014-12-25 2016-07-07 セイコーＮｐｃ株式会社 真空封止型モジュール及びその製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63118185A (ja) * 1986-11-06 1988-05-23 松下電器産業株式会社 平板型表示装置の電極接続構造体
JPS63133554A (ja) * 1986-11-25 1988-06-06 Nec Corp 半導体装置
JPS63261841A (ja) * 1987-04-20 1988-10-28 Fuji Electric Co Ltd 半導体装置の多層配線基板内埋込実装構造

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63118185A (ja) * 1986-11-06 1988-05-23 松下電器産業株式会社 平板型表示装置の電極接続構造体
JPS63133554A (ja) * 1986-11-25 1988-06-06 Nec Corp 半導体装置
JPS63261841A (ja) * 1987-04-20 1988-10-28 Fuji Electric Co Ltd 半導体装置の多層配線基板内埋込実装構造

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6271058B1 (en) 1998-01-06 2001-08-07 Nec Corporation Method of manufacturing semiconductor device in which semiconductor chip is mounted facedown on board
US6294408B1 (en) * 1999-01-06 2001-09-25 International Business Machines Corporation Method for controlling thermal interface gap distance
JP2002313972A (ja) * 2001-04-18 2002-10-25 Matsushita Electric Ind Co Ltd 電子部品組立体および電子部品組立体の製造方法
JP2016122783A (ja) * 2014-12-25 2016-07-07 セイコーＮｐｃ株式会社 真空封止型モジュール及びその製造方法

Also Published As

Publication number Publication date
JPH0583186B2 (enrdf_load_stackoverflow) 1993-11-25

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