JPH02114947U - - Google Patents
Info
- Publication number
- JPH02114947U JPH02114947U JP2316089U JP2316089U JPH02114947U JP H02114947 U JPH02114947 U JP H02114947U JP 2316089 U JP2316089 U JP 2316089U JP 2316089 U JP2316089 U JP 2316089U JP H02114947 U JPH02114947 U JP H02114947U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- molding material
- lead
- molding
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000012778 molding material Substances 0.000 claims 3
- 238000000465 moulding Methods 0.000 claims 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第1図a,bは各々この考案の一実施例による
半導体装置を示す斜視図及び断面図、第2図はこ
の考案の他の実施例による半導体装置を示す断面
図、第3図はこの考案の他の実施例による半導体
装置を示す斜視図、並びに第4図、第5図及び第
6図は各々従来の半導体装置を示す斜視図である
。 図において、1,10はリード、2は封止樹脂
、3は半導体素子である。なお、図中、同一符号
は同一または相当部分を示す。
半導体装置を示す斜視図及び断面図、第2図はこ
の考案の他の実施例による半導体装置を示す断面
図、第3図はこの考案の他の実施例による半導体
装置を示す斜視図、並びに第4図、第5図及び第
6図は各々従来の半導体装置を示す斜視図である
。 図において、1,10はリード、2は封止樹脂
、3は半導体素子である。なお、図中、同一符号
は同一または相当部分を示す。
Claims (1)
- 半導体素子、この半導体素子の周囲をモールド
するモールド材、及びこのモールド材より外部に
引き出される上記半導体素子のリードを備えるも
のにおいて、上記半導体素子のリード自体は、一
面側を表面に露出させ、他面側を上記モールド材
に固着するよう構成したことを特徴とする半導体
装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2316089U JPH02114947U (ja) | 1989-03-01 | 1989-03-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2316089U JPH02114947U (ja) | 1989-03-01 | 1989-03-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02114947U true JPH02114947U (ja) | 1990-09-14 |
Family
ID=31241923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2316089U Pending JPH02114947U (ja) | 1989-03-01 | 1989-03-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02114947U (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6355448B2 (ja) * | 1981-12-02 | 1988-11-02 | Diesel Kiki Co |
-
1989
- 1989-03-01 JP JP2316089U patent/JPH02114947U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6355448B2 (ja) * | 1981-12-02 | 1988-11-02 | Diesel Kiki Co |