JPH0252443U - - Google Patents
Info
- Publication number
- JPH0252443U JPH0252443U JP1988132902U JP13290288U JPH0252443U JP H0252443 U JPH0252443 U JP H0252443U JP 1988132902 U JP1988132902 U JP 1988132902U JP 13290288 U JP13290288 U JP 13290288U JP H0252443 U JPH0252443 U JP H0252443U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- package
- surround
- utility
- scope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000012811 non-conductive material Substances 0.000 claims 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図は本考案の第１の実施例の半導体装置の
パツケージの縦断面図、第２図は本考案の第２の
実施例の半導体装置のパツケージの縦断面図であ
る。 １……リード、２……セラミツクケース、３，
１３……導電板、４……アイランド、５，１２…
…半導体装置、６……ワイヤ、７……キヤツプ、
１１……モールド樹脂。
パツケージの縦断面図、第２図は本考案の第２の
実施例の半導体装置のパツケージの縦断面図であ
る。 １……リード、２……セラミツクケース、３，
１３……導電板、４……アイランド、５，１２…
…半導体装置、６……ワイヤ、７……キヤツプ、
１１……モールド樹脂。
Claims (1)
- 半導体装置のパツケージにおいて非導電性材料
からなる前記パツケージの内側面又は外表面に前
記半導体装置を取り囲むように設けられた導電板
を有することを特徴とする半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988132902U JPH0252443U (ja) | 1988-10-11 | 1988-10-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988132902U JPH0252443U (ja) | 1988-10-11 | 1988-10-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0252443U true JPH0252443U (ja) | 1990-04-16 |
Family
ID=31390290
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988132902U Pending JPH0252443U (ja) | 1988-10-11 | 1988-10-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0252443U (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06254633A (ja) * | 1993-03-08 | 1994-09-13 | Uchinuki:Kk | 打抜き加工装置 |
-
1988
- 1988-10-11 JP JP1988132902U patent/JPH0252443U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06254633A (ja) * | 1993-03-08 | 1994-09-13 | Uchinuki:Kk | 打抜き加工装置 |