JPH0194599A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JPH0194599A
JPH0194599A JP62251930A JP25193087A JPH0194599A JP H0194599 A JPH0194599 A JP H0194599A JP 62251930 A JP62251930 A JP 62251930A JP 25193087 A JP25193087 A JP 25193087A JP H0194599 A JPH0194599 A JP H0194599A
Authority
JP
Japan
Prior art keywords
circuit
data
output
level
counter circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62251930A
Other languages
English (en)
Japanese (ja)
Inventor
Kenji Noguchi
健二 野口
Takeshi Toyama
毅 外山
Shinichi Kobayashi
真一 小林
Nobuaki Ando
安藤　伸朗
Kenji Koda
香田　憲次
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62251930A priority Critical patent/JPH0194599A/ja
Priority to US07/253,001 priority patent/US4958352A/en
Priority to DE3833713A priority patent/DE3833713A1/de
Publication of JPH0194599A publication Critical patent/JPH0194599A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88—Monitoring involving counting

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
JP62251930A 1987-10-05 1987-10-05 半導体記憶装置 Pending JPH0194599A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62251930A JPH0194599A (ja) 1987-10-05 1987-10-05 半導体記憶装置
US07/253,001 US4958352A (en) 1987-10-05 1988-10-04 Semiconductor memory device with error check and correcting function
DE3833713A DE3833713A1 (de) 1987-10-05 1988-10-04 Halbleiterspeichereinrichtung mit einer vorrichtung zum pruefen und korrigieren von fehlern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62251930A JPH0194599A (ja) 1987-10-05 1987-10-05 半導体記憶装置

Publications (1)

Publication Number Publication Date
JPH0194599A true JPH0194599A (ja) 1989-04-13

Family

ID=17230087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62251930A Pending JPH0194599A (ja) 1987-10-05 1987-10-05 半導体記憶装置

Country Status (3)

Country Link
US (1) US4958352A (enrdf_load_stackoverflow)
JP (1) JPH0194599A (enrdf_load_stackoverflow)
DE (1) DE3833713A1 (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179101A (ja) * 2004-12-22 2006-07-06 Fujitsu Ltd 半導体記憶装置
JP2010282725A (ja) * 2010-09-27 2010-12-16 Fujitsu Semiconductor Ltd 半導体記憶装置
JP2012503826A (ja) * 2008-09-26 2012-02-09 マイクロソフト コーポレーション 選択的に軽減を使用してエラーを低減するメモリー管理技術の有効性の評価
JP2013122807A (ja) * 2011-12-09 2013-06-20 Sk Hynix Inc ヒューズ回路

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5262342A (en) * 1988-11-04 1993-11-16 Mitsubishi Denki Kabushiki Kaisha Method of making a semiconductor memory device having error checking/correcting functions
JPH02140700U (enrdf_load_stackoverflow) * 1989-04-20 1990-11-26
JPH03162800A (ja) * 1989-08-29 1991-07-12 Mitsubishi Electric Corp 半導体メモリ装置
JPH0387000A (ja) * 1989-08-30 1991-04-11 Mitsubishi Electric Corp 半導体記憶装置
JP2562068B2 (ja) * 1990-02-16 1996-12-11 三菱電機株式会社 不揮発性半導体記憶装置
JP2830308B2 (ja) * 1990-02-26 1998-12-02 日本電気株式会社 情報処理装置
JP2745252B2 (ja) * 1991-06-24 1998-04-28 三菱電機株式会社 半導体記憶装置
US5361227A (en) * 1991-12-19 1994-11-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US6781895B1 (en) * 1991-12-19 2004-08-24 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5289418A (en) * 1992-02-14 1994-02-22 Extended Systems, Inc. Memory apparatus with built-in parity generation
ES2150430T3 (es) * 1992-06-30 2000-12-01 Siemens Ag Procedimiento para el aseguramiento de los datos en memorias de escritura y de lectura.
WO1995009424A1 (en) * 1993-09-30 1995-04-06 Macronix International Co., Ltd. Automatic test circuitry with non-volatile status write
US5627838A (en) * 1993-09-30 1997-05-06 Macronix International Co., Ltd. Automatic test circuitry with non-volatile status write
DE69423104T2 (de) * 1994-10-31 2000-07-20 Stmicroelectronics S.R.L., Agrate Brianza Fehlernachweis- und Korrekturverfahren in einem mehrstufigen Speicher und Speicher für dieses Verfahren
US5954828A (en) * 1995-01-05 1999-09-21 Macronix International Co., Ltd. Non-volatile memory device for fault tolerant data
JP4148990B2 (ja) * 1995-01-05 2008-09-10 マクロニクス インターナショナル カンパニー リミテッド エラー許容データのための不揮発性メモリデバイス
JPH08203278A (ja) * 1995-01-25 1996-08-09 Sony Corp 半導体メモリ
KR19980073924A (ko) * 1997-03-20 1998-11-05 문정환 에러 데이터 수정회로
KR100266748B1 (ko) * 1997-12-31 2000-10-02 윤종용 반도체 메모리 장치 및 그 장치의 에러 정정 방법
US6044479A (en) * 1998-01-29 2000-03-28 International Business Machines Corporation Human sensorially significant sequential error event notification for an ECC system
US6560725B1 (en) * 1999-06-18 2003-05-06 Madrone Solutions, Inc. Method for apparatus for tracking errors in a memory system
US6700827B2 (en) 2001-02-08 2004-03-02 Integrated Device Technology, Inc. Cam circuit with error correction
US7158058B1 (en) 2002-12-09 2007-01-02 Marvell International Ltd. Method and apparatus for generating a seed set in a data dependent seed selector
DE10305008A1 (de) 2003-02-07 2004-08-19 Robert Bosch Gmbh Verfahren und Vorrichtung zur Überwachung einer elektronischen Steuerung
US7193876B1 (en) 2003-07-15 2007-03-20 Kee Park Content addressable memory (CAM) arrays having memory cells therein with different susceptibilities to soft errors
US6870749B1 (en) 2003-07-15 2005-03-22 Integrated Device Technology, Inc. Content addressable memory (CAM) devices with dual-function check bit cells that support column redundancy and check bit cells with reduced susceptibility to soft errors
US6987684B1 (en) 2003-07-15 2006-01-17 Integrated Device Technology, Inc. Content addressable memory (CAM) devices having multi-block error detection logic and entry selective error correction logic therein
US7304875B1 (en) 2003-12-17 2007-12-04 Integrated Device Technology. Inc. Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same
US20080092015A1 (en) * 2006-09-28 2008-04-17 Yigal Brandman Nonvolatile memory with adaptive operation
US8122320B2 (en) * 2008-01-22 2012-02-21 Qimonda Ag Integrated circuit including an ECC error counter
US8582338B1 (en) 2010-08-31 2013-11-12 Netlogic Microsystems, Inc. Ternary content addressable memory cell having single transistor pull-down stack
US8462532B1 (en) 2010-08-31 2013-06-11 Netlogic Microsystems, Inc. Fast quaternary content addressable memory cell
US8625320B1 (en) 2010-08-31 2014-01-07 Netlogic Microsystems, Inc. Quaternary content addressable memory cell having one transistor pull-down stack
US8553441B1 (en) 2010-08-31 2013-10-08 Netlogic Microsystems, Inc. Ternary content addressable memory cell having two transistor pull-down stack
US8837188B1 (en) 2011-06-23 2014-09-16 Netlogic Microsystems, Inc. Content addressable memory row having virtual ground and charge sharing
US8773880B2 (en) 2011-06-23 2014-07-08 Netlogic Microsystems, Inc. Content addressable memory array having virtual ground nodes
US10116336B2 (en) * 2014-06-13 2018-10-30 Sandisk Technologies Llc Error correcting code adjustment for a data storage device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3814922A (en) * 1972-12-01 1974-06-04 Honeywell Inf Systems Availability and diagnostic apparatus for memory modules
US4053751A (en) * 1976-04-28 1977-10-11 Bell Telephone Laboratories, Incorporated Adaptable exerciser for a memory system
US4584681A (en) * 1983-09-02 1986-04-22 International Business Machines Corporation Memory correction scheme using spare arrays
US4612640A (en) * 1984-02-21 1986-09-16 Seeq Technology, Inc. Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array
US4809276A (en) * 1987-02-27 1989-02-28 Hutton/Prc Technology Partners 1 Memory failure detection apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179101A (ja) * 2004-12-22 2006-07-06 Fujitsu Ltd 半導体記憶装置
US7467337B2 (en) 2004-12-22 2008-12-16 Fujitsu Limited Semiconductor memory device
JP2012503826A (ja) * 2008-09-26 2012-02-09 マイクロソフト コーポレーション 選択的に軽減を使用してエラーを低減するメモリー管理技術の有効性の評価
JP2010282725A (ja) * 2010-09-27 2010-12-16 Fujitsu Semiconductor Ltd 半導体記憶装置
JP2013122807A (ja) * 2011-12-09 2013-06-20 Sk Hynix Inc ヒューズ回路

Also Published As

Publication number Publication date
DE3833713A1 (de) 1989-04-20
DE3833713C2 (enrdf_load_stackoverflow) 1990-06-21
US4958352A (en) 1990-09-18

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