JPH01309319A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance element isolation and to reduce heat treatment process after impurity implantation by diffusing impurities having the same conductivity as that of a semiconductor substrate into the semiconductor substrate from a semiconductor film formed on the side wall of an insulating film after an insulating film forming step. CONSTITUTION:With a patterned resist film 4 as a mask, a separating oxide film 7 is etched. The resist film 4 is removed, and polysilicon 10 in which boron having a specified concentration is doped is laminated on the entire surface. Anisotropic etching is performed in the silicon 10, and boron doped polysilicon side walls 11 are formed on both sides of the oxide film 7. The surfaces of the walls 11 are thermally oxidized, and an oxide film 12 is formed. At the same time, boron is diffused in a substrate 1 by a self-aligning method, and a P<+> inversion preventing layer 6 is formed. In this way, accuracy in element isolation is enhanced, and heat treatment process after impurity implantation is reduced.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention relates to a method for manufacturing a semiconductor device,
In particular, it relates to element isolation methods necessary for higher integration and miniaturization of LSIs.

[Conventional technology]

Figure 2 shows an example of the conventional element isolation method.
(local oxidation of 5ilic
(abbreviation for on) is a process cross-sectional view of the separation method.

In FIG. 2(a), an oxide film 2 and a nitride film 3 are laminated on a P-type silicon substrate 1. In FIG. 2(b), a photoresist 1 (ion) is used as a main mask material by vacuuming in a region corresponding to a region where an element is to be formed, and the remaining region -0 and other regions are referred to as field regions.

Using this Al-resist L-/I as a mask, P-type ions 5, such as a bone for a p-flannel car protection, are implanted. In FIG. 2(C), this photoresist 1~
The nitride film 3 is etched using the mask 4 as a mask, leaving the nitride film 3 only on the die IVi where the device is to be formed. In FIG. 2(d), photoresists 1 to 4 are removed and, for example, 0/H20
Nails are oxidized at about 1000°C in an atmosphere. Since the nitride film 3 has strong oxidation resistance, the region under it where elements are formed is hardly oxidized, and only the field region is oxidized.
Isolation oxide film 7 is formed. Since the isolation oxide film 7 is relatively thick, a bird's beak 8 is generated between the isolation oxide film 7 and the oxide film 2. Further, the implanted ions 5 are diffused, and a P 2 inversion prevention layer 6 is formed. At 43 in FIG. 2(0), the nitride film 3 is removed and the oxide film 2 underneath is etched to expose the silicon substrate 1 and form the element forming region 9. It is possible to form the necessary elements in that area. The element formation region 9 is separated from an adjacent element formation region (not shown) by an isolation oxide film 7 and a P inversion prevention layer 6 formed on both sides.

Isolation oxide film7. The wiring in the P1 inversion prevention 111 layer 6 and the isolation oxide film 7 (not shown) respectively constitute the gate oxide film of the parasitic MOS transistor, the But7 channel region, and the electrode. If the isolation oxide film 7 is sufficiently thick and the concentration of impurities of the same conductivity type as the silicon substrate 1 in the P+ inversion prevention layer 6 is sufficiently high, the parasitic MOS transistor is unlikely to be activated and good isolation characteristics can be obtained.

[Problems that the invention attempts to solve]

In the LOCO8 isolation method, which is a conventional semiconductor device manufacturing method, the isolation oxide film 7 is formed by oxidizing the field region using the nitride film 3 as a mask as described above, so the thicker the isolation oxide film 7 is, the more big bird's beak 8
There is a problem in that the cell area of the element forming region 9 is reduced.

In addition, during oxidation of the field region or after long-term heat treatment, boron in the P+ inversion prevention layer 6 is sucked up into the isolation oxide film 7, and the surface concentration of boron in the P+ inversion prevention layer 6 becomes extremely low. However, there were also problems in that it was difficult to control the desired boron concentration and good separation characteristics could not be obtained.

This invention was made to solve the above-mentioned problems, and improves the accuracy of element isolation by using J3 to avoid creating wasted areas within the chip area, as well as controlling the diffusion of impurities into the semiconductor substrate. The present invention aims to provide a method for manufacturing a conductor device that can obtain a desired impurity profile.

[Failure to solve the problem]

The method for manufacturing a semiconductor device according to the present invention includes the steps of forming an insulating film on the main surface of a semiconductor substrate, patterning the insulating film, and introducing impurities of the same conductivity type as the 142g body substrate. a step of actually forming a semiconductor film;
The semiconductor film is removed from the sidewall portion of the patterned insulating film by anisotropic etching, and impurities of the same conductivity type as the semiconductor substrate are removed from the semiconductor film. The method includes a step of diffusing and covering the semiconductor substrate.

(Function) In the method for manufacturing a conductive device according to the present invention, after the step of forming an insulating film on the main surface of a semiconductor substrate, a semiconductor film formed on the side wall of the insulating film is formed to have the same conductivity type as the semiconductor substrate. Since the step of diffusing impurities into the semiconductor substrate is performed, the heat treatment after implanting the impurities is less.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
Figure 1 shows a device isolation method according to an embodiment of the present invention. In FIG. 1(()), the isolation oxide film 7 is etched using the patterned resist 4 as a mask.In FIG. 1(C), the resist 4 is removed,
Polysilicon 10 doped with boron at a desired concentration
are actually laminated. In FIG. 1(d), polysilicon 10 is anisotropically etched to form boron-doped polysilicon sidewalls 11 on both sides of fluoride film 7. As shown in FIG. At J3 in FIG. 1(C), the surface of the boron-doped polysilicon sidewall A-11 is thermally oxidized to form an oxide film 1.
At the same time as the P+ inversion prevention layer 6 is formed, boron is diffused into the semiconductor substrate 1 by self-alignment. Depending on the settings such as the width of the isolation oxide film 7, the depth of the bone, and the thermal diffusion time, after FIG. Inversion prevention layer 6
You can also get In FIGS. 1(e) and 1(f), the outside of the P+ inversion prevention F3J6 becomes the element formation region 9 adjacent to each other, and the N+
The source and drain of the mold are formed.

As described above, according to this embodiment, the isolation oxide film 7 is made by patterning, so
The bird's beak 8 in J3 is not generated in the O8 separation method, and therefore the cell area of the element forming region 9 is not reduced.

Furthermore, compared to the formation of the 1-field oxide film 7 shown in FIG. 2(d), the formation of the poly-oxide film 12 shown in FIG. 1(0) is completed by heat treatment in a shorter time.

Therefore, the surface concentration of boron is 'A?' due to seepage into the isolation oxide film 7. <', the isolation characteristic f1 does not deteriorate, and the width of the isolation oxide film 7 can be precisely controlled by patterning.
It is also possible to obtain two [)1 inversion prevention layers 6 as shown in f). In patterning the oxide film 7 roughly shown in FIG. 1(b), if isotropic etching is used, it is possible to obtain the oxide film 7 with a size 1i11 smaller than the mask dimension.

In the above embodiment, the adjacent N f-tz channel 1 to the element forming region 9 forming the source and drain of the transistor
Isolation oxide film 7 and P4 inversion prevention layer 6 for isolating
However, in the case of the opposite conductivity type, instead of the boron-doped polysilicon sidewall 11, a polysilicon sidewall 4- doped with arsenic or phosphorous is used.
By forming a layer, an N+ inversion prevention layer can be created, and thereby it is also possible to separate regions forming the sources and drains of adjacent P-channel transistors with good characteristics.

〔Effect of the invention〕

As described above, according to the present invention, after the step of forming an insulating film on the main surface of the semiconductor substrate, impurities of the same conductivity type as the semiconductor substrate are removed from the semiconductor film formed on the side walls of the insulating film. y? in element isolation because it is diffused into ■ culm. It is possible to obtain a method for manufacturing a semiconductor device that increases the i degree, does not create a wasted area within the chip area, and can control the diffusion of impurities into the semiconductor substrate and obtain a desired impurity profile.

[Brief explanation of the drawing]

FIG. 1 is a process sectional view showing an element isolation method, which is a semiconductor device manufacturing method according to an embodiment of the present invention, and FIG. 2 is a process sectional view showing an element isolation method, which is a conventional semiconductor device manufacturing method. It is. In the figure, at J3, 1 is a silicon substrate, 6 is an IP+inversion prevention layer, 7 is an isolation oxide film, 9 is an element formation region, 11 is a boron-doped polysilicon layer, and 12 is an oxide film. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) A method for manufacturing a semiconductor device, comprising: forming an insulating film on a main surface of a semiconductor substrate; patterning the insulating film; and introducing an impurity of the same conductivity type as the semiconductor substrate. forming a semiconductor film on the entire surface; performing anisotropic etching on the semiconductor film so as to leave only a sidewall portion of the patterned insulating film and remove the other portion; and forming the semiconductor film on the semiconductor substrate. and diffusing impurities of the same conductivity type into the semiconductor substrate.