JPH01139439U - - Google Patents
Info
- Publication number
- JPH01139439U JPH01139439U JP3593788U JP3593788U JPH01139439U JP H01139439 U JPH01139439 U JP H01139439U JP 3593788 U JP3593788 U JP 3593788U JP 3593788 U JP3593788 U JP 3593788U JP H01139439 U JPH01139439 U JP H01139439U
- Authority
- JP
- Japan
- Prior art keywords
- base
- ceramic
- periphery
- cap
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims 3
- 239000005394 sealing glass Substances 0.000 claims 1
- 239000011521 glass Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
Landscapes
- Measuring Fluid Pressure (AREA)
Description
第１図は本考案の一実施例のパツケージのみの
断面図、第２図は要部の拡大断面図、第３図及び
第４図は夫々異なる他の実施例の要部の断面図、
第５図は従来構造の一部の断面図である。
１……セラミツクベース、２……セラミツクキ
ヤツプ、１ａ，２ａ……面取部、３……低融点ガ
ラス、４……凹部、５……溝、６……内溝。
FIG. 1 is a sectional view of only the package of one embodiment of the present invention, FIG. 2 is an enlarged sectional view of the main part, and FIGS. 3 and 4 are sectional views of the main parts of other different embodiments.
FIG. 5 is a cross-sectional view of a part of the conventional structure. DESCRIPTION OF SYMBOLS 1... Ceramic base, 2... Ceramic cap, 1a, 2a... Chamfered portion, 3... Low melting point glass, 4... Concave portion, 5... Groove, 6... Inner groove.
Claims (1)
前記半導体素子等を封止するように前記ベース上
に被着されてその周辺部において封止ガラスによ
りベースに固着されるセラミツクキヤツプとで構
成され、前記ベースとキヤツプには夫々対向する
固着面の周縁に凹部を形成したことを特徴とする
半導体装置のセラミツクパツケージ。 A ceramic base on which semiconductor elements etc. are mounted,
and a ceramic cap that is attached to the base so as to seal the semiconductor element, etc., and is fixed to the base by sealing glass at the periphery thereof, and the base and the cap each have opposing fixing surfaces. A ceramic package for a semiconductor device, characterized in that a recess is formed at the periphery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3593788U JPH01139439U (en) | 1988-03-18 | 1988-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3593788U JPH01139439U (en) | 1988-03-18 | 1988-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01139439U true JPH01139439U (en) | 1989-09-22 |
Family
ID=31262565
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3593788U Pending JPH01139439U (en) | 1988-03-18 | 1988-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01139439U (en) |
-
1988
- 1988-03-18 JP JP3593788U patent/JPH01139439U/ja active Pending