JPS6448037U - - Google Patents

Info

Publication number
JPS6448037U
JPS6448037U JP14397887U JP14397887U JPS6448037U JP S6448037 U JPS6448037 U JP S6448037U JP 14397887 U JP14397887 U JP 14397887U JP 14397887 U JP14397887 U JP 14397887U JP S6448037 U JPS6448037 U JP S6448037U
Authority
JP
Japan
Prior art keywords
central portion
seal ring
ceramic substrate
multilayer ceramic
outer periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14397887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14397887U priority Critical patent/JPS6448037U/ja
Publication of JPS6448037U publication Critical patent/JPS6448037U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aおよびbはそれぞれ本考案の一実施例
の縦断面図およびキヤツプ取付け時の拡大縦断面
図、第2図aおよびbはそれぞれ従来の一例の縦
断面図およびキヤツプ取付け時の拡大縦断面図で
ある。 1……多層セラミツク基板、2……シールリン
グ、3……キヤツプ。
Figures 1a and b are a vertical cross-sectional view of an embodiment of the present invention and an enlarged vertical cross-sectional view when the cap is installed, and Figures 2 a and b are a vertical cross-sectional view and an enlarged vertical cross-sectional view of a conventional example when the cap is installed, respectively. It is a front view. 1...Multilayer ceramic substrate, 2...Seal ring, 3...Cap.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 上面にLSIチツプを実装する中央部分と、そ
の外周部にシールリングとを有し、このシールリ
ング上にキヤツプを封着する多層セラミツク基板
において、前記外周部上面を中央部分上面より一
段低い位置とし、この外周部に取付けられたシー
リング上面も中央部分上面より低い位置にあるよ
うにしたことを特徴とする多層セラミツク基板。
In a multilayer ceramic substrate having a central portion on which an LSI chip is mounted and a seal ring on the outer periphery thereof, and a cap is sealed onto the seal ring, the upper surface of the outer periphery is positioned one step lower than the upper surface of the central portion. A multilayer ceramic substrate characterized in that the upper surface of the sealing member attached to the outer peripheral portion is also located at a lower position than the upper surface of the central portion.
JP14397887U 1987-09-21 1987-09-21 Pending JPS6448037U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14397887U JPS6448037U (en) 1987-09-21 1987-09-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14397887U JPS6448037U (en) 1987-09-21 1987-09-21

Publications (1)

Publication Number Publication Date
JPS6448037U true JPS6448037U (en) 1989-03-24

Family

ID=31411282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14397887U Pending JPS6448037U (en) 1987-09-21 1987-09-21

Country Status (1)

Country Link
JP (1) JPS6448037U (en)

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