JPH01125848A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To make it possible to form a wiring stronger against an electromigration by a method wherein a wiring layer is contrived so as to be connected to a contact part through a metal film for wiring at the contact part and without interposing a film containing a high-melting point metal between the contact part and the wiring layer. CONSTITUTION:A wiring layer (AICu film) 9, which is constituted of a metal film for wiring and a film containing a high-melting point metal, is connected to a contact part without interposing the film (TiN film) 7 containing a high- melting point metal between the contact part and the layer 9. Accordingly, an interruption of the feeding of the constituent elements of the metal film for wiring, which is caused by the film 7 at the contact part, is dissolved and the constituent elements are fed at any time with their shift. Thereby, with a wiring, which is strong against an electromigration and is difficult to be disconnected, obtained, a wiring of a semiconductor device can be made further fine and a more microscopical formation and a higher integration are contrived in an LSI and so on.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to a semiconductor device and a method for manufacturing the same, and in particular to a multilayer wiring technology for stacking metal wiring such as power supply lines of semiconductor devices that are becoming more highly integrated and miniaturized. For the purpose of forming metal interconnects that are resistant to In the first manufacturing method, a first wiring metal film is formed on an insulating film formed on a semiconductor substrate. forming and patterning to form a first wiring layer; forming an interlayer insulating film on the wiring and then forming a high melting point metal-containing film on the interlayer insulating film; A step of etching both the metal-containing film and the interlayer insulating film to form a contact hole for drawing out the wiring, and further forming a second wiring metal film on the high-melting point metal-containing film, followed by patterning. The second manufacturing method includes at least a step of forming a second wiring layer, and the second manufacturing method includes a first wiring metal film and a refractory metal-containing film on an insulating film formed on a semiconductor substrate. After sequentially laminating the films, the wiring metal film and the high melting point metal-containing film are patterned together to form a first wiring layer, and an interlayer insulating film is formed on the wiring layer. , the living room insulating film and the high melting point metal-containing film were prepared by J!
A configuration comprising at least the steps of: forming a contact hole through continuous etching to draw out the first metal film for wiring; and forming a second metal film for wiring on the interlayer insulating film. do.

[Industrial Field of Application] The present invention relates to a semiconductor device and a method for manufacturing the same. More specifically, the present invention relates to a multilayer interconnection technique for stacking metal interconnections for power supply lines of semiconductor devices that are becoming increasingly highly integrated and miniaturized.

[Prior Art] One of the causes of defects in metal wiring in semiconductor devices is disconnection of metal wiring due to electromigration. Therefore, it is necessary to form wiring that is resistant to electromigration. At present, it is known that when a metal wiring has a multilayer structure with a film containing a high-melting point metal, a wiring that is resistant to electromigration can be formed. Conventionally, as a solution to the above-mentioned problem, there is a method of forming a high melting point metal-containing film on the E layer, the lower layer, or the upper layer and the D layer of the metal wiring to make the wiring a multilayer structure. It has a two-layer structure with a high melting point metal-containing film attached to the lower layer.

Currently, metal materials for wiring in semiconductor devices include AI or AI.
alloys (AI-1% S1, AI-2% Cu, etc.) are mainly used. In addition, high melting point metal materials include T1, W
, NO, TiN, TIW, TiSi, WSi,
MOS1 etc. are used. Hereinafter, two conventional examples will be described in which AI is used as the wiring metal and TIN is used as the high melting point metal.

Regarding the first conventional example, FIG. 3 is an explanatory diagram of a multilayer wiring process according to a conventional manufacturing method in the case where the wiring layer consists of two layers formed by stacking an AI film on a TJv. In the figure, 31 is a semiconductor substrate, 32 is an insulating film,
33.36 is an AI film, 34 is an interlayer insulating film, 35 is a TiN film.
It is a membrane.

An insulator formed on the semiconductor substrate 31 [a first
An A1 film 33 is formed and patterned to form a first layer of wiring, and an interlayer insulating film 34 is formed on the wiring (FIG. 3(a)). Electrodes, etc. are omitted in the diagram. .

Next, the interlayer insulating film 34 is etched to open a contact hole for drawing out the first layer wiring (see FIG.
b)).

Further, on this interlayer insulating film 34, T, N11235, second
After sequentially interlayering the AI films 36 of 2 and 3, patterning is performed.
A layer of wiring is formed ((C) in the same figure).

Also, regarding the second conventional example, contrary to the above example, A1
A multilayer wiring process performed on a 2q structure wiring in which a TAN film is formed on the upper layer of the wiring will be described with reference to FIG. In the same figure, 41 is a semiconductor substrate, 42 is an insulating film, 43.46
is an AI film, 44 is an interlayer insulating film, and 45.47 is a TiN film.

A first film is formed on the insulating film 42 formed on the ball of the semiconductor substrate 41.
A TAN film 4 is formed on the AI film 43.
5 is formed and patterned to obtain the first layer wiring (FIG. 2(a)).

An interlayer insulating film 44 is formed on the ^l wiring, and a contact hole is formed by selectively etching the interlayer insulating film 44 (FIG. 4(b)).

Furthermore, a second AI film 46 is formed on this living room insulating film 44, and a TiN film 47 is formed on this A1 film 46 and then patterned to form a second layer of wiring (FIG. 3(C)). ).

These steps are repeated to form multilayer wiring on the semiconductor substrate.

[Problems to be Solved by the Invention] Generally, when a current is passed through a metal wiring, metal atoms constituting the metal wiring move in a direction opposite to the direction of the current due to collisions with electrons. In this phenomenon, the amount of movement of the atoms constituting the wiring metal is much larger than the amount of movement of the atoms constituting the high melting point metal, and the total bending of the wiring at the contact part is high in the wiring formed with the conventional manufacturing power D:. They are connected via a film containing a melting point metal. Therefore, when the wiring metal constituent source F moves along the flow of electrons in the contact area, the high melting point metal-containing film blocks the supply of wiring metal constituent atoms from the other wiring layer, and the wiring metal source F moves along the flow of electrons. There is a problem in that a gap is created between the bonding surface between the film and the high-melting point metal-containing film, causing wire breakage.

This situation is shown in FIG. 51.53.81 in the figure
．． 63 is a metal film for wiring, and 52.62 is a film containing a high melting point metal.

[Means for Solving the Problems] The present invention is intended to solve the above problems, and includes forming and patterning a first wiring metal film on an insulating film formed on a semiconductor substrate. a step of forming a first wiring layer on the wiring; a step of forming an interlayer insulating film on the wiring; and then forming a refractory metal-containing film on the interlayer insulating film; After etching the interlayer insulating film together to form a contact hole for drawing out the interconnection mentioned above, and forming a second interconnection metal film on the high melting point metal containing film mentioned above, patterning is performed to form the second layer. 1. A method of manufacturing a semiconductor device, comprising at least the step of forming a wiring layer.

Alternatively, after sequentially laminating a first wiring metal film and a high melting point metal-containing film on an insulating film formed on a semiconductor substrate,
A step of forming a first wiring layer by buttering the metal film for wiring and 1 gB containing the high melting point metal, a step of forming a living room insulation film on F of the wiring layer, and a step of forming the interlayer insulation. A step of continuously etching the film and 1 gI containing the high melting point metal to form a contact hole for drawing out the first metal film for wiring, and a step of forming a second metal film for wiring on the interlayer insulation crotch. and a semiconductor device manufactured by the above manufacturing method, comprising an interlayer insulating film, a wiring layer consisting of a high melting point metal-containing film and a wiring metal film, The problem is solved by a semiconductor device characterized in that the wiring layer is connected to the wiring metal film at the contact portion without intervening the high melting point metal-containing film.

[Function] According to the present invention, a wiring layer composed of a wiring metal film and a high-melting point metal-containing film is connected to the contact portion without interposing the high-melting point metal-containing film. According to the wiring metal film structure Jji, the supply cutoff of atoms is eliminated, and the atoms constituting the wiring metal film can be supplied at any time as they move. Therefore, a wiring that is resistant to electromigration and difficult to break can be obtained.

[Example] FIG. 1 shows an example of the first manufacturing method, in which A fil
FIG. 2 is an explanatory diagram of a process for forming multilayer wiring in a semiconductor device having a wiring layer in which a TiN film is formed under a l:u film. In the same figure, l is a Si substrate, 2 is S10? membrane, 3.6,9
is A IC: u film, 4.8 is interlayer insulating film, 5°7 is Ti
It is an N film.

1. The first layer is placed on the Slz film 2 formed on the Si substrate l.
After forming the A ICu film 3 to a thickness of about Igm by sputtering, it is patterned into a predetermined shape by a resist process and a dry etching process to form a first wiring layer (FIG. 2(a)).

■9 Next, apply an interlayer insulating film 4 on the above wiring layer at 5QOOA.
A TiN film 5 with a thickness of 1000 A or more is formed thereon (FIG. 3(b)).

(2) A resist film (not shown) is further formed and patterned. Using the resist film as a mask, the T and N films 5 and the interlayer insulating film 4 are selectively etched to form contact holes. The resist film is removed (FIG. 3(c)).

(2) Then, a second AlCu film 6 is formed on this film by high-temperature bias sputtering to have a flat lpm, and then patterned into a predetermined shape by a resist process and a dry etching process to form a second wiring layer. ((d) in the same figure)
.

Furthermore, the above steps (1) to (2) are repeated to form a multilayer wiring (FIG. 6(e)).

Moreover, FIG. 2 is a process explanatory diagram relating to an example of the manufacturing method of 52. In the same figure, 11 is SI') & plate, 12
is S+OJQ, 13.16.19 is AlCu film.

14.18 is an interlayer insulating film, and 15.17 is an IN film.

1, Si, l plate 11 (7) Upper D type JILE Saleta S+
02vl 2 (7) A first A ICu film 13 with a thickness of about lpm is formed by sputtering, and then TIMl 5
After forming 100 OA or less, it is patterned into a predetermined shape by a resist process and a dry etching process.
A third wiring layer is formed ((&) in the same figure).

(2) Next, an interlayer insulating film 14 is formed on the wiring layer at a temperature of 500
A resist pattern (not shown) is formed and patterned to form a contact hole. Using the resist a as a mask, the interlayer insulating film 14 is selectively etched (see FIG.
b)).

(2) Continuously, the TI film 15 is also selectively etched to provide a contact hole for drawing out the first Alcu film 13. The resist film is removed (FIG. 3(c)).

(2) Then, on top of this, a second Alcu film is formed evenly by a 6-temperature bias sputtering method, and then #
After forming the AlCuAlCu film 1TiN film 17, it is patterned into a predetermined shape by a resist process and a dry etching process to form a second wiring layer (see (d) in the same figure).
)).

Furthermore, the above steps (1) to (2) are repeated to form a multilayer wiring (FIG. 6(e)).

In this way, in the contact part of multilayer wiring, A IC
Since the u film is connected without intervening the TAN film, a wiring that is resistant to electromigration and difficult to break can be formed. Therefore, it is effective in improving the reliability of semiconductor devices such as ICs.

[Effects of the Invention] According to the present invention, a wiring strong against electromigration can be formed, which is effective in improving reliability. Further, while maintaining the same level of reliability as before, the wiring of semiconductor devices can be made even thinner, which is effective in achieving further miniaturization and higher integration in LSIs and the like.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the multilayer wiring produced by the first manufacturing method, and FIG. 2 is an explanatory diagram of the multilayer wiring produced by the second manufacturing method.
Figure I and Figure 3 are process explanations for multilayer interconnection using the first conventional method14.
FIG. 4 is an explanatory diagram of the process of multilayer wiring according to the second conventional method, and FIG. (Explanation of symbols) 1.11...S+, u plate, 2.12...540zl film, 3.6.9.13.16.19=AIGu film, 4.8
．． 14.18.34.44...Interlayer insulating film, 5.7.15.17.35.4.5.47...DIN
Film, 31.41... Semiconductor substrate, 32.42... Insulation I81. 33.36.43.46...AI film. 51.53.61.63...Metal film for wiring, 52.6
2... High melting point metal-containing film. (e) Tsukei 1 gu V 过Min L + teru. 5/＠Hinoki Narrow σ Ronio Boat I7 Figure 1 (at. 2) ＼ r〇(i:+) /47TiN 茁 4 Figure f Dou no Biao (Kaki) Ikura Takezo (b) Figure 5

Claims (3)

[Claims] (1) In a semiconductor device having an interlayer insulating film, and a wiring layer consisting of a film containing a high melting point metal and a metal film for wiring, the wiring layer has a contact portion where the metal film for wiring is interposed with the film containing a high melting point metal. A semiconductor device characterized in that the semiconductor device is connected without any connection. (2) forming a first wiring metal film on an insulating film formed on a semiconductor substrate and patterning it to form a first wiring layer; forming an interlayer insulating film on the wiring; Next, a step of forming a high-melting point metal-containing film on the interlayer insulating film, a step of etching both the high-melting point metal-containing film and the interlayer insulating film to form a contact hole for drawing out the wiring, A method for manufacturing a semiconductor device, comprising at least the step of forming a second wiring metal film on a melting point metal-containing film and then patterning to form a second wiring layer. (3) After sequentially laminating the first wiring metal film and the high melting point metal-containing film on the insulating film formed on the semiconductor substrate,
forming a first wiring layer by patterning the wiring metal film and the refractory metal-containing film; forming an interlayer insulating film on the wiring layer; and forming a first wiring layer on the wiring layer; At least a step of continuously etching the high-melting point metal-containing film to form a contact hole for drawing out the first wiring metal film, and a step of forming a second wiring metal film on the interlayer insulating film are performed. A method for manufacturing a semiconductor device, comprising: