JPH01125847A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To make it possible to form a wiring stronger against an electromigration by a method wherein at least the upper and lower surfaces of a buried metal film in a contact hole are surrounded with films containing a high-melting point metal. CONSTITUTION:A buried metal film (AICu film) 7 in a contact hole is formed into a structure, wherein at least the upper and lower surfaces of the film 7 are surrounded with a film 5 and a film (TiN film) 8, which contain a high- melting point metal. Accordingly, the film 7 in the contact hole is fixed by the films 5 and 8 formed on the upper and lower parts of the film 7. As a result, as the shift of buried metallic atoms due to the collision of electrons is inhibited, such a trouble that a gap is generated in the junction surfaces between the film 7 and the films 5 and 8 is eliminated. Thereby, a wiring, which is strong against an electromigration and is hard to be disconnected, is obtained.

Description

[Detailed Description of the Invention] [J! The present invention relates to a semiconductor device and its manufacturing method, and in particular to a multilayer wiring technology for stacking metal wiring such as power supply lines in semiconductor devices that are becoming increasingly highly integrated and miniaturized. In a semiconductor device having an interlayer insulating film, a wiring layer consisting of a high-melting point metal-containing film and a wiring metal film, and a contact hole-embedded metal film, at least the earthwork surface of the buried metal film in the contact hole is F. In the first manufacturing method, after laminating the high melting point metal film on the metal crotch for wiring on the conductor base, A process of patterning a metal film for wiring and a high melting point metal-containing film described in L to form one layer [1 wiring, forming an interlayer insulating film on the wiring, and then forming a contact hole in the interlayer insulating film. Then, there is a step of forming a buried metal film to fill the inside of the contact hole, and a second wiring layer is formed by sequentially laminating a film containing a high melting point metal and a metal film for wiring on the substrate that has been subjected to the above steps. In the second manufacturing method, an interlayer insulating film is formed on the first wiring metal film formed on the semiconductor substrate, and then the interlayer insulating film is a step of providing 57 tact holes in an insulating film; a step of forming a refractory metal-containing film on the interlayer insulating film, and then filling the inside of the contact hole with a buried metal film;
After sequentially laminating a high-melting point metal-containing film and a wiring metal film on the substrate that has been subjected to the above steps, the high-melting point metal-containing film and the wiring metal film are patterned to form a two-layer wiring. The method includes at least step i.

[Industrial Application Yf] The present invention relates to a semiconductor device and a manufacturing method thereof. More specifically, the present invention relates to multilayer wiring technology for stacking metal wiring such as power supply lines for conductor devices that are becoming increasingly highly integrated and miniaturized.

[Conventional Techniques] One of the causes of defects in metal wiring in conductor devices is disconnection of metal wiring due to electromigration. Therefore, it is necessary to form wiring that is resistant to electromigration. It is currently known that when a metal film for wiring is grown on a film containing a high melting point metal, a thin film having an m-dense crystal structure can be obtained and a wiring resistant to electromigration can be formed. Conventionally, as a solution to the above-mentioned problems, a method has been adopted in which a wiring metal film is formed on top of a film containing a high melting point metal to form a multilayered wiring structure.

Currently, wiring metal materials mainly include AI or AI-based alloys (
AI-1%Si, Al-2%Cu, etc.) are used. On the other hand, high melting point metal materials have T1. W,! llo, Ti
N, T+W, TiS+, WSi, Ans1, etc. are used. In addition, sputtering is mainly used to form the thin film.

Below, we will explain the process of forming multilayer wiring according to the main conventional example.
do. First, a first conventional example will be explained with reference to FIG. In the figure, 31 is a conductor board.

32.35 is an interlayer insulating film such as PSG film, 33.36 is T
iN, film containing high melting point metal such as Ti, 34.37 is A
I, AIC: u″!f- wiring metal film.

Interlayer insulation Il! is applied to E of the first wiring metal film 34 formed on L of the conductive substrate 31! 235 is formed, a resist film is formed on the interlayer insulating film 36, and the L interlayer insulating film is selectively etched using the resist film as a mask to form a contact hole (FIG. 3(a)).

Next, a high-melting point metal-containing film 36 and a wiring metal film 37 are sequentially formed on the interlayer insulating film 35 by sputtering, and are patterned into a predetermined shape by a resist process and an etching process to form a wiring (see (b) in the same figure). )).

Next, a second conventional example will be explained with reference to FIG.

In the same figure, 41 is a semiconductor substrate, 42.45 is a PSG
An interlayer insulating film such as a film, 43.46 is a Tie.

TlkS- refractory metal-containing film, 44.47 is A1, A
A wiring metal film such as lc:u, and a buried metal film 48 such as A1 or ^lcu.

An interlayer insulating film 45 is formed on the first wiring formed on the semiconductor substrate 41 by sputtering or the like, and a resist process, patterning, and selective etching are performed on the interlayer insulating film 45 to form contact holes. ((a) in the same figure)
.

Next, a buried metal film 48 is formed thereon, and then the surface of the substrate is made flat by boring. Furthermore, a high-melting point metal-containing film 46 and wiring metal 11g4 are sputtered on top of this.
7 are sequentially formed, and patterned through a resist process and an etching process to form wiring (FIG. 2(b)).

Multilayer wiring is formed by repeating the above steps.

[Problems to be Solved by the Invention] Generally, when a current is passed through a metal wiring, metal atoms constituting the metal wiring move in a direction opposite to the direction of the current due to collisions with electrons. In this phenomenon, the amount of movement of the atoms constituting the wiring metal is much larger than the amount of movement of the atoms constituting the high melting point metal, and in wiring formed by conventional manufacturing methods, the wiring metal contains a high melting point metal at the contact part. connected through a membrane. Therefore, when the wiring metal constituent atoms move along the flow of electrons in the contact area, the high melting point metal-containing film blocks the supply of the wiring metal constituent atoms from the other wiring layer, and the wiring metal film There is a problem in that a gap is generated between the bonding surface of the metal and the high melting point metal-containing film, causing wire breakage.

FIG. 5 is a diagram showing this situation. In FIG. 0, 51.
53.61.63 is a metal film for wiring, 52.62 is a film containing a high melting point metal, and 54.64 is an interlayer insulating film. The same figure (a
) is the case when a current is passed in the direction from the upper wiring metal film 53 to the 'F layer wiring metal film 51 in the multilayer wiring formed by the normal sputtering method, and (b) is the case when the polishing embedding method is applied. The figure shows how the wiring metal causes electromigration and breaks when a current is passed from the lower wiring metal film 61 to the upper wiring metal film 63 in the multilayer wiring formed by ing. Note that the mesh portion in the figure indicates the disconnection portion.

[Means for Solving the Problems] The above problem is such that after laminating a high melting point metal-containing film on a wiring metal film on a semiconductor substrate, -h the wiring metal film and the high melting point metal-containing film In the process of patterning and forming the wiring for the first layer, and for the wiring mentioned above, use living room cotton ti! forming a film, then forming a contact hole in the interlayer insulating film, forming a buried metal film to fill the contact hole, and depositing a refractory metal-containing film on the substrate that has been subjected to step 1 above. , a method for manufacturing a semiconductor device comprising at least the step of sequentially laminating metal films for wiring to form a second wiring layer; 1) Forming an interlayer insulating film on the metal film and then providing a contact hole in the interlayer insulating film; 1) Forming a film containing a high melting point metal on the interlayer insulating film, and then filling the inside of the contact hole with a metal film. After sequentially laminating a high-melting point metal-containing film and a wiring metal film on the substrate that has been subjected to the above steps, patterning the high-melting point metal-containing film and the wiring metal film. A method for manufacturing a semiconductor device, comprising at least a step of forming a second layer of wiring; and an interlayer insulating film manufactured by the above manufacturing method;
A high melting point metal base, a wiring layer consisting of a film and a metal film for wiring,
The present invention is solved by a semiconductor device having a structure in which at least the upper and lower surfaces of the buried metal film in the contact hole are surrounded by the high melting point metal base if film. .

[Function] According to the present invention, the buried metal film in the contact hole is fixed by the refractory metal-containing films formed above and below it.

As a result, movement of the embedded metal atoms due to electron collisions is suppressed, so that no gap is created at the bonding surface between the embedded metal and the high melting point metal-containing film. Therefore, a wiring that is resistant to electromigration and difficult to break can be obtained.

[Example] FIG. 1 is an explanatory diagram of the first manufacturing method of the present invention. In the figure, l is st2! board, 4.7.9 is AI
GullQ, 2.6 is an interlayer insulating film, and 3.5.8° is a T, N film.

1. After laminating 1000 layers of T and N11Q5 on the Alcu film 4 formed on the S+ substrate l, the first wiring layer is formed by patterning into a predetermined shape using a resist process and a dry etching process. ((a) in the same figure).

(7) Next, an interlayer insulating film 6 of 5000 Å is formed on the L wiring, a resist film is formed on the interlayer insulating film 6, and patterning is performed. Using the resist film as a mask, the interlayer insulating film is selectively etched to form a contact hole. The resist film is removed (FIG. 2(b)).

■, Furthermore, the A for embedding is placed on the interlayer insulating film that has gone through the above process.
After forming the ICu film 7 with a thickness of 5000 Å or more, the contact hole is filled with the AlCu film 7 through a polishing process.

(Figure (c)).

(2) Then, on this, a TiN film 8 with a thickness of 100% is applied by sputtering.
0 person, and the second Alcu membrane 9 to Igm 1 to 1
Next form. ((d) in the same figure).

Further, by repeating the steps (1) to (2) in L, a multilayer wiring will be formed. Therefore, one layer of wiring is formed in a three-layer structure with a TiN film formed below.

Moreover, FIG. 2 is a process explanatory diagram according to an embodiment of the second manufacturing method. In the same figure, 11 is S, substrate, 14.17
．． 19 is AlCu1IQ, 12.16 is an interlayer insulating film, 1
3.15.18 is T1NII! It is 2.

(5) Form an interlayer insulating film 16 by sputtering on the first layer of wiring formed on the second side of the substrate 11;
A contact hole is formed by selectively etching the interlayer insulating film through a resist layer l-'I step and a tri-etching step. The above resist pattern 1 is removed (see figure (
a)).

(2) - A T and N film 15 of 1000 Å or less is formed on the interlayer insulating film (FIG. 2(b)).

■, AlCulC for embedding on the TiNllA15 above.
After forming a total u of 1700 Å or more, unnecessary A 1cuy2
17 to make the substrate surface smooth (see figure (C)
)).

■And on top of this is TAN II! u l 8 to 100O
A is formed, and then a second A IGu film 19 is formed to a thickness of 1 gm.

The above wiring layer is subjected to resist process and tri-etching.
The second wiring layer is formed by patterning into a predetermined shape (FIG. 4(d)).

1 of Book L. Multilayer wiring is formed by repeating the steps .about.(2).

In the contact portion of the multilayer wiring formed in this way, the AICu film for filling the contact hole is sandwiched between the T and N films formed on the F plane above it, so AlCu atoms due to electron collisions occur. The moving slope of will decrease. Therefore, a wiring that is resistant to electromigration and difficult to break is formed. Therefore, it is effective in improving the reliability of semiconductor devices such as LSI.

[Effects of the Invention] According to the present invention, a wiring that is stronger against electrovigilance can be formed, which is effective in terms of reliability. Also, the wiring can be made thinner than before, and L
This is effective for further miniaturization and higher integration in SI5.

[Brief explanation of the drawing]

FIG. 1 is a process explanatory diagram of multilayer wiring according to the first manufacturing method, and FIG. 2 is a process explanatory diagram of multilayer wiring according to the second manufacturing method. FIG. 3 is an explanatory diagram of the process of multilayer wiring according to the first conventional method. FIG. 4 is an explanatory diagram of the process of multilayer wiring according to the second conventional method. FIG. It is. (Explanation of symbols) 1.11...Si substrate, 2.6.12.16.32.35.42.45.54.
64...Interlayer insulating film, 3.5.8.13.15.18,...T, Nll! 2
．． 4.7.9.14.17.19-・-AICull!
2, 31.41...Semiconductor, (board, 34, 37, 44, 47, 5 l, 53.61.63
... Metal film for wiring, 33.36.43.46.52.62 ... High melting point metal-containing film. 48...Embedded metal 1 model. Do you want to manage your agent? e override-6,9-・:', J7
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Claims (3)

[Claims] (1) In a semiconductor device having an interlayer insulating film, a wiring layer consisting of a film containing a high melting point metal and a metal film for wiring, and a metal film buried in a contact hole, at least the top and bottom surfaces of the metal film buried in the contact hole are A semiconductor device characterized by a structure surrounded by the above-described high melting point metal-containing film. (2) a step of laminating a refractory metal-containing film on a wiring metal film on a semiconductor substrate, and then patterning the wiring metal film and the refractory metal-containing film to form a first layer of wiring; forming an interlayer insulating film on the wiring, then forming a contact hole in the interlayer insulating film, and filling the contact hole with a buried metal film; A method for manufacturing a semiconductor device, comprising at least the step of sequentially laminating a high melting point metal-containing film and a wiring metal film to form a second wiring layer. (3) Forming an interlayer insulating film on the first wiring metal film formed on the semiconductor substrate, and then providing a contact hole in the interlayer insulating film, and forming a high melting point metal on the interlayer insulating film. After forming the metal-containing film, there is a step of forming a buried metal film to fill the inside of the contact hole, and after sequentially laminating a high melting point metal-containing film and a wiring metal film on the substrate that has been subjected to the above steps, the above-mentioned process is performed. A method for manufacturing a semiconductor device, comprising at least the step of patterning a high melting point metal-containing film and the metal film for wiring to form a second layer of wiring.