JPH08213394A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To provide a semiconductor device and its manufacturing method by which wiring can be formed in a structure having an electromigration resistance without causing any interfacial reaction which consumes an Al alloy layer in a manufacturing process and the shape and contact characteristic of a wiring layer can be maintained even when the wiring layer is buried in a conducting hole. CONSTITUTION: A semiconductor device is provided with a wiring layer having a first conductive layer 14 which is formed on a substrate and composed of a first conductive material, first intermetallic compound layer 16 which is formed on the layer 14 and contains the first metallic element constituting the first conductive material and the second metallic element constituting a second conductive material which is different from the first conductive material, and second conductive layer 18 which is formed on the layer 16 and composed of the second conductive material.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring of a semiconductor device, and more particularly to a semiconductor device which suppresses deterioration of the reliability of the wiring due to electromigration or the like and a method of manufacturing the same.

[0002]

2. Description of the Related Art As semiconductor devices have been highly integrated in recent years, wiring for connecting elements has been miniaturized. For this reason,
The reliability conditions required for wirings are becoming more severe, and it is required to form wirings that are highly resistant to disconnection due to electromigration and the like.

Conventionally, aluminum (Al) alloys have been used for wiring of semiconductor devices because of their low resistivity. When an Al alloy is used as a wiring material, in order to prevent spikes and the like in the contact portion, it is generally performed to connect via a barrier metal such as a titanium nitride (TiN) film. Forming the barrier metal layer under the Al alloy layer in this manner is also desirable for improving electromigration resistance. That is, even if a break occurs in the Al alloy layer due to electromigration, it is possible to prevent the conductivity from being completely impaired by the presence of the barrier metal layer.

However, a TiN film or the like conventionally used as a barrier metal has a high resistivity and is not desirable in miniaturizing the device. Therefore, for example, Japanese Patent Laid-Open No. 2-29
A semiconductor device described in Japanese Patent No. 6334 has been proposed. In the semiconductor device described in Japanese Patent Application Laid-Open No. 2-296334, an Al alloy layer is deposited after depositing a titanium (Ti) film on a base substrate, and a metal between Al and Ti is deposited at the interface between the Al alloy and the Ti film by heat treatment. By forming the compound layer, a low-resistance conductive layer was formed immediately below the Al alloy layer.

[0005]

However, in the semiconductor device described in JP-A-2-296334, the intermetallic compound layer is formed by the reaction between the Al alloy and the Ti film. There is a problem that Al in the layer is consumed and the shape of the Al alloy layer is impaired.

Further, the intermetallic compound layer formed by the reaction contains a compound having a stoichiometrically stable composition and a compound having another composition. There was a problem that the reaction proceeded. Further, the intermetallic compound layer formed by the reaction has a large grain size and is a rough film, so that the interface with the Al alloy layer is disturbed, the crystalline state of Al is disturbed, the electromigration resistance is lowered, and the wire is easily broken. There was such a problem.

Further, in a semiconductor device having a multi-layer wiring, when an Al alloy layer is embedded in a conduction hole formed in an interlayer insulating film and connected to a lower wiring, the underlying TiN film or Ti film reacts with the Al alloy, There is a problem that a gap is formed between the Al alloy in the conduction hole and the TiN film or the shape of the Al alloy layer in the conduction hole is deteriorated. An object of the present invention is to form a structure having electromigration resistance without causing an interfacial reaction that consumes an Al alloy layer in the manufacturing process, and even when the wiring layer is embedded in the conduction hole, It is an object of the present invention to provide a semiconductor device capable of maintaining contact characteristics and a manufacturing method thereof.

[0008]

The above object is to provide a first conductive layer formed on a base substrate and made of a first conductive material,
A first metal element which is formed on the first conductive layer and which constitutes the first conductive material, and a second metal element which constitutes a second conductive material different from the first conductive material. A semiconductor having a wiring layer having a first intermetallic compound layer containing Pt and a second conductive layer formed on the first intermetallic compound layer and made of the second conductive material. Achieved by the device.

Further, in the above semiconductor device, the wiring layer is formed on the second conductive layer, and the second metal element forming the second conductive material and the second conductive material are included. Is a second intermetallic compound layer containing a third metal element forming a different third conductive material, and a third intermetallic compound layer formed on the second intermetallic compound layer and made of the third conductive material.
It is desirable to further have a conductive layer.

Further, a first wiring layer formed on the base substrate and a conductive hole formed on the first wiring layer and connecting the first wiring layer and an upper wiring layer are formed. An interlayer insulating film, a second wiring layer formed on the interlayer insulating film and connected to the first wiring layer in the conduction hole, the first wiring layer in the conduction hole, and the second wiring layer. A first metal element that is formed in the connection portion of the wiring layer and that forms the first wiring layer in the connection portion, and a second metal element that forms the second wiring layer in the connection portion. And a first intermetallic compound layer containing the same.

Also, an interlayer insulation having a first wiring layer formed on a base substrate and a conductive hole formed on the first wiring layer and connecting the first wiring layer and an upper wiring layer. A film, a second wiring layer formed on the interlayer insulating film and connected to the first wiring layer in the conduction hole, and a second wiring layer embedded in the conduction hole, the first wiring layer and the first wiring layer. And a first connecting portion connecting the first wiring layer and the embedded metal to each other, and the first wiring layer is formed in the first connecting portion. And a first intermetallic compound layer containing a first metal element that forms a buried metal and a second metal element that forms the embedded metal.

Further, in the above semiconductor device, a second metal element that is formed in a second connection portion that connects the embedded metal and the second wiring layer and that constitutes the embedded metal, and the second metal element. It is desirable to further have a second intermetallic compound layer containing the third metal element forming the second wiring layer in the connection part of. In the above semiconductor device, the first intermetallic compound layer or the second intermetallic compound layer is preferably a layer formed of a compound having a stoichiometric composition.

In the above semiconductor device, the compound is preferably Al ₃ Ti. In the above semiconductor device, the compound is WAl ₁₂ or W
Al ₆ is desirable. Further, a first conductive layer forming step of forming a first conductive layer made of a first conductive material on a base substrate, and a step of forming the first conductive material on the first conductive layer. An intermetallic compound layer forming step of forming an intermetallic compound layer containing a first metal element and a second metal element constituting a second conductive material different from the first conductive material, and the intermetallic compound layer A second conductive layer forming step of forming a second conductive layer made of the second conductive material, the first conductive layer, the intermetallic compound layer, and the second conductive layer thereon. And a wiring layer forming step of forming a wiring layer by patterning the laminated body having the above.

A first wiring layer having a first conductive layer made of a first conductive material is formed on a base substrate.
Wiring layer forming step, an interlayer insulating film forming step of forming an interlayer insulating film on the base substrate on which the first wiring layer is formed, and the interlayer insulating film on the first wiring layer, First
A conductive hole forming step of opening a conductive hole reaching the wiring layer of
A first metal element forming the first conductive material and a second metal element forming a second conductive material different from the first conductive material on the interlayer insulating film and inside the conduction hole. A first intermetallic compound layer forming step of forming a first intermetallic compound layer including: and, on the first intermetallic compound layer,
Second having a second conductive layer made of the second conductive material
A second conductive layer is formed on the interlayer insulating film, and at the same time the second conductive layer is formed on the interlayer insulating film, and the second conductive layer is embedded in the conductive hole. It is also achieved by the method of manufacturing a semiconductor device.

A first wiring layer having a first conductive layer made of a first conductive material is formed on a base substrate.
Wiring layer forming step, an interlayer insulating film forming step of forming an interlayer insulating film on the base substrate on which the first wiring layer is formed, and the interlayer insulating film on the first wiring layer, First
A conductive hole forming step of forming a conductive hole reaching the wiring layer of
A first metal element forming the first conductive material and a second metal element forming a second conductive material different from the first conductive material on the interlayer insulating film and inside the conduction hole. A first intermetallic compound layer forming step of forming a first intermetallic compound layer including: and, on the first intermetallic compound layer,
A second conductive layer forming step of forming a second conductive layer made of the second conductive material; and a step of forming the second conductive layer and the first intermetallic compound layer formed on the interlayer insulating film. An etch-back step of etching back until reaching the interlayer insulating film and leaving a buried metal made of the second conductive material only inside the conductive hole; and an interlayer insulating in which the buried metal is buried in the conductive hole. And a second wiring layer forming step of forming a second wiring layer connected to the first wiring layer via the embedded metal on the film. To be achieved.

In the method of manufacturing a semiconductor device, the second wiring layer forming step is a second metal which is formed on the interlayer insulating film and the embedded metal and constitutes the second conductive material. A second intermetallic compound forming step of depositing a second intermetallic compound layer containing an element and a third metal element forming a third conductive material different from the second conductive material; A third conductive layer formed on the intermetallic compound layer of and a third conductive layer of the third conductive material is deposited.
It is desirable to have the step of forming a conductive layer.

In the method for manufacturing a semiconductor device described above, an intermetallic compound layer having a stoichiometric composition is formed in the first intermetallic compound layer forming step or the second intermetallic compound forming step. As described above, it is desirable to deposit the intermetallic compound at a temperature of 400 to 500 ° C. and perform heat treatment immediately after depositing the intermetallic compound. Also,
In the method for manufacturing a semiconductor device described above, the heat treatment includes
It is desirable to carry out at a temperature of about 450 ° C. in a vacuum or in an inert gas atmosphere.

[0018]

According to the present invention, the first conductive material made of the first conductive material is used.
A first metal formed on the first conductive layer, the first metal element forming the first conductive material, and the second metal element forming the second conductive material. An intermetallic compound layer,
By forming the wiring layer by the laminated body formed on the first intermetallic compound layer and having the second conductive layer made of the second conductive material, the first layer is formed in the heating step after the wiring layer is formed. Since the conductive layer and the second conductive layer do not directly react and the shape and interface state of the wiring layer can be maintained, electromigration resistance can be improved.

In the above semiconductor device, a second metal element which is formed on the second conductive layer and constitutes the second conductive material, and a third metal element which constitutes the third conductive material. If the wiring layer is formed of a laminate further including a second intermetallic compound layer containing a metal oxide and a third conductive layer formed on the second intermetallic compound layer In addition to improving migration resistance, even when a conductive layer is broken due to electromigration, other conductive layers and intermetallic compound layers function as a path for passing current, preventing complete disconnection of the wiring. It becomes possible.

Further, the first wiring layer, an interlayer insulating film formed on the first wiring layer and having a conductive hole connecting the first wiring layer and the upper wiring layer, and formed on the interlayer insulating film. And a second wiring layer connected to the first wiring layer in the conduction hole and a connection portion between the first wiring layer and the second wiring layer in the conduction hole, and the first wiring in the connection portion. The first of the layers
If a semiconductor device having the above metal element and the first intermetallic compound layer containing the second metal element forming the second wiring layer at the connection portion is configured, the second wiring layer is being deposited or deposited. Even when the heat treatment is performed later, the thermally stable intermetallic compound layer is formed in the conductive hole, so that the second wiring layer and the intermetallic compound layer or the intermetallic compound layer and the first wiring layer are formed. No reaction occurs between the first wiring layer and the second wiring layer, and the contact characteristics of the connecting portion connecting the first wiring layer and the second wiring layer can be maintained.

The first wiring layer, the second wiring layer formed on the first wiring layer via the interlayer insulating film, the conductive hole formed in the interlayer insulating film, and the conductive hole A buried metal that is buried and connects the first wiring layer and the second wiring layer, and a first connection portion that connects the first wiring layer and the buried metal, is formed. If a semiconductor device having a first metal element forming the first wiring layer and a first intermetallic compound layer containing the second metal element forming the buried metal is formed, deposition of the second wiring layer Even when heat treatment is performed during or after deposition, a thermally stable intermetallic compound layer is formed in the through hole, so that the embedded metal and intermetallic compound layer or the intermetallic compound layer and the first metal There is no reaction between the first wiring layer and the second wiring layer. It is possible to maintain the contact characteristics of the connection portion.

Further, the second metal element which is formed in the second connecting portion which connects the embedded metal and the second wiring layer and which constitutes the embedded metal, and the second wiring layer in the second connecting portion are formed. By providing the second intermetallic compound layer containing the constituent third metal element, the contact characteristics of the connecting portion connecting the first wiring layer and the second wiring layer can be maintained, and electromigration or the like can be performed. Even if a disconnection occurs in the second wiring layer, the intermetallic compound layer functions as a path for passing a current, so that it is possible to prevent the wiring from being completely disconnected.

Further, if the above intermetallic compound layer is formed of a compound having a stoichiometric composition, it does not react with the wiring layer or the conductive layer in contact with the intermetallic compound layer, so that the shape of the wiring layer is maintained, It is desirable for improving electromigration resistance. Further, the above intermetallic compound includes Al ₃
Ti can be applied. Further, WAl ₁₂ or WAl ₆ can be applied to the above intermetallic compound.

Further, a step of forming a first conductive layer made of a first conductive material, a first metal element constituting the first conductive material, and a second conductive layer on the first conductive layer. A step of forming an intermetallic compound layer made of a second metal element constituting the material, a step of forming a second conductive layer made of a second conductive material on the intermetallic compound layer, By manufacturing a semiconductor device by a manufacturing method including a step of patterning a laminate having a conductive layer, an intermetallic compound layer, and a second conductive layer, and forming a wiring layer made of the laminate,
Compared to the case where the intermetallic compound layer is formed by the interfacial reaction,
Since it forms an intermetallic compound layer with a fine grain size and a dense film,
A semiconductor device having a wiring layer having excellent electromigration resistance can be manufactured.

In addition, a step of forming a first wiring layer having a first conductive layer made of a first conductive material, and an interlayer insulating film is formed on a base substrate on which the first wiring layer is formed. A step of forming a conductive hole reaching the first wiring layer in the interlayer insulating film on the first wiring layer; and a step of forming a first conductive material on the interlayer insulating film and in the conductive hole. Forming a first intermetallic compound layer composed of the metal element of 1) and a second metal element forming the second conductive material; and forming a first intermetallic compound layer on the first intermetallic compound layer from the second conductive material. A second wiring layer having a second conductive layer is formed, the second wiring layer is formed on the interlayer insulating film, and at the same time, the second conductive layer is embedded in the conductive hole. By manufacturing the device, it is possible to Since thermally interposing a stable intermetallic compound layer comprising a metal element contained in the line layer, it is possible to prevent reaction of the wiring layers by a heat treatment in the subsequent step. Therefore, even when heat treatment is performed during or after the deposition of the wiring layer, the shape of the wiring layer is not disturbed,
The contact characteristics can be maintained.

In addition, a step of forming a first wiring layer having a first conductive layer made of a first conductive material, and an interlayer insulating film is formed on a base substrate on which the first wiring layer is formed. A step of forming a conductive hole reaching the first wiring layer in the interlayer insulating film on the first wiring layer, and a step of forming a first conductive material on the interlayer insulating film and inside the conductive hole. Forming a first intermetallic compound layer composed of the metal element of 1) and a second metal element forming the second conductive material; and forming a first intermetallic compound layer on the first intermetallic compound layer from the second conductive material. Forming a second conductive layer and forming the second conductive layer on the interlayer insulating film, and at the same time embedding the second conductive material in the conductive hole, and the second conductive layer formed on the interlayer insulating film. And the first intermetallic compound layer is etched back so that the second conductive material is embedded only inside the conduction hole. A manufacturing method including a step of leaving a metal and a step of forming a second wiring layer connected to the first wiring layer via the buried metal on the interlayer insulating film in which the buried metal is formed in the conduction hole By manufacturing a semiconductor device, a thermally stable intermetallic compound layer made of a metal element contained in a wiring layer and a buried metal is formed at a contact portion connecting wiring layers by a buried metal buried in an interlayer insulating film. Since the interposition is provided, it is possible to prevent the reaction between the wiring layers due to the heat treatment in the subsequent step.
Therefore, even when heat treatment is performed during or after the deposition of the wiring layer, the contact characteristics can be maintained without disturbing the shape of the wiring layer.

Further, since the intermetallic compound layer contains the main component element of the wiring layer and the buried metal formed thereabove, it has a good affinity for the wiring layer and the wiring layer can be efficiently embedded in the conduction hole. You can As a result, the reliability of the connection between the multi-layered wirings can be improved. In the method for manufacturing a semiconductor device described above, a second intermetallic compound layer including a second metal element forming the second conductive material and a third metal element forming the third conductive material. If the second wiring layer is formed by the third conductive layer formed on the second intermetallic compound layer and made of the third conductive material, the heat treatment is performed during or after the wiring layer is deposited. In this case, the contact characteristics can be maintained, and even if a disconnection occurs in the third conductive layer due to electromigration or the like, the intermetallic compound layer functions as a path for passing a current. Is possible.

When depositing the intermetallic compound layer, if the substrate temperature is heated to about 400 to 500 ° C., a compound having a uniform grain size, a dense film, and a stoichiometrically stable deposit is deposited. be able to. Also, after depositing the intermetallic compound layer, 45
If the heat treatment is performed at a temperature of about 0 ° C., a more stable intermetallic compound layer can be formed.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention will be described with reference to FIGS. FIG.
2 is a cross-sectional view showing the structure of the semiconductor device according to the present embodiment, FIG.
6A to 6D are process cross-sectional views showing the method for manufacturing the semiconductor device according to the present embodiment.

First, the structure of the semiconductor device according to the present embodiment will be described. On the insulating film 12 formed on the base substrate 10, the conductive layer 14, the intermetallic compound layer 16, and the conductive layer 1
A wiring layer 20 is formed by sequentially stacking 8 (FIG. 1). Here, the intermetallic compound layer 16 is the conductive layer 1
4 is a compound layer composed of a metal element forming 4 and a metal element forming the conductive layer 18. In this embodiment, the conductive layer 1
4, a TiN film was used, a conductive layer 18 was an Al alloy layer, and an intermetallic compound layer 16 was an Al ₃ Ti layer to form a semiconductor device.

Here, the intermetallic compound layer 16 is formed of only Al ₃ Ti having a stoichiometric composition that is thermally stable, and at the same time, is a dense film having a uniform grain size. 1
4 or the conductive layer 18 is formed so as to have a uniform interface. Therefore, if the wiring layer is configured by such a laminated body, it is possible to suppress the occurrence of electromigration due to the interface state. Further, even when a break occurs in the Al alloy layer due to electromigration or the like, the Al ₃ Ti layer having a low resistivity functions as a path for passing a current, so that it is possible to prevent a complete break in the wiring.

Next, a method of manufacturing the semiconductor device according to this embodiment will be described. First, a conductive layer 14 is formed by depositing TiN to a thickness of about 50 nm on the base substrate 10 on which the insulating film 12 is formed by, for example, the reactive sputtering method. The conductive layer 14 may be a film in which Ti is laminated on Ti or TiN. Then, heat treatment is performed at 450 ° C. for about 30 minutes in a nitrogen atmosphere to sinter the conductive layer 14.
Here, when a film in which Ti is laminated on TiN is used as the conductive layer 14, sintering is performed after TiN deposition.

Then, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited on the conductive layer 14 by, for example, a magnetron sputtering method to form an intermetallic compound layer 16. When depositing the intermetallic compound layer 16, the substrate temperature is set to 400 to 50.
It is desirable to heat to about 0 ° C. Substrate temperature is 400
This is because when the temperature is lower than 0 ° C or higher than 500 ° C, stoichiometrically stable phases other than Al ₃ Ti are mixed in the film.

If the intermetallic compound layer 16 is too thick, it will not be sufficiently crystallized during sputtering, and if it is too thin, the film will have a coarse density. Therefore, in order to obtain a dense and stable composition film. It is desirable to optimize the substrate temperature and film thickness. According to the inventor of the present application, a dense and thermally stable film could be formed by forming an intermetallic compound layer of about 50 nm at a substrate temperature of about 400 to 500 ° C.

Next, heat treatment is carried out at 450 ° C. for about 30 minutes in a nitrogen atmosphere to form a thermally stable Al ₃ Ti layer. By performing this heat treatment, the reaction with the lower TiN film or the Al alloy layer deposited on the upper layer can be suppressed even when the heat treatment is performed in a later step. Copper (Cu) of 0.1 is formed on the intermetallic compound layer 16 thus formed by, for example, a magnetron sputtering method.
%, An Al alloy layer containing 0.15% of Ti has a film thickness of about 1 μm.
Then, the conductive layer 18 is formed (FIG. 2A).

Then, a resist pattern 22 corresponding to the wiring pattern to be processed is formed by a normal lithography process. Then, this resist pattern 22
Using as a mask, ordinary dry etching is performed to form the wiring layer 20 including the conductive layer 18, the intermetallic compound layer 16 and the conductive layer 14 (FIG. 2B). After that, the resist pattern 22 is removed to complete a series of wiring forming steps (FIG. 2C).

As described above, according to this embodiment, two different
When a wiring layer formed by laminating conductive layers of different types is formed, an intermetallic compound layer made of a metal element contained in each conductive layer is interposed between the conductive layers. The reaction at the layer interface can be prevented. Therefore, since the shape of the conductive layer is not damaged by this reaction, deterioration of electromigration resistance due to heat treatment in a later step can be suppressed.

Since the intermetallic compound layer is formed by depositing a compound having a stoichiometrically stable composition, the intermetallic compound layer has a more uniform grain size and a smaller film thickness than the intermetallic compound layer formed by the interfacial reaction. It is dense and can improve electromigration resistance. Next, a semiconductor device and a method of manufacturing the same according to a second embodiment of the present invention will be described with reference to FIGS.

FIG. 3 is a sectional view showing the structure of the semiconductor device according to this embodiment, and FIG. 4 is a process sectional view showing the method for manufacturing the semiconductor device according to this embodiment. First, the structure of the semiconductor device according to the present embodiment will be described. On the insulating film 12 formed on the base substrate 10, the conductive layer 14 and the intermetallic compound layer 1 are formed.
6, the conductive layer 18, the intermetallic compound layer 24, and the conductive layer 2
The wiring layer 20 is formed by sequentially stacking 6 (FIG. 3). Here, the intermetallic compound layer 16 is the conductive layer 1
4 is a compound layer composed of a metal element forming 4 and a metal element forming the conductive layer 18, and the intermetallic compound layer 24 is
It is a compound layer composed of a metal element forming the conductive layer 18 and a metal element forming the conductive layer 26. In this embodiment,
A semiconductor device was constructed by using a TiN film for the conductive layers 14 and 26, an Al alloy layer for the conductive layer 18, and an Al ₃ Ti layer for the intermetallic compound layers 16 and 24.

Here, the intermetallic compound layers 16 and 24 are formed of only Al ₃ Ti having a thermally stable stoichiometric composition, and at the same time, are films having a uniform grain size and dense, It is formed so that the interfaces with the conductive layers 14, 18, and 26 are uniform. Therefore, if the wiring layer is configured by such a laminated body, it is possible to suppress the occurrence of electromigration due to the interface state. Further, even when a break occurs in the Al alloy layer due to electromigration or the like, the Al ₃ Ti layer having a low resistivity functions as a path for passing a current, so that it is possible to prevent a complete break in the wiring.

Further, since the intermetallic compound layer 24 and the conductive layer 26 are formed also on the upper layer of the Al alloy layer, the effect of suppressing disconnection of the Al alloy layer can be further enhanced. Next, a method of manufacturing the semiconductor device according to the present embodiment will be described.
First, a conductive layer 14 is formed by depositing TiN to a thickness of about 50 nm on the base substrate 10 on which the insulating film 12 is formed by, for example, the reactive sputtering method. Then, in a nitrogen atmosphere, 4
Heat treatment is performed at 50 ° C. for about 30 minutes to sinter the conductive layer 14.

The conductive layer 14 is a Ti film or TiN.
It may be a film in which a film and a Ti film are laminated. Where T
When a film in which an iN film and a Ti film are laminated is used as the conductive layer 14, sintering is performed after depositing the TiN film.
This is performed before depositing the Ti film. Then, an Al ₃ Ti layer having a film thickness of about 5 is formed on the conductive layer 14 by, for example, a magnetron sputtering method.
The intermetallic compound layer 16 is formed by depositing 0 nm. In addition,
When depositing the intermetallic compound layer 16, the substrate temperature is set to 40
It is desirable to heat to about 0 to 500 ° C. This is because when the substrate temperature is lower than 400 ° C. or higher than 500 ° C., stoichiometrically stable phases other than Al ₃ Ti are mixed in the film.

Next, heat treatment is carried out at 450 ° C. for about 30 minutes in a nitrogen atmosphere to form a thermally stable Al ₃ Ti layer. By performing this heat treatment, the reaction with the lower TiN film or the Al alloy layer deposited on the upper layer can be suppressed even when the heat treatment is performed in a later step. On the intermetallic compound layer 16 thus formed, 0.1% Cu and Ti by the magnetron sputtering method, for example.
An Al alloy layer containing 0.15% is deposited to a thickness of about 1 μm to form the conductive layer 18.

Then, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited on the conductive layer 18 by, for example, a magnetron sputtering method to form an intermetallic compound layer 24. It should be noted that the substrate temperature is 400 as in the case of depositing the intermetallic compound layer 16.
It is desirable to heat to about 500 ° C. Then, heat treatment is performed in a nitrogen atmosphere at 450 ° C. for about 30 minutes,
Form a thermally stable Al ₃ Ti layer.

Thereafter, TiN is deposited to a film thickness of about 50 nm on the intermetallic compound layer 24 by, for example, the reactive sputtering method to form the conductive layer 26 (FIG. 4A). The conductive layer 26 may be a laminated film in which a TiN film is deposited on the Ti film. Then, on the laminated film thus formed,
A resist pattern 22 corresponding to the wiring pattern to be processed is formed by a normal lithography process. Then, normal dry etching is performed using the resist pattern 22 as a mask to form the conductive layer 26 and the intermetallic compound layer 2
4, the wiring layer 20 including the conductive layer 18, the intermetallic compound layer 16 and the conductive layer 14 is formed (FIG. 4B).

After that, the resist pattern 22 is removed to complete a series of wiring forming steps (FIG. 4).
(C)). Thus, according to this embodiment, when forming a wiring layer formed by stacking a plurality of conductive layers, an intermetallic compound layer made of a metal element contained in each conductive layer is formed between the conductive layers. Since the intervening layer is interposed, it is possible to prevent the reaction at the interface of the conductive layer due to the heat treatment in the subsequent step. Therefore, since the shape of the conductive layer is not damaged by this reaction, deterioration of electromigration resistance due to heat treatment in a later step can be suppressed.

Further, since the intermetallic compound layer is formed by depositing a compound having a stoichiometrically stable composition, the intermetallic compound layer has a uniform grain size and a film size as compared with the intermetallic compound layer formed by the interfacial reaction. Are dense and the electromigration resistance can be improved. In the above embodiment, the intermetallic compound layers 16 and 24 are provided in order to prevent mutual reaction between the conductive layers 14 and 18 and the conductive layers 18 and 26. Layers 14, 1
It is sufficient that the intermetallic compound layer 24 is formed of the compound including the main element contained in the conductive layer 1.
It suffices if it is composed of a compound consisting of the main elements contained in 8 and 26.

Therefore, the conductive layer 14 and the conductive layer 26, and the intermetallic compound layers 16 and 24 are independent of each other.
As shown in the above embodiment, they may be made of the same material or different materials. next,
A semiconductor device and a method for manufacturing the same according to a third embodiment of the present invention will be described with reference to FIGS.

FIG. 5 is a sectional view showing the structure of the semiconductor device according to the present embodiment, and FIGS. 6 and 7 are process sectional views showing the method for manufacturing the semiconductor device according to the present embodiment. First, the structure of the semiconductor device according to the present embodiment will be described. On the insulating film 12 formed on the base substrate 10, a wiring layer 20 formed by sequentially stacking a conductive layer 14, an intermetallic compound layer 16 and a conductive layer 18 is formed. An interlayer insulating film 28 is formed on the base substrate 10 on which the wiring layer 20 is formed. A wiring layer 30 is provided on the interlayer insulating film 28. The wiring layer 30 is formed by sequentially stacking a conductive layer 36, an intermetallic compound layer 38, and a conductive layer 40. The wiring layer 30 is formed on the wiring layer 20. It is connected to the wiring layer 20 through a conduction hole 32 formed in the interlayer insulating film 28. In addition, the wiring layer 20 and the wiring layer 3
An intermetallic compound layer 34 is formed on the connection portion with 0 and the inner wall of the conduction hole 32. Here, the intermetallic compound layer 16
Is a compound layer composed of a metal element forming the conductive layer 14 and a metal element forming the conductive layer 18, and the intermetallic compound layer 24 forms a metal element forming the conductive layer 18 and a conductive layer 36. The intermetallic compound layer 38 is a compound layer composed of a metal element forming the conductive layer 36 and a metal element forming the conductive layer 40. In this embodiment, a semiconductor device is formed by using a TiN film for the conductive layers 18 and 40, an Al alloy layer for the conductive layers 14 and 36, and an Al ₃ Ti layer for the intermetallic compound layers 16, 34 and 38. did.

Here, the intermetallic compound layers 16, 34, 38
Means that the interface between the intermetallic compound 16 and the conductive layer 14 or the conductive layer 18, the interface between the intermetallic compound layer 34 and the conductive layer 18 or 36, and the interface between the intermetallic compound layer 38 and the conductive layer 36 or 40 are uniform. As described above, a dense film having a uniform grain size is formed of Al ₃ Ti having a thermally stable stoichiometric composition.

Therefore, even when the heat treatment is performed during or after the deposition of the wiring layer 30, the thermally stable intermetallic compound layer 34 is formed in the conduction hole, so that the conductive layer 36 is formed.
There is no reaction between the intermetallic compound layer 34 and the intermetallic compound layer 34 or between the intermetallic compound layer 34 and the conductive layer 18, and the contact characteristics can be maintained. Next, a method of manufacturing the semiconductor device according to the present embodiment will be described.

First, the base substrate 1 on which the insulating film 12 is formed
An Al alloy layer containing 0.1% of Cu and 0.15% of Ti is deposited on the surface of 0 by, for example, a magnetron sputtering method to a thickness of about 1 μm to form the conductive layer 14. Then, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited by, for example, a magnetron sputtering method to form an intermetallic compound layer 16. When depositing the intermetallic compound layer 16, it is desirable to heat the substrate temperature to about 400 to 500 ° C. This is because when the substrate temperature is lower than 400 ° C. or higher than 500 ° C., stoichiometrically stable phases other than Al ₃ Ti are mixed in the film.

Then, in vacuum at 450 ° C. for about 30 minutes
Heat-treated to provide thermally stable Al ₃Form Ti layer
It By performing this heat treatment, heat treatment can be performed in a later process.
If it is broken, it will be deposited on the lower Al alloy layer or the upper layer.
The reaction with the TiN film can be suppressed. Then
For example, a TiN film thickness of about 50 nm is formed by the reactive sputtering method.
Deposit to form the conductive layer 18. Then in vacuum 45
The conductive layer 18 is thinned by performing heat treatment at 0 ° C. for about 30 minutes.
Tull. In addition, the above series of film forming steps is performed in a vacuum.
It is desirable to process continuously (Fig. 6)
(A)).

Further, the conductive layer 18 may be a laminated film in which a TiN film is deposited on the Ti film. After that, a resist pattern 22 corresponding to the wiring pattern to be processed is formed on the laminated film thus formed by a normal lithography process (FIG. 6B). Then, normal dry etching is performed using the resist pattern 22 as a mask to form the conductive layer 18, the intermetallic compound layer 16, and the conductive layer 14.
The wiring layer 20 having a line width of about 1 μm is formed (see FIG. 6).
(B)).

After removing the resist pattern 22 (see FIG. 6).
(C)), film thickness of about 0.5 by plasma CVD method, for example
A silicon oxide film with a thickness of 0.3 μm is deposited, and then an SOG film with a thickness of about 0.3 μm is applied by the SOG technique.
8 is formed. Then, in order to form an upper wiring layer to be connected to the wiring layer 20, a typical lithography process and a dry etching process are performed to form, for example, 0.8 μm.
A corner conduction hole 32 is opened in the interlayer insulating film 28 (FIG. 6).
(D)).

Then, an Al ₃ Ti layer is deposited to a film thickness of about 50 nm by, for example, a magnetron sputtering method to form an intermetallic compound layer 34. Note that it is desirable to heat the substrate temperature to about 400 to 500 ° C. as in the case of depositing the intermetallic compound layer 16. Then, the substrate is placed in a vacuum and heat-treated at 450 ° C. for about 30 minutes to form a thermally stable Al ₃ Ti layer. By performing this heat treatment, the reaction with the lower TiN film or the Al alloy layer deposited on the upper layer can be suppressed even when the heat treatment is performed in a later step.

Cu is formed on the intermetallic compound layer 34 thus formed by, for example, magnetron sputtering.
Of Al and 0.15% of Ti are deposited to form a conductive layer 36 by depositing an Al alloy layer having a thickness of about 1 μm. Conductive layer 36
After the deposition, the substrate was placed in a vacuum at 450 ° C for 3
By performing heat treatment for about a minute, the Al alloy layer is reflowed and the Al alloy is embedded in the conduction holes 32.

Subsequently, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited on the conductive layer 36 by, for example, magnetron sputtering to form an intermetallic compound layer 38. It should be noted that the substrate temperature is 400 as in the case of depositing the intermetallic compound layer 16.
It is desirable to heat to about 500 ° C. Then, the substrate is placed in a vacuum and heat-treated at 450 ° C. for about 30 minutes to form a thermally stable Al ₃ Ti layer.

Thereafter, TiN is deposited to a thickness of about 50 nm on the intermetallic compound layer 38 by, for example, the reactive sputtering method to form the conductive layer 40 (FIG. 7A). The conductive layer 40 may be a laminated film in which a TiN film is deposited on the Ti film. Subsequently, the laminated film thus formed is patterned by a normal lithography process and a dry etching process. Thereby, the conductive layer 40,
The wiring layer 30 including the intermetallic compound layer 38 and the conductive layer 36 is formed, and a series of wiring forming steps is completed (FIG. 7).
(B)).

As described above, according to this embodiment, the thermally stable intermetallic compound layer made of the metal element contained in each wiring layer is interposed in the contact portion connecting the wiring layers. The reaction between the wiring layers due to the heat treatment can be prevented. Therefore, even when heat treatment is performed during or after the deposition of the wiring layer, the contact characteristics can be maintained without disturbing the shape of the wiring layer.

Since the intermetallic compound layer contains the main element of the wiring layer formed thereabove, it has a good affinity for the wiring layer and the wiring layer can be efficiently embedded in the conduction hole. As a result, the reliability of the connection between the multi-layered wirings can be improved. Next, a semiconductor device and a method of manufacturing the same according to a fourth embodiment of the present invention will be described with reference to FIGS.

FIG. 8 is a sectional view showing the structure of the semiconductor device according to this embodiment, and FIGS. 9 to 11 are process sectional views showing the method for manufacturing the semiconductor device according to this embodiment. First, the structure of the semiconductor device according to the present embodiment will be described. On the insulating film 12 formed on the base substrate 10, the conductive layer 14, the intermetallic compound layer 16, the conductive layer 18, and the intermetallic compound layer 24.
And the wiring layer 20 is formed by sequentially stacking the conductive layers 26. Base substrate 10 on which wiring layer 20 is formed
An interlayer insulating film 28 is formed on the top. Wiring layer 20
A conductive hole 32 is formed in the upper interlayer insulating film 28,
An intermetallic compound layer 34 is formed on the inner wall and bottom surface of the conduction hole 32. A buried metal 44 embedded in the conduction hole 32 is further formed in the conduction hole 32.

An intermetallic compound layer 38 is formed on the inter-layer insulating film 28 in which the embedded metal 44 is embedded in the conduction hole 32.
The wiring layer 30 is provided in which the conductive layer 36, the intermetallic compound layer 46, and the conductive layer 40 are sequentially stacked.
It is connected to the wiring layer 20 via the embedded metal 44 in the conduction hole 32. Here, the intermetallic compound layer 16 is a compound layer composed of an element forming the conductive layer 14 and an element forming the conductive layer 18, and the intermetallic compound layer 24 is an element forming the conductive layer 18. The intermetallic compound layer 34 is a compound layer composed of the elements composing the conductive layer 26, the intermetallic compound layer 34 is a compound layer composed of the elements composing the conductive layer 26, and the elements composing the embedded metal 44, and the intermetallic compound layer 46 is , A compound layer composed of an element forming the conductive layer 36 and an element forming the conductive layer 40. In this embodiment, the conductive layer 1
TiN films for 4, 26, 40 and Al for conductive layers 18, 36
The alloy layers are replaced by intermetallic compound layers 16, 24, 34, 38, 4
In No. 6, a semiconductor device was constructed by using an Al ₃ Ti layer.

Here, the intermetallic compound layers 16, 24, 3
4, 38 and 46 are interfaces between the intermetallic compound 16 and the conductive layer 14 or the conductive layer 18, interfaces between the intermetallic compound 24 and the conductive layer 18 or the conductive layer 26, and the intermetallic compound layer 34 and the conductive layer 2.
6 or the interface with the embedded metal 44, the intermetallic compound layer 38
And a conductive layer 36 or a buried metal 44, and an intermetallic compound 46 and a conductive layer 36 or a conductive layer 40, the interface is uniform, Al having a thermally stable stoichiometric composition.
₃ Ti forms a dense film with a uniform grain size.

Therefore, even when the heat treatment is performed during or after the deposition of the wiring layer 30, the thermally stable intermetallic compound layer 34 is formed in the conduction hole, so that the buried metal 44 and the metal are formed. Intermetallic compound layer 34 or intermetallic compound layer 34
There is no reaction between the conductive layer 26 and the conductive layer 26, and the contact characteristics can be maintained. Next, a method of manufacturing the semiconductor device according to the present embodiment will be described.

First, the base substrate 1 on which the insulating film 12 is formed
Then, a conductive layer 14 is formed by depositing TiN with a film thickness of about 50 nm on the substrate 0 by reactive sputtering, for example. Then, heat treatment is performed in vacuum at 450 ° C. for about 30 minutes to form the conductive layer 1
4 is sintered. The conductive layer 14 is a Ti film,
Alternatively, it may be a laminated film in which a Ti film is deposited on a TiN film. Here, when the film in which the TiN film and the Ti film are laminated is used as the conductive layer 14, the sintering is
After depositing the TiN film and before depositing the Ti film.

Then, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited on the conductive layer 14 by, for example, a magnetron sputtering method to form an intermetallic compound layer 16. When depositing the intermetallic compound layer 16, the substrate temperature is set to 400 to 50.
It is desirable to heat to about 0 ° C. Substrate temperature is 400
This is because when the temperature is lower than 0 ° C or higher than 500 ° C, stoichiometrically stable phases other than Al ₃ Ti are mixed in the film.

Then, in vacuum at 450 ° C. for about 30 minutes
Heat-treated to provide thermally stable Al ₃Form Ti layer
It By performing this heat treatment, heat treatment can be performed in a later process.
Even if it is broken, it will be deposited on the lower TiN film or the upper layer.
The reaction with the Al alloy layer can be suppressed. like this
On the intermetallic compound layer 16 formed by
By the netron sputtering method, 0.1% Cu and Ti
An Al alloy layer containing 0.15% is deposited to a film thickness of about 1 μm,
The conductive layer 18 is formed.

Next, for example, in the magnetron sputtering method
More Al₃A Ti layer is deposited to a thickness of about 50 nm and the intermetallic compound is deposited.
The material layer 24 is formed. In addition, the intermetallic compound layer 16 is deposited.
As in the case of
It is desirable to heat. Then, in vacuum at 450 ° C,
Thermally stable Al after heat treatment for about 30 minutes ₃Ti
Form the layers. By performing this heat treatment,
Even when heat treatment is performed, the lower Al alloy layer or the upper layer
The reaction with the TiN film deposited on the layer can be suppressed
It

Then, T is formed by, for example, the reactive sputtering method.
iN is deposited to a film thickness of about 50 nm to form the conductive layer 26.
Then, heat treatment is performed in vacuum at 450 ° C. for about 30 minutes to sinter the conductive layer 18. In addition, it is desirable that the series of film forming steps be continuously performed in a vacuum (FIG. 9A). Further, the conductive layer 26 may be a laminated film in which a TiN film is deposited on the Ti film.

After that, on the laminated film thus formed,
A resist pattern 22 corresponding to the wiring pattern to be processed is formed by a normal lithography process. Then, normal dry etching is performed using the resist pattern 22 as a mask to form the conductive layer 26 and the intermetallic compound layer 2
4, a wiring layer 20 having a line width of about 1 μm, which includes the conductive layer 18, the intermetallic compound layer 16, and the conductive layer 14 is formed (FIG. 9).
(B)).

After removing the resist pattern 22 (see FIG. 9).
(C)), film thickness of about 0.5 by plasma CVD method, for example
A silicon oxide film with a thickness of 0.3 μm is deposited, and then an SOG film with a thickness of about 0.3 μm is applied by the SOG technique.
8 is formed. Then, in order to form an upper wiring layer to be connected to the wiring layer 20, a typical lithography process and a dry etching process are performed to form, for example, 0.8 μm.
A corner conduction hole 32 is opened in the interlayer insulating film 28 (FIG. 9).
(D)).

Then, an Al ₃ Ti layer is deposited to a thickness of about 50 nm by, for example, a magnetron sputtering method to form an intermetallic compound layer 34. Note that it is desirable to heat the substrate temperature to about 400 to 500 ° C. as in the case of depositing the intermetallic compound layer 16. Then, the substrate is placed in a vacuum and heat-treated at 450 ° C. for about 30 minutes to form a thermally stable Al ₃ Ti layer. By performing this heat treatment, the reaction with the lower TiN film or the Al alloy layer deposited on the upper layer can be suppressed even when the heat treatment is performed in a later step.

Cu is formed on the intermetallic compound layer 34 thus formed by, for example, magnetron sputtering.
Al alloy layer 35 containing 0.1% of Ti and 0.15% of Ti
To a film thickness of about 1 μm. Then, the substrate is placed in a vacuum, and heat treatment is performed at 450 ° C. for about 3 minutes to reflow the Al alloy layer 35 so that A in the conduction hole 32.
l alloy is embedded (FIG. 10A).

After that, the Al alloy layer 35 thus deposited is subjected to the normal dry etching to form the interlayer insulating film 2.
Etching back is performed until the surface of 8 is exposed to form a buried metal 44 embedded in the conduction hole 32 (FIG. 10).
(B)). Then, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited on the interlayer insulating film 28 having the buried metal 44 buried in the conduction hole 32 by, for example, a magnetron sputtering method to form an intermetallic compound layer 38. Note that the substrate temperature is 400 to 400, as in the case of depositing the intermetallic compound layer 16.
It is desirable to heat to about 500 ° C.

Then, the substrate is placed in a vacuum and the
Heat-treated at 50 ° C for about 30 minutes to obtain a thermally stable A
An l ₃ Ti layer is formed. On the intermetallic compound layer 38 thus formed, for example, by magnetron sputtering, Al containing 0.1% Cu and 0.15% Ti.
The alloy layer is deposited to a film thickness of about 1 μm to form the conductive layer 36.

Then, an Al ₃ Ti layer having a film thickness of about 50 nm is deposited on the conductive layer 36 by, for example, a magnetron sputtering method to form an intermetallic compound layer 46. It should be noted that the substrate temperature is 400 as in the case of depositing the intermetallic compound layer 16.
It is desirable to heat to about 500 ° C. Then, the substrate is placed in a vacuum and heat-treated at 450 ° C. for about 30 minutes to form a thermally stable Al ₃ Ti layer.

Then, TiN is deposited to a thickness of about 50 nm on the intermetallic compound layer 46 by, for example, the reactive sputtering method to form the conductive layer 40 (FIG. 11A). The conductive layer 40 may be a laminated film in which a TiN film is deposited on the Ti film. Then, the laminated film thus formed is
Patterning is performed by a normal lithography process and a dry etching process. Thereby, the conductive layer 4
0, the intermetallic compound layer 46, the conductive layer 36, and the intermetallic compound layer 38 are formed into the wiring layer 30, and a series of wiring forming steps is completed (FIG. 11B).

As described above, according to the present embodiment, the contact portion connecting the wiring layers with the embedded metal embedded in the interlayer insulating film is thermally stable and is composed of the elements contained in the wiring layer and the embedded metal. Since the intermetallic compound layer is interposed, it is possible to prevent the reaction between the wiring layers due to the heat treatment in the subsequent step. Therefore, even when heat treatment is performed during or after the deposition of the wiring layer, the contact characteristics can be maintained without disturbing the shape of the wiring layer.

Further, since the intermetallic compound layer contains the main component element of the wiring layer formed thereabove, it has a good affinity for the wiring layer and the wiring layer can be efficiently embedded in the conduction hole. As a result, the reliability of the connection between the multi-layered wirings can be improved. In the above-mentioned embodiment, between the conductive layer made of the TiN film and the conductive layer made of the Al alloy layer,
Although the intermetallic compound layer made of Al ₃ Ti is provided, it is only necessary to interpose the stable intermetallic compound layers containing the main elements constituting each of the conductive layers of different materials. Not something.

For example, a conductive layer made of a Ti film and an Al
Between the conductive layer consisting of gold layer, Al ₃Metal consisting of Ti
An intermetallic compound layer may be provided, or an Al alloy layer having conductivity
Between the W layer and the W conductive layer₁₂Or WAl
₆You may form the intermetallic compound layer which consists of.

[0082]

As described above, according to the present invention, the first conductive layer made of the first conductive material, and the first conductive layer formed on the first conductive layer and constituting the first conductive material. A first intermetallic compound layer containing a metal element and a second metal element forming a second conductive material, and a second intermetallic compound layer formed on the first intermetallic compound layer and made of a second conductive material. The wiring layer is formed of a laminated body having the conductive layer and the first conductive layer and the second conductive layer do not directly react with each other in the heat step after the wiring layer is formed, and the shape of the wiring layer is formed. Since the interface state can be maintained, the electromigration resistance can be improved.

In the above semiconductor device, the second metal element which is formed on the second conductive layer and constitutes the second conductive material, and the third metal element which constitutes the third conductive material. If the wiring layer is formed of a laminate further including a second intermetallic compound layer containing a metal oxide and a third conductive layer formed on the second intermetallic compound layer In addition to improving migration resistance, even when a conductive layer is broken due to electromigration, other conductive layers and intermetallic compound layers function as a path for passing current, preventing complete disconnection of the wiring. It becomes possible.

Further, it is formed on the first wiring layer, an interlayer insulating film formed on the first wiring layer and having a conductive hole connecting the first wiring layer and the upper wiring layer, and formed on the interlayer insulating film. And a second wiring layer connected to the first wiring layer in the conduction hole and a connection portion between the first wiring layer and the second wiring layer in the conduction hole, and the first wiring in the connection portion. The first of the layers
If a semiconductor device having the above metal element and the first intermetallic compound layer containing the second metal element forming the second wiring layer at the connection portion is configured, the second wiring layer is being deposited or deposited. Even when the heat treatment is performed later, the thermally stable intermetallic compound layer is formed in the conductive hole, so that the second wiring layer and the intermetallic compound layer or the intermetallic compound layer and the first wiring layer are formed. No reaction occurs between the first wiring layer and the second wiring layer, and the contact characteristics of the connecting portion connecting the first wiring layer and the second wiring layer can be maintained.

Further, the first wiring layer, the second wiring layer formed on the first wiring layer via the interlayer insulating film, the conductive hole formed in the interlayer insulating film, and A buried metal that is buried and connects the first wiring layer and the second wiring layer, and a first connection portion that connects the first wiring layer and the buried metal, is formed. If a semiconductor device having a first metal element forming the first wiring layer and a first intermetallic compound layer containing the second metal element forming the buried metal is formed, deposition of the second wiring layer Even when heat treatment is performed during or after deposition, a thermally stable intermetallic compound layer is formed in the through hole, so that the embedded metal and intermetallic compound layer or the intermetallic compound layer and the first metal There is no reaction between the first wiring layer and the second wiring layer. It is possible to maintain the contact characteristics of the connection portion.

In addition, a second metal element that is formed in the second connection portion that connects the embedded metal and the second wiring layer and that constitutes the embedded metal, and the second wiring layer in the second connection portion are formed. By providing the second intermetallic compound layer containing the constituent third metal element, the contact characteristics of the connecting portion connecting the first wiring layer and the second wiring layer can be maintained, and electromigration or the like can be performed. Even if a disconnection occurs in the second wiring layer, the intermetallic compound layer functions as a path for passing a current, so that it is possible to prevent the wiring from being completely disconnected.

If the above intermetallic compound layer is formed of a compound having a stoichiometric composition, it does not react with the wiring layer or the conductive layer in contact with the intermetallic compound layer, so that the shape of the wiring layer is maintained. It is desirable for improving electromigration resistance. Further, the above intermetallic compound includes Al ₃
Ti can be applied. Further, WAl ₁₂ or WAl ₆ can be applied to the above intermetallic compound.

The step of forming the first conductive layer made of the first conductive material, the first metal element forming the first conductive material and the second conductive layer on the first conductive layer. A step of forming an intermetallic compound layer made of a second metal element constituting the material, a step of forming a second conductive layer made of a second conductive material on the intermetallic compound layer, By manufacturing a semiconductor device by a manufacturing method including a step of patterning a laminate having a conductive layer, an intermetallic compound layer, and a second conductive layer, and forming a wiring layer made of the laminate,
Compared to the case where the intermetallic compound layer is formed by the interfacial reaction,
Since it forms an intermetallic compound layer with a fine grain size and a dense film,
A semiconductor device having a wiring layer having excellent electromigration resistance can be manufactured.

Further, a step of forming a first wiring layer having a first conductive layer made of a first conductive material, and an interlayer insulating film are formed on a base substrate on which the first wiring layer is formed. A step of forming a conductive hole reaching the first wiring layer in the interlayer insulating film on the first wiring layer; and a step of forming a first conductive material on the interlayer insulating film and in the conductive hole. Forming a first intermetallic compound layer composed of the metal element of 1) and a second metal element forming the second conductive material; and forming a first intermetallic compound layer on the first intermetallic compound layer from the second conductive material. A second wiring layer having a second conductive layer is formed, the second wiring layer is formed on the interlayer insulating film, and at the same time, the second conductive layer is embedded in the conductive hole. By manufacturing the device, it is possible to Since thermally interposing a stable intermetallic compound layer comprising a metal element contained in the line layer, it is possible to prevent reaction of the wiring layers by a heat treatment in the subsequent step. Therefore, even when heat treatment is performed during or after the deposition of the wiring layer, the shape of the wiring layer is not disturbed,
The contact characteristics can be maintained.

Further, a step of forming a first wiring layer having a first conductive layer made of a first conductive material and an interlayer insulating film are formed on a base substrate on which the first wiring layer is formed. A step of forming a conductive hole reaching the first wiring layer in the interlayer insulating film on the first wiring layer, and a step of forming a first conductive material on the interlayer insulating film and inside the conductive hole. Forming a first intermetallic compound layer composed of the metal element of 1) and a second metal element forming the second conductive material; and forming a first intermetallic compound layer on the first intermetallic compound layer from the second conductive material. Forming a second conductive layer and forming the second conductive layer on the interlayer insulating film, and at the same time embedding the second conductive material in the conductive hole, and the second conductive layer formed on the interlayer insulating film. And the first intermetallic compound layer is etched back so that the second conductive material is embedded only inside the conduction hole. A manufacturing method including a step of leaving a metal and a step of forming a second wiring layer connected to the first wiring layer via the buried metal on the interlayer insulating film in which the buried metal is formed in the conduction hole By manufacturing a semiconductor device, a thermally stable intermetallic compound layer made of a metal element contained in a wiring layer and a buried metal is formed at a contact portion connecting wiring layers by a buried metal buried in an interlayer insulating film. Since the interposition is provided, it is possible to prevent the reaction between the wiring layers due to the heat treatment in the subsequent step.
Therefore, even when the heat treatment is performed during or after the deposition of the wiring layer, the contact characteristics can be maintained without disturbing the shape of the wiring layer.

Further, since the intermetallic compound layer contains the main element of the wiring layer formed above it and the embedded metal, the intermetallic compound layer has a good affinity for the wiring layer and the wiring layer can be efficiently embedded in the conduction hole. You can As a result, the reliability of the connection between the multi-layered wirings can be improved. In the method for manufacturing a semiconductor device described above, a second intermetallic compound layer including a second metal element forming the second conductive material and a third metal element forming the third conductive material. If the second wiring layer is formed by the third conductive layer formed on the second intermetallic compound layer and made of the third conductive material, the heat treatment is performed during or after the wiring layer is deposited. In this case, the contact characteristics can be maintained, and even if a disconnection occurs in the third conductive layer due to electromigration or the like, the intermetallic compound layer functions as a path for passing a current. Is possible.

When depositing the intermetallic compound layer, if the substrate temperature is heated to about 400 to 500 ° C., a compound having a uniform grain size, a dense film, and stoichiometrically stable is deposited. be able to. Also, after depositing the intermetallic compound layer, 45
If the heat treatment is performed at a temperature of about 0 ° C., a more stable intermetallic compound layer can be formed.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing a structure of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a process sectional view showing the manufacturing method of the semiconductor device according to the first embodiment of the invention.

FIG. 3 is a schematic sectional view showing the structure of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a process sectional view showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 5 is a schematic sectional view showing the structure of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a process sectional view (1) showing the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 7 is a process sectional view (2) illustrating the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 8 is a schematic sectional view showing the structure of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 9 is a process sectional view (1) showing the method for manufacturing the semiconductor device according to the fourth embodiment of the present invention.

FIG. 10 is a process sectional view (2) illustrating the method for manufacturing the semiconductor device according to the fourth embodiment of the present invention.

FIG. 11 is a process sectional view (3) showing the method for manufacturing the semiconductor device according to the fourth embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Base substrate 12 ... Insulating film 14 ... Conductive layer 16 ... Intermetallic compound layer 18 ... Conductive layer 20 ... Wiring layer 22 ... Resist pattern 24 ... Intermetallic compound layer 26 ... Conductive layer 28 ... Interlayer insulating film 30 ... Wiring layer 32 ... Conduction hole 34 ... Intermetallic compound layer 35 ... Al alloy layer 36 ... Conductive layer 38 ... Intermetallic compound layer 40 ... Conductive layer 44 ... Embedded metal 46 ... Intermetallic compound layer

Claims (14)

[Claims] 1. A first conductive layer formed on a base substrate and made of a first conductive material; and a first metal formed on the first conductive layer and constituting the first conductive material. A first intermetallic compound layer containing an element and a second metal element that constitutes a second conductive material different from the first conductive material, and is formed on the first intermetallic compound layer, A semiconductor device having a wiring layer having a second conductive layer made of the second conductive material. 2. The semiconductor device according to claim 1, wherein the wiring layer is formed on the second conductive layer, and the second metal element that constitutes the second conductive material and the second metal element. A second intermetallic compound layer containing a third metal element that forms a third conductive material different from the conductive material; and a second intermetallic compound layer formed on the second intermetallic compound layer. Further comprising a third conductive layer that is formed. 3. A first wiring layer formed on a base substrate, and a conduction hole formed on the first wiring layer and connecting the first wiring layer and an upper wiring layer. An interlayer insulating film, a second wiring layer formed on the interlayer insulating film and connected to the first wiring layer in the conduction hole, the first wiring layer in the conduction hole, and the second wiring layer A first metal element that is formed in the connection part of the wiring layer and that forms the first wiring layer in the connection part, and a second metal element that forms the second wiring layer in the connection part. First including
And an intermetallic compound layer of 1. 4. An interlayer insulation having a first wiring layer formed on a base substrate and a conduction hole formed on the first wiring layer and connecting the first wiring layer and an upper wiring layer. A film, a second wiring layer formed on the interlayer insulating film and connected to the first wiring layer in the conduction hole, and a second wiring layer embedded in the conduction hole, the first wiring layer and the first wiring layer. A buried metal connecting the second wiring layer and a first wiring layer connecting the first wiring layer and the buried metal
A first intermetallic compound that is formed in the connection portion of the first connection element and that includes the first metal element that forms the first wiring layer in the first connection portion and the second metal element that forms the embedded metal. A semiconductor device having a layer. 5. The semiconductor device according to claim 4, wherein the second metal connecting the embedded metal and the second wiring layer
Forming a buried metal on the connection part of the second
2. A semiconductor device further comprising a second intermetallic compound layer containing the metal element of 1. and a third metal element forming the second wiring layer in the second connection portion. 6. The semiconductor device according to claim 1, wherein the first intermetallic compound layer or the second intermetallic compound layer is formed of a compound having a stoichiometric composition. A semiconductor device characterized in that it is a layer. 7. The semiconductor device according to claim 6, wherein the compound is Al ₃ Ti. 8. The semiconductor device according to claim 6, wherein the compound is WAl ₁₂ or WAl ₆ . 9. A first conductive layer forming step of forming a first conductive layer made of a first conductive material on a base substrate; and a step of forming the first conductive material on the first conductive layer. A second metal different from the first metal element and the first conductive material.
And an intermetallic compound layer forming step of forming an intermetallic compound layer containing a second metal element constituting the electrically conductive material, and a second electrically conductive layer made of the second electrically conductive material on the intermetallic compound layer. Forming a second conductive layer, forming the first conductive layer, the intermetallic compound layer, and the second
And a wiring layer forming step of forming a wiring layer by patterning a laminate having the conductive layer. 10. A first wiring layer forming step of forming a first wiring layer having a first conductive layer made of a first conductive material on a base substrate, and the first wiring layer is formed. An interlayer insulating film forming step of forming an interlayer insulating film on the underlying substrate, and a conductive hole forming step of forming a conductive hole reaching the first wiring layer in the interlayer insulating film on the first wiring layer. A first metal element forming the first conductive material and a second conductive material different from the first conductive material on the interlayer insulating film and inside the conductive hole; A first intermetallic compound layer forming step of forming a first intermetallic compound layer containing a metal element, and a second conductive layer made of the second conductive material on the first intermetallic compound layer Forming a second wiring layer having the above structure and forming the second wiring layer on the interlayer insulating film. A second filling the second conductive material in said conductive hole
And a conductive layer forming step. 11. A first wiring layer forming step of forming a first wiring layer having a first conductive layer made of a first conductive material on a base substrate, and the first wiring layer is formed. An interlayer insulating film forming step of forming an interlayer insulating film on the underlying substrate, and a conductive hole forming step of forming a conductive hole reaching the first wiring layer in the interlayer insulating film on the first wiring layer. A first metal element forming the first conductive material and a second conductive material different from the first conductive material on the interlayer insulating film and inside the conductive hole; A first intermetallic compound layer forming step of forming a first intermetallic compound layer containing a metal element, and a second conductive layer made of the second conductive material on the first intermetallic compound layer Forming a second conductive layer, and forming the second conductive layer and the second conductive layer formed on the interlayer insulating film. An etch-back step of etching back the first intermetallic compound layer until it reaches the interlayer insulating film, and leaving an embedded metal made of the second conductive material only inside the conductive hole; A second wiring layer forming step of forming a second wiring layer connected to the first wiring layer via the embedded metal on the interlayer insulating film in which the embedded metal is embedded. A method for manufacturing a characteristic semiconductor device. 12. The method of manufacturing a semiconductor device according to claim 11, wherein the second wiring layer forming step is formed on the interlayer insulating film and the embedded metal to form the second conductive material. A second metal element and a third conductive material which is different from the second conductive material;
Second deposition of a second intermetallic compound layer containing the metallic element of
And a third conductive layer forming step of depositing a third conductive layer formed on the second intermetallic compound layer and formed of the third conductive material. A method for manufacturing a characteristic semiconductor device. 13. The method of manufacturing a semiconductor device according to claim 9, wherein in the first intermetallic compound layer forming step or the second intermetallic compound forming step, a stoichiometric composition is used. A method for manufacturing a semiconductor device, characterized in that the intermetallic compound is deposited at a temperature of 400 to 500 ° C. so as to form an intermetallic compound layer having, and heat treatment is performed immediately after the deposition of the intermetallic compound. 14. The method for manufacturing a semiconductor device according to claim 13, wherein the heat treatment is performed in a vacuum or in an inert gas atmosphere for about 45 minutes.
A method of manufacturing a semiconductor device, which is performed at a temperature of 0 ° C.