JPH0695516B2 - Semiconductor device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring material for a semiconductor device, particularly to a semiconductor device using a highly reliable wiring material for a highly integrated semiconductor device.

2. Description of the Related Art A LSI using silicon is currently most often used.
As shown in the drawings, the process will be described below.

First, as shown in FIG. 2A, the diffusion layer 2 is formed near the surface.
After the insulating film 3 is formed on the silicon substrate 1 containing silicon by the CVD method, the contact hole 4 for connecting to the diffusion layer 2 is formed. Next, as shown in FIG. An Al alloy film 7 (here, an Al alloy film containing 1% Si atoms is used in the Al film) to be a wiring is formed by a sputtering method. Subsequently, only the region of the Al alloy film 7 necessary for wiring is left, and the other regions are removed by etching. Thereafter, sintering is performed in order to improve the contact between the diffusion layer 2 and the Al alloy film 7 which is the first wiring. The temperature is about 380 ° C to 450 ° C. Next, as shown in FIG. 2C, the first wiring is formed. Insulating film 9 for electrically separating the Al alloy film 7 and the Al alloy film 11 which is the second wiring.
Are formed by the CVD method. After that, a first film is formed on the insulating film 9.
A contact hole 10 is formed which is a hole for connecting the above wiring and the second wiring. Next, as shown in FIG. 2D, the Al alloy film 11 of the second wiring is formed by the sputtering method. However, immediately before forming the Al alloy film 11,
Al alloy film 7 of the first wiring, which is the bottom of the contact hole 10.
Alumina (Al ₂ O ₃ ) formed on the surface of is sputtered with Ar to be removed. This is to improve the contact between the Al alloy films. Next, the Al alloy film that is the second wiring
11 is left only in the region necessary for wiring, and the others are removed by etching. Finally, CVD the protective film 12 to protect the wiring
And the two-layer wiring process is completed.

Problems to be Solved by the Invention However, when two-layer wiring is formed by the above method, many problems as described below occur, and due to miniaturization and high integration of semiconductor elements, those problems are caused. It gets even more serious.

First, as shown in FIG. 3 (a), in the case of contact between the extremely shallow diffusion layer 2 formed on the silicon substrate 1 and the Al alloy 7 which is the first wiring, the Si concentration in the Al alloy film is If the amount is small, Al penetrates into the diffusion layer (alloy spike) by sintering at about 450 ° C., the Al alloy film 7 breaks through the diffusion layer 2 and comes into direct contact with the silicon substrate 1, leading to device destruction. . On the other hand, if the Si concentration in the Al film is high, the third
As shown in FIG. 2B, excess Si atoms are deposited on the surface of the diffusion layer 2 or in the wiring. Si atoms deposited on the diffusion layer 2
When 14 is present, the precipitation reduces the effective contact area and increases the contact resistance.

Further, after sintering at about 450 ° C., projections called hillocks are generated on the surface of the Al alloy film 7, as shown in FIG. 3 (c). The height of the protrusion is 1 for large
It can be up to 2 μm. Therefore, when an insulating film for separating the first wiring and the second wiring is formed, as shown in FIG. 3 (c), the insulating film is cracked or the insulating film is cracked at the portion where the protrusion is generated. It will penetrate through and cause dielectric breakdown.

Further, as shown in FIG. 3 (d), the Al alloy film 7 which is the wiring.
When a plasma nitride film or the like having a tensile stress property is used as the protective film 12 above, the stress of the plasma nitride film causes gradual movement of Al atoms, which may eventually lead to disconnection 16 of the Al film. .

Means for Solving Problems The alloy spikes generated in the case of contact between the Al alloy film and the silicon substrate and the precipitation of silicon atoms at the interface are
It occurs because silicon atoms can move between the Al alloy film and the silicon substrate at a temperature of about 450 ° C. Therefore, in the present invention, a TiW film that serves as a barrier for the movement of silicon atoms is formed between the Al alloy film and the silicon substrate. In addition, a thin Ti film is formed between the silicon substrate and the TiW film in order to reduce the contact resistance with the silicon substrate and enhance the barrier effect of the TiW film. An Al alloy film which is a main wiring material is formed on the TiW film. However, if the uppermost layer of the wiring is an Al alloy layer, 45
Occurrence of hillocks is inevitable at the sintering temperature of 0-500 ℃. The generation of hillocks is caused by the movement of Al atoms. Therefore, in the present invention, a refractory metal and its alloy or refractory metal silicide which are hard to move at a temperature of 450 to 500 ° C. are formed on the Al alloy film.

Action The present invention has a contact resistance of low resistance with respect to the contact with the silicon substrate with the above-described configuration, and can prevent the spike of the wiring on the silicon substrate or the deposition of silicon atoms on the silicon substrate. Furthermore, since hillocks can be prevented from being generated on the wiring surface, it is very excellent as a wiring material when forming a multilayer wiring.

Example Hereinafter, one example of the case of forming a two-layered wiring according to the present invention will be described in detail with reference to sectional views in order of steps of FIG.

First, as shown in FIG. 1A, an insulating film 3 having a film thickness of about 8000 Å is formed on the entire surface of the silicon substrate 1 by CVD in order to separate the diffusion layer 2 formed on the silicon substrate 1 from the first wiring. It is formed by the method. Next, a hole for connecting the diffusion layer 2 and the first wiring, that is, a contact hole 4 is formed. Thereafter, as shown in FIG. 1B, a Ti film 5, a TiW film 6, an Al alloy film 7 and a TiW film 8 are sequentially formed on the entire surface of the silicon substrate 1 by a sputtering method. The film thickness is 200
They are Å, 1000Å, 8000Å, 1000Å. Next, the first wiring is formed by leaving only the area necessary for the wiring and selectively etching away the other areas. Then, the diffusion layer 2 and the above 4
Sintering is performed to form a good contact with the first wiring of the layered structure. The sintering temperature is about 380 to 450 ° C. Next, as shown in FIG. 1C, an insulating film 9 for electrically separating the first wiring and the second wiring is formed by CVD.
It is formed by the method. The film thickness is about 8000Å. After that, a contact hole 10 for connecting the first wiring and the second wiring is formed at a predetermined position of the insulating film 9. Next, as shown in FIG. 1D, an Al alloy film 11 to be the second wiring is formed by the sputtering method. Similar to the case of the first wiring, only the region necessary for the wiring is left and the other regions are selectively removed by etching to form the second wiring. Finally, in order to protect the wiring, the protective film 12 is formed by the CVD method. Through the above steps, the first wiring, which is the most problematic in the two-layer wiring, can be a wiring having low resistance and stable characteristics.

It is obvious that the present invention can be applied as a wiring material for all semiconductor devices using silicon as a substrate.

EFFECTS OF THE INVENTION According to the present invention, since the silicon substrate has a low contact resistance and the movement of silicon atoms between the wiring and the silicon substrate is suppressed, the spike of the wiring on the silicon substrate and the silicon substrate of the silicon atoms are suppressed. It is possible to prevent precipitation on the surface. Further, since a material such as a refractory metal that is hard to move at low temperature is used for the wiring surface, hillocks are prevented from being generated, and disconnection due to stress of the film formed on the wiring is prevented to improve reliability of the semiconductor device. It can be greatly improved.

[Brief description of drawings]

1 (a) to 1 (d) are sectional views in order of the processes, for illustrating the manufacturing process of the semiconductor device according to the embodiment of the present invention.
FIGS. 3A to 3D are process order cross-sectional views for explaining the conventional technique, and FIGS. 3A to 3D are process sequence cross-sectional views showing problems when the conventional technique is used. is there. 1 ... Silicon substrate, 2 ... Diffusion layer, 3 ... Insulating film, 4
...... Contact hole, 5 …… Ti film, 6 …… TiW film, 7
…… Al alloy film, 8 …… TiW film, 9 …… insulating film, 10 …… contact hole, 11 …… Al alloy film, 12 …… protective film, 13….
… Spikes, 14 …… Precipitated Si atoms, 15… Hillock,
16: Broken Al film.

Claims (5)

[Claims] 1. A semiconductor device in which a wiring layer provided on a semiconductor element is composed of four layers in which a titanium film, a tungsten film containing titanium, an aluminum alloy film and a refractory metal or a silicide film thereof are sequentially laminated. . 2. The semiconductor device according to claim 1, wherein the weight ratio of titanium in the tungsten film containing the titanium film is 15% or less. 3. An aluminum alloy film comprising Si, Cu, Ti, Pd, Zr, Hf, Cr, T
The semiconductor device according to claim 1, containing at least one metal selected from the group of metals consisting of a. 4. A semiconductor device according to claim 1, wherein the refractory metal comprises W containing Ti, Mo, W, Zr, Pd and Ti. 5. The semiconductor device according to claim 1, wherein the silicide is one or more of TiSi ₂ , MoSi ₂ , and WSi _X.