JPH0228320A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form as electrode and wiring with reliability improved by a method wherein an amorphous monocrystal silicon layer is filled in a contact hole, and after forming a conductor layer containing titanium on the surface of a high melting point metal silicide layer and an amorphous monocrystal silicon layer, a conductor layer containing aluminum is formed on the surface of the conductor layer containing titanium. CONSTITUTION:After cladding an insulation film 2 having a contact hole 3 on a semiconductor substrate 1, a high melting point metal silicide layer 4 is cladded so that it extends to the inner of the contact hole and the surface of the insulation film 2, and an amorphous monocrystal silicon layer 5 is filled in the contact hole 3. A conductor layer 6 containing titanium is formed on the surface of the high melting point metal silicide layer 4 and the amorphous monocrystal silicon layer 5, and a conductor layer 7 containing aluminum is formed on the surface of the conductor layer 6 containing titanium. This enables an electrode wiring layer good in coverage, barrier capacity and resistance to stress migration, preventing failure in manufacturing semiconductor devices due to defect in the electrode wiring layer and improving reliability.

Description

[Detailed Description of the Invention] [Summary] Regarding the improvement of a method for forming an electrode wiring structure that establishes electrical connection through a contact hole opened in an insulating film, the present invention relates to an improvement in a method for forming an electrode wiring structure that makes electrical connection through a contact hole opened in an insulating film. The purpose is to provide a method for manufacturing semiconductor devices that can form electrodes and wiring structures that have good coverage and barrier properties and improve reliability by eliminating stress migration, etc., with electrode and wiring structures that make electrical connections through semiconductors. After depositing and forming an insulating film having an opening on the substrate,
a step of depositing and forming a high melting point metal silicide layer so as to extend on the inner surface of the opening and a surface of the insulating film; a step of filling a non-single crystal silicon layer in the opening; and a step of filling the high melting point metal silicide layer in the opening. and a step of forming a titanium-containing conductive layer on the surface of the non-single crystal silicon layer, and a step of forming a conductive layer containing aluminum on the surface of the titanium-containing conductive layer. Preferably, the high melting point metal silicide layer is made of molybdenum silicide (MoSi).
), platinum silicide (PtSi), tungsten silicide (WSi), tantalum silicide (T
aSi). Alternatively, a laminated film (Ti/TiN) of a titanium layer (Ti) and a titanium nitride layer (TiN) or a titanium tungsten layer (TiW) is used instead of the high melting point metal silicide layer.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a method for forming an electrode wiring structure that establishes electrical connection through a contact hole opened in an insulating film.

As semiconductor devices become more highly integrated, contact holes provided in semiconductor devices for wiring connections are becoming increasingly finer, and contact holes with openings of 1 μm or less are already in practical use. Insulating films are required to be thicker than a certain level in order to ensure dielectric strength, so as opening dimensions become smaller, the aspect ratio, defined as the ratio of opening depth to opening dimension, tends to increase. . A conductive layer must be formed in this extremely fine contact hole to establish an electrical connection, and problems with this connection, such as coverage, barrier properties, and stress migration, arise. We will touch on these issues individually below.

As the material for the electrodes to be formed in the miniaturized contact holes, aluminum or an alloy containing aluminum is generally used because of its low resistance, but the sputtering method is used to form this aluminum layer. Widely used.

However, when an attempt is made to form an aluminum layer in a fine contact hole by sputtering, the corners of the contact hole are not filled properly due to the so-called shadow effect, resulting in a phenomenon of poor coverage.

In addition, when aluminum is used as the wiring material, the substance 1 that makes up the semiconductor substrate, for example, silicon, and the aluminum that is the electrode material come into contact at the bottom of the contact hole, but the heat treatment after sputtering the aluminum causes the silicon in the silicon substrate to It is sucked up and deposited on the silicon-aluminum interface. Since the area of the contact window is extremely small, the proportion of the area occupied by the deposited silicon in the contact window increases, causing an increase in contact resistance. At the same time as this silicon precipitation, there is also the problem of so-called alloy spikes in which aluminum penetrates into the silicon substrate in a spike shape and reaches below the impurity layer, destroying the pn junction.

There is also the problem of stress migration, that is, when the aluminum wiring layer becomes finer, the stress applied over time causes sudden disconnection, which must be overcome in order to improve reliability. In addition to solving the above problems, the electrode must have good conductivity, that is, low resistance.

Under these circumstances, it is possible to form electrodes and wiring structures that make electrical connections through fine contact holes, have good coverage and barrier properties, eliminate stress migration, and improve reliability. There is a need for a method for manufacturing semiconductor devices that is possible.

[Prior Art] Hereinafter, a conventional technique for forming an electrode/wiring structure for electrical connection through contact holes will be explained in order of process with reference to FIG.

FIG. 4 is a side sectional view showing a conventional method for manufacturing a semiconductor device in order of steps. The semiconductor device in the figure is a semiconductor substrate 11
Phosphorous silicate glass (PSG) film on the surface12. Contact holes 13 are provided, and an aluminum wiring layer 17 is provided overlapping these.

First, as shown in FIG. 4(a), an insulating film, for example, a PSG film 12, is formed on the surface of a semiconductor substrate 110, and a contact hole 13 is formed by lithography using a resist. Next, as shown in FIG. 4(b), an aluminum wiring layer 17 is formed over the entire surface by sputtering technology. At this time, in an extremely fine semiconductor device in which the contact hole 13 is 1 μm or less, when the aluminum wiring layer 17 is formed by sputtering, the shadow effect results in a shape as shown in the figure, resulting in poor coverage of the aluminum wiring layer.

On the other hand, it is also possible to use a CVD film 2, such as polysilicon doped with impurities, which has better coverage than a sputtered film such as aluminum, as the wiring material. However, silicon has a higher resistance than aluminum, and there is a limit to the miniaturization of wiring.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, when the shape of the contact hole is miniaturized, forming an electrode/wiring layer using a sputtering method using aluminum or the like creates an extremely thin part within the hole. Coverage deteriorates. Furthermore, when aluminum is brought into direct contact with the silicon surface, the two become alloyed at the interface, resulting in a high resistance, but since the contact surface is miniaturized, the resistance becomes even higher and cannot be ignored. Furthermore, there is also the problem of reduced reliability due to the occurrence of stress migration, and the restriction that the electrode/wiring layer itself must be formed of a low-resistance material.

In view of the above-mentioned circumstances, the present invention has been developed to provide an electrode/wiring structure that achieves electrical connection through fine contact holes through a simple and easily implementable process, has good coverage and barrier properties, and eliminates stress migration. The object of the present invention is to provide a method for manufacturing a semiconductor device that can form electrodes and wiring with improved reliability.

[Means to solve the problem]

The above problem is solved by the step of depositing an insulating film having an opening on a semiconductor substrate, and then depositing a high melting point metal silicide layer so as to extend on the inner surface of the opening and the surface of the insulating film. filling the opening with a non-single-crystal silicon layer; forming a titanium-containing conductive layer on the surfaces of the high-melting-point metal silicide layer and the non-single-crystal silicon layer; The problem is solved by a method for manufacturing a semiconductor device including a step of forming a conductive layer containing aluminum.

[Effect]

In the present invention, a high melting point metal silicide layer such as molybdenum silicide (OSI) is deposited on the inner wall of the hole before filling the contact hole with a non-single crystal silicon layer such as polysilicon. The resistance can be lowered compared to forming the hole directly. If this refractory metal silicide layer is formed by sputtering to fill all the contact holes, there is a concern that coverage will deteriorate. Therefore, in the present invention, the contact hole covered with the refractory metal silicide layer is filled with a non-single crystal silicon layer that can be formed with better coverage by CVD or the like. Non-single crystal silicon such as polysilicon is easy to form and has good coverage. Also, by filling the contact holes with polysilicon, the substrate surface can be easily flattened. However, silicon has high resistance even when doped with impurities, and there is a limit to the miniaturization of wiring. Therefore, aluminum is used as the wiring material electrically connected to the polysilicon and the high melting point metal silicide layer. However, when the polysilicon buried in the contact hole and aluminum come into direct contact, heat treatment causes aluminum-silicon alloying to occur at the interface, reducing the reliability of the wiring. Since a titanium-containing conductive layer that acts as a barrier metal is formed and a wiring layer containing A! is formed on top of the titanium-containing conductive layer that acts to suppress the reaction between Since the wiring layer has a multilayer structure of at least titanium nitride (TiN) and aluminum, the mechanical strength is increased and the resistance to stress is improved.

By employing the above configuration, the conventional problems can be solved by offsetting the conventional drawbacks from the characteristics of non-single-crystal silicon, which allows formation with good coverage, and the characteristics of aluminum, which has low resistance.

〔Example〕

(First Example) Hereinafter, a first example of the present invention will be described in order of steps with reference to FIG.

In the semiconductor device shown in FIG.
A molybdenum silicide (Host) layer 4. Polysilicon layer 5. Titanium nitride (TiN) layer 6, aluminum wiring layer 7
are provided one on top of the other.

First, as shown in FIG. 1(a), an insulating film, for example PSGS2O2V with a film thickness of io and ooo, is formed on the surface of a semiconductor substrate 1.
D, and a contact hole 3 is formed by a lithography technique using a resist.

Next, as shown in Figure 1(b), a film with a thickness of 2,000 was applied to the entire surface.
Molybdenum silicide (MoSi) N4 is formed by sputtering under the following conditions.

Target: Molybdenum silicide (MoS)
i) Atmosphere: Argon (Ar) Processing chamber internal pressure: 5 X 1O-3Torr Applied voltage: -500V Applied power: 2Kw Next, contact Film thickness 14.0 on the entire surface including inside hole 3
000 polysilicon layer is formed by CVD method, and RF
An etch bank was performed by RIE (reactive ion etching) using a mixed gas of sulfur hexafluoride and nitrogen (SF6 +Nz) under the conditions of a power of 150 W and a processing chamber pressure of 0.23 Torr, as shown in Figure 1 (C). As shown, a polysilicon layer 5 is formed within the contact hole 3. However, in this embodiment, the polysilicon is formed only inside the contact hole, but a structure in which the polysilicon extends outside the contact hole may also be used.

Thereafter, as shown in FIG. 1(d), a film of titanium nitride (TiN)N6 having a thickness of 400 nm is formed on the entire surface by sputtering under the following conditions.

Target... Titanium (Ti) atmosphere...
...Argon (Ar) 50% + Nitrogen (N 50%) Processing chamber pressure ...2.5X10-' Torr Applied voltage ...500v Applied power ...・5Kw Then, as shown in Figure 1(e), a film thickness of 10.0 is applied to the entire surface.
The aluminum wiring layer 7 of 0.000000000000000000000000000000000 wiring layers 7 is formed by sputtering under the following conditions.

Target: Aluminum (A1) atmosphere
......Argon (Ar) processing chamber pressure...
...5 Xl0-3Torr applied voltage ......
500 V Applied power...7b+ Like this, molybdenum silicide (Host) N 4
, titanium nitride (TiN) layer 6 and aluminium lt&9j! Since it has a multilayer structure of i7, it is possible to form an electrode with good coverage, and molybdenum silicide (N.

Since titanium nitride (TiN ) N6 is provided between the St) layer 4 and the aluminum wiring layer 7, it is possible to prevent the silicon in the molybdenum silicide (MoSi) N4 from diffusing into the aluminum wiring layer 7. By forming a multilayer structure, it becomes possible to form an electrode wiring layer that has higher resistance to stress migration than when only an aluminum wiring layer is used.

(Second Embodiment) Next, a second embodiment of the present invention will be described in order of steps with reference to FIG. 2. In this second embodiment, as the barrier metal 4 formed on the inner wall of the contact hole,
Titanium (Ti) has better coverage than high melting point metal silicide 40°Titanium nitride (Ti)
N) 41 laminated films (hereinafter, this laminated film will be referred to as Ti/T
It is abbreviated as iN. ) was selected.

First, as shown in FIG. 2A, an insulating film, for example, a PSG film 2 having a thickness of io or oo, is formed on the surface of a semiconductor substrate 1, and a contact hole 3 is formed by lithography using a resist.

Next, as shown in FIG. 2(b), a titanium (Ti) film with a thickness of 200 mm is applied to the entire surface. A laminated film 4 of titanium nitride (TiN) 41 with a film thickness of 2,000 is sequentially formed by sputtering under the following conditions.

*Titanium (Ti) sputtering conditions Target: Titanium (Ti) atmosphere...
...Argon (Ar) processing chamber pressure...
5 Xl0-3Torr applied voltage...500
■ Applied power...IKw *Titanium nitride (TiN) sputtering conditions Target...Titanium (Ti) atmosphere...
...Argon (Ar) 50% + Nitrogen (Nz)
50% Processing chamber pressure...2.5X10-3Torr Applied voltage...500■ Applied power...5Kw The following steps are the same as those shown in the first example. Follow the same instructions as in . First, a polysilicon layer with a thickness of 14,000 wafers was formed on the entire surface including the inside of the contact hole 3 by the CVD method, and etched back under the same conditions as in the first embodiment to form a polysilicon layer as shown in FIG. 2(C). , a polysilicon layer 5 is formed only within the contact hole 3. Thereafter, as shown in FIG. 2(d), a titanium nitride (TiN') layer 6 with a thickness of 400 layers is formed on the entire surface by sputtering under the same conditions as in the first embodiment. Then, as shown in FIG. 2(e),
An aluminum wiring layer 7 having a thickness of 10,000 wafers is formed over the entire surface by sputtering under the same conditions as in the first embodiment.

This Ti/TiN layer 4, titanium nitride (TiN
) layer 6 and aluminum wiring layer 7, the first
Even better coverage can be achieved than in the embodiment.

(Third Embodiment) Next, a third embodiment of the present invention will be described in order of steps with reference to FIG. 3. In this third embodiment, as the barrier metal 4 formed on the inner wall of the contact hole,
Titanium tungsten (TiW) was selected as a metal that has better coverage than the high melting point metal silinide and also has lower electrical resistance. The process is generally the same as the first embodiment except that the sputtering conditions for the barrier metal 4 are different.

First, as shown in FIG. 3(a), an insulating film, for example a PSG film 2 having a thickness of 10,000, is formed on the surface of a semiconductor substrate 1, and a contact hole 3 is formed by lithography using a resist.

Next, as shown in Figure 3(b), a film with a thickness of 2°000 was applied to the entire surface.
Titanium tungsten (TiW) N4 was sequentially formed by sputtering under the following conditions.

Target: Titanium tungsten (TiW)
) Atmosphere: Argon (Ar) Processing chamber internal pressure: 5 Xl0-' Torr applied voltage
...500 ■ Applied power ...5 Kw The following steps follow the same procedure as shown in the first embodiment. First, a polysilicon layer with a thickness of 14,000 wafers was formed on the entire surface including the inside of the contact hole 3 by the CVD method, and etched back under the same conditions as in the first embodiment to form a polysilicon layer as shown in FIG. 3(c). , a polysilicon layer 5 is formed only within the contact hole 3. After that, as shown in Figure 3(d), a film of titanium nitride (400% thick) was applied to the entire surface.
TiN ) layer 6 is formed by sputtering under the same conditions as in the first embodiment. Next, as shown in FIG. 3(e), an aluminum wiring layer 7 with a thickness of 10,000 wafers is formed over the entire surface by sputtering under the same conditions as in the first embodiment.

In this way, titanium tungsten (TiW), titanium nitride (TiN) layer 6 and aluminum wiring N
In the multilayer structure No. 7, the coverage is even better than that in the first embodiment. Titanium tungsten (TV) is
Like the high melting point metal silicide shown in the first embodiment, it is deposited in the form of columnar crystals perpendicular to the coating surface, providing good coverage, and is also characterized by lower electrical resistance than the high melting point metal silicide.

Note that the present invention is not limited to the above three embodiments, and various modifications are possible. For example 1. The high melting point metal silicide (or its substitute) deposited on the inner wall of the contact hole 3 is made of aluminum (AI) and silicon (Si).
can prevent interaction with silicon (St)
In addition to molybdenum silicide (Host) and titanium tungsten (TiW), platinum silicide (PtSt) may be used as long as it exhibits a sufficiently low ohmic contact.

Other refractory metal silicides such as tungsten silicide (IJJSi) and tantalum silicide (TaSi) can be used. Experiments have shown that these materials adhere vertically to the inner wall of the contact hole to be covered in the form of columnar crystals, and it can be pointed out that the coverage of what can become columnar crystals is particularly good.

In addition, a material with good barrier properties and low resistance is suitable for the barrier metal above the contact hole, and it has been confirmed through experiments that titanium tungsten (TiW) can be used in addition to titanium nitride (TiN). However, the qualitative reason why these two substances have good barrier properties is not clear.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, it is possible to form an electrode wiring layer that has good coverage and barrier properties and is resistant to stress migration, thereby preventing manufacturing failures in semiconductor devices due to defects in the electrode wiring layer. It has advantages such as being able to prevent damage, and can be expected to have significant economical and reliability-improving effects, making it extremely useful industrially.

[Brief explanation of the drawing]

FIG. 1 is a side sectional view showing a first embodiment according to the present invention in order of steps; FIG. 2 is a side sectional view showing a second embodiment according to the present invention in order of steps; FIG. FIG. 4 is a side sectional view showing an example in order of steps; FIG. 4 is a sectional side view showing a conventional method for manufacturing a semiconductor device in order of steps; In the figure, 1... semiconductor substrate, 2... insulating film (PSG film), 3... opening (contact hole), 4... high melting point metal silicide layer (molybdenum silicide layer). 5... Non-single crystal silicon layer (polysilicon layer), 6.
...Titanium compound layer (titanium nitride layer), 7...
・Conductor layer containing aluminum (aluminum wiring layer)
shows. ((1) KO〉5 Kutonair's ?3N Kishi ζ・) Silico SI1if) Form voice father This invention (te (No. 1) Fumi of Honuriro-ku Chrysanthemum 2 according to the present invention (1) and process) (1);
1 Name of the figure 2 Figure (1 of A) (d) + Formation of tannitride layer (e) Formation of aluminum wiring layer Figure 2 (Go's 2) Formation of Tactnail (b) 1,000 Fuyutan 9'' Stage (11g) Layered, Tomo (
C) Polysilicon middle f5 fabrication Invention 1; Third example and process order (Miss Italy 1 sectional view 53 (Main 1) (d) 1,000Fushinitry Y layer/) f5 fabrication Invention LτX Figure 3 - No. 2
)

Claims (5)

[Claims] (1) After depositing an insulating film (2) having an opening (3) on a semiconductor substrate (1), the insulating film (2) is formed so as to extend on the inner surface of the opening (3) and the surface of the insulating film (2). a step of depositing and forming a high melting point metal silicide layer (4); a step of filling the opening (3) with a non-single crystal silicon layer (5); and a step of depositing the high melting point metal silicide layer (4) and the non-single crystal silicon layer. A step of forming a titanium-containing conductive layer (6) on the surface of the silicon layer (5), and a step of forming an aluminum-containing conductive layer (7) on the surface of the titanium-containing conductive layer (6). A method for manufacturing a semiconductor device, characterized in that: (2) The high melting point metal silicide layer (4) is composed of molybdenum silicide (MoSi), platinum silicide (PtSi)
), tungsten silicide (WSi), and tantalum silicide (TaSi). (3) Claim (1) characterized in that a laminated film (Ti/TiN) of a titanium layer (Ti) and a titanium nitride layer (TiN) is used in place of the high melting point metal silicide layer (4).
) A method for manufacturing a semiconductor device according to the method. (4) The method for manufacturing a semiconductor device according to claim (1), characterized in that a titanium tungsten layer (TiW) is used in place of the high melting point metal silicide layer (4). (5) The titanium-containing conductive layer (6) is made of titanium nitride (TiN) or titanium tungsten (TiW).
2. The method of manufacturing a semiconductor device according to claim 1, further comprising: