JPH0577185B2 - - Google Patents

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to a semiconductor device having a metal multilayer wiring structure, and in particular, the present invention relates to a semiconductor device having a metal multilayer wiring structure, and in particular, contact holes for a first wiring layer and a second wiring layer are formed in a first layer. The present invention relates to a wiring structure of a semiconductor device in which a contact hole for electrically connecting to a wiring layer is formed in the same region.

[Prior Art] In recent years, as semiconductor devices have become more highly integrated, the number of elements formed on a semiconductor chip has increased, and the number of wires has also increased accordingly, and the area occupied by these wires has increased, creating an obstacle to increasing the degree of integration. It's becoming more and more common.
In order to eliminate this obstacle, the wiring is made into a multilayer structure, and a contact hole for electrically connecting the first layer wiring and the surface of the semiconductor substrate is used to electrically connect the first layer wiring and the second layer wiring. The contact hole for the wiring is formed in the same area to reduce the wiring area.
Methods have been developed to improve the collection accuracy.

FIGS. 3A to 3C are cross-sectional views schematically showing the process of forming interconnects in a semiconductor device having a conventional multilayer interconnect structure. Hereinafter, a wiring forming process in a conventional semiconductor device will be described with reference to FIGS. 3A to 3C.

FIG. 3A will be explained. Silicon semiconductor substrate 1 on which semiconductor circuit elements (not shown) are formed
After a silicon oxide film 2 is formed on the silicon oxide film 2 using, for example, the CVD method, a through hole (contact hole) 10 is formed in a predetermined region of the silicon oxide film 2 using photolithography and etching techniques. Next, a first layer aluminum wiring film 3 is formed using a vapor deposition method or a sputtering method, and then the first layer aluminum wiring film 3 is patterned into a predetermined shape. At this time, in the contact hole 10 region of the first layer aluminum wiring film 3, a step is formed due to the step of the silicon oxide film 2, which is an insulating film.

FIG. 3B will be explained. An interlayer insulating film 4 made of, for example, a silicon nitride film is formed on the patterned first-layer aluminum wiring film 3 and on the silicon oxide film 2, which is an insulating film, by using, for example, a CVD method. Next, this interlayer insulating film 4 is patterned using photolithography and etching to form a through hole (contact hole) 11 in the same region as the contact hole 10 for the first layer aluminum wiring film 3.

FIG. 3C will be explained. A second layer aluminum wiring film 5 is formed in a predetermined area on the interlayer insulating film 4 and the through hole 11, and the second layer aluminum wiring film 5 is connected to the first layer aluminum wiring through the through hole 11. electrically connected to membrane 3;

[Problems to be Solved by the Invention] The first through hole (contact hole) for electrically connecting the first layer wiring film and the surface of the semiconductor substrate and the second wiring film are electrically connected to the first wiring film. In a semiconductor device that aims to improve the degree of integration by providing a second through hole in the same area as the second through hole for connection to the second through hole, since a step is formed in the first layer wiring film in the first through hole area, The effective step difference of the second through hole with respect to the second wiring film becomes large, and the second
The step coverage in the through-hole region deteriorates, and in this region, heat generation occurs due to poor contact between the first layer aluminum wiring film and the second layer wiring film and electromigration of the second layer wiring film. There is a problem in that the reliability of the semiconductor device is impaired due to the occurrence of wire breakage.

Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can eliminate the above-mentioned problems and realize good electrical connection between a first layer wiring film and a second layer wiring film. be.

[Means for Solving the Problems] In the semiconductor device of the present invention, the stepped portion formed in the contact region of the first layer wiring film is filled with an insulating material, and the filling insulating material and the wiring layer are connected to each other. A high melting point metal layer is provided in between.

[Function] The spin-coatable fluid insulator of the present invention easily flattens the step in the first through-hole region of the first-layer wiring film, thereby flattening the step in the second through-hole region of the second-layer wiring film. Improved step coating properties,
This enables good electrical connection between the first layer wiring film and the second layer wiring film. In addition, the high melting point metal film formed between the filling insulating material and the first layer wiring film prevents interaction between the filling material and the first layer wiring film, ensuring the reliability of the first layer wiring. do.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram schematically showing a cross-sectional structure in a contact hole region of a semiconductor device according to an embodiment of the present invention. In FIG. 1, a first wiring layer of a semiconductor device according to the present invention is formed in a predetermined region on an insulating film 2 made of a silicon oxide film, and is connected to a silicon semiconductor substrate through a first through hole 10. a first-layer aluminum wiring lower layer 3a electrically connected to one surface; and a first-layer aluminum wiring lower layer 3
An SOG (spin-on glass) film 7, which is a fluid oxide that can be spin-coated, is filled in order to flatten the stepped portion of the first layer aluminum interconnection lower layer 3a and the SOG film 7. It is formed between the flat first layer aluminum wiring upper layer 3b, the SOG film 7 and the aluminum wiring layers 3a, 3b, and the SOG film 7 and the aluminum wiring layers 3a, 3b.
Refractory metal layer 6 for separation to prevent reaction with
It consists of On the first layer aluminum wiring film, a first through hole 10 is formed on the first layer aluminum wiring layers 3a, 3b and the insulating film 2.
an interlayer insulating film 4 having a second through hole 11 thereon;
A second aluminum wiring layer 5 is formed in a predetermined area on the interlayer insulating film 4 and is electrically connected to the first aluminum wiring upper layer 3b via the second through hole 11. . Here, the first aluminum wiring lower layer 3a has a thickness that is at least one-half or more of the film thickness required in a normal multilayer wiring structure, so that the wiring in the contact region with the surface of the semiconductor substrate 1 is This is intended to prevent resistance from increasing. The first layer aluminum wiring upper layer 3b is provided to flatten the top of the SOG film 7, make the first layer aluminum wiring film as thick as a normal film, and realize a predetermined wiring resistance. In the high melting point metal layer 6, impurities such as silicon contained in the SOG film 7 diffuse into the first aluminum wiring layers 3a and 3b, causing heat generation and disconnection in the first aluminum wiring layers 3a and 3b through electromigration. This is provided to prevent this from occurring.

FIGS. 2A to 2G are cross-sectional views sequentially showing the manufacturing process of a semiconductor device according to an embodiment of the present invention. Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 2A to 2G.

In FIG. 2A, for example, an insulating film 2 made of a silicon oxide film or the like is formed on the surface of a semiconductor substrate 1 made of silicon using a CVD method or the like, and then photolithography and etching are performed on predetermined areas of the insulating film 2. The first through hole 10 is formed using the method. Thereafter, a first aluminum wiring lower layer 3a is formed on the insulating film 2 and the first through hole 10 using a vapor deposition method or a sputtering method. Here, in order to prevent an increase in wiring resistance in the first through hole 10 region, the film thickness of the first aluminum wiring lower layer 3a is set to be at least 1/2 of the film thickness required for the conventional first layer aluminum wiring film. It is desirable to do so.

In FIG. 2B, a high melting point metal layer 6a is formed on the first aluminum wiring lower layer 3a by sputtering or CVD in order to separate the first aluminum wiring lower layer 3a from the SOG film 7 to be formed next. .

In FIG. 2C, an SOG film 7 having a thickness of 1000 Å or more is coated on the high melting point metal layer 6a using a spin coating method, and then the SOG film 7 is baked and solidified.

In FIG. 2D, the SOG film 7 is etched back using an anisotropic etching method to form the first through hole 1.
It is left only in the 0 region, and the step of the first layer aluminum wiring lower layer 3a is compensated for and flattened.

In FIG. 2E, the SOG film 7 and the high melting point metal layer 6a are again coated by sputtering or
A high melting point metal film 6b is formed using the CVD method.
This high melting point metal film 6b is provided as a separation film to prevent reaction between the SOG film 7 and the first aluminum wiring upper layer 3b to be formed next.

In FIG. 2F, a first aluminum wiring upper layer 3b is formed on the high melting point metal layer 6 (high melting point metal films 6a and 6b) using a vapor deposition method or a sputtering method. As a result, the surface of the first wiring layer is flattened, and the thickness of the first wiring layer is approximately the same as that of the conventional first aluminum wiring layer.
Furthermore, the same wiring resistance as the conventional first-layer aluminum wiring layer is achieved.

In FIG. 2G, after patterning the first aluminum wiring lower layer 3a, the refractory metal layer 6, and the first aluminum wiring upper layer 3b into a predetermined shape, the interlayer insulating film 4 is formed using, for example, a CVD method. Form. Thereafter, a second through hole 11 is formed in a predetermined region of the interlayer insulating film 4, that is, a region overlapping the first contact hole 10 in plan view, using photolithography and etching. By forming a second layer aluminum wiring film on the insulating film 4 and the second through hole 11, a semiconductor device having the multilayer wiring structure shown in FIG. 1 is obtained.

In the above embodiments, a case where aluminum is used as the wiring material is described, but the present invention is not limited to this, and similar effects can be obtained even when an aluminum alloy is used, for example.

In addition, although the case where an SOG film is used as an insulating material to fill the steps of the first layer wiring film is described, the filling using a fluid insulating material such as polyimide is similar to the above embodiment. effect can be obtained.

[Effects of the Invention] As described above, according to the present invention, the steps formed in the first layer wiring film are flattened by filling them with an insulating material, so that the second layer wiring film is flattened. The step coverage in the second through-hole region for connection to the first layer wiring film is improved, and a reliable electrical connection between the first layer wiring film and the second layer wiring film can be realized. Therefore, a highly reliable semiconductor device can be obtained. Furthermore, since a high melting point metal layer is provided between the filling insulator and the first layer wiring film, interaction between this insulating material and the first layer wiring film is reliably prevented. , the reliability of the first layer wiring film is guaranteed.

[Brief explanation of drawings]

FIG. 1 shows a contact hole (through hole) of a semiconductor device having a multilayer wiring structure, which is an embodiment of the present invention.
FIG. 3 is a diagram showing a schematic cross-sectional structure in a region. Second
FIGS. A to 2G are schematic cross-sectional views sequentially showing the manufacturing process of a semiconductor device having a multilayer wiring structure according to an embodiment of the present invention. FIGS. 3A to 3C are cross-sectional views sequentially showing the manufacturing process of a conventional semiconductor device having a multilayer wiring structure. In the figure, 1 is a semiconductor substrate, 2 is an insulating film,
3, 3a, and 3b are first-layer wiring films, 4 is an interlayer insulating film, 5 is a second-layer wiring film, 6, 6a, and 6b are high-melting point metal films, and 7 is a fluid insulating layer that can be spin-coated. ,
10 is a first through hole, and 11 is a second through hole. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. A first through hole formed on a surface of a semiconductor substrate and having a first through hole reaching the surface of the semiconductor substrate.
an insulating film, a first wiring layer formed on the first insulating film and in the first through hole, and a first wiring layer formed on the first wiring layer at least in the first through hole. 1 high melting point metal layer; an insulating material formed on the first high melting point metal layer in the first through hole portion so as to fill the step of the first through hole; the first high melting point metal layer; a second high melting point metal layer formed on the metal layer and the insulating material; a second wiring layer formed on the second high melting point metal layer; the first wiring layer and the second wiring layer. a second insulating layer formed thereon and having a second through hole reaching the second wiring layer on a region overlapping with the first through hole in plan view; and the second insulating layer. A semiconductor device comprising a third wiring layer formed above and in the second through-hole section. 2. The semiconductor device according to claim 1, wherein the insulating material is comprised of an insulating material that can be spin coated. 3. The semiconductor device according to claim 2, wherein the spin-coatable insulating material is spin-on glass. 4. The semiconductor device according to any one of claims 1 to 3, wherein the first, second, and third wiring layers are made of aluminum or an aluminum alloy layer. 5. The semiconductor device according to any one of claims 1, 2, and 4, wherein the insulating material is polyimide.