JPH0786281A - Semiconductor device and manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device capable of supplying stable power voltage without increasing the number of manufacturing steps, a semiconductor device having low-resistance signal wirings, and a manufacturing method for these semiconductor devices, concerning the improvement of semiconductor devices and a manufacturing method for the semiconductor devices. CONSTITUTION:The title semiconductor device is one having gold wirings 50 made of thick gold films in part of power wirings 30 of aluminum in series or in parallel. And the title manufacture of semiconductor device has a step of forming power supplying bumps using gold columnar materials and forming wirings out of thick gold films at the same time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvements in semiconductor devices and semiconductor device manufacturing methods. In particular, a semiconductor device capable of supplying a stable power supply voltage to each element in the semiconductor device,
The present invention relates to improvements in semiconductor devices having low-resistance signal wirings and methods for manufacturing these semiconductor devices without increasing the number of manufacturing steps.

[0002]

2. Description of the Related Art The power consumption of semiconductor devices is rapidly increasing due to the higher integration and higher speed of semiconductor devices, and this tendency is remarkable especially in ultra-high speed and large scale semiconductor devices. Therefore, the voltage drop in the power supply wiring in the semiconductor device chip is large, and it is becoming difficult to supply a stable power supply voltage to each of the elements arranged on the entire surface of the semiconductor device chip. Further, there is a case where a low resistance is required in a signal output wiring or the like. Conventionally, gold is used for the bumps in the semiconductor device chip, but aluminum is used for the power supply wiring and the signal wiring without using gold. Therefore, in order to reduce the voltage drop in the power supply wiring or to form a low-resistance signal line, consider increasing the thickness of the aluminum layer for wiring or providing multiple aluminum layers and connecting them in parallel. It has been.

Increasing the thickness of the aluminum layer is accompanied by the problem that stress is applied to the elements in the semiconductor device chip by the thick aluminum layer and defects occur in the elements, and a manufacturing process for reducing this stress is added. Will be required. In addition, in order to form the aluminum layer in multiple layers, it is naturally necessary to increase the number of manufacturing steps in order to form the multiple layers.

[0004]

By the way, such a solution means an increase in manufacturing process, a decrease in yield, and an increase in cost. Therefore, the development of a semiconductor device capable of ensuring a stable power supply voltage for each element in the semiconductor device, a semiconductor device having a low-resistance signal line, and a method of manufacturing the above semiconductor device without increasing the number of manufacturing processes have been developed. Is requested.

An object of the present invention is to meet this demand, and to provide a semiconductor device which can be manufactured without increasing the number of manufacturing steps and which can supply a stable power supply voltage to each element of the semiconductor device. To provide. Another object of the present invention is to provide a semiconductor device which has a low resistance signal line and can be manufactured without increasing the number of manufacturing steps. Another object of the present invention is to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device capable of supplying the stable power supply voltage or a semiconductor device having a low resistance signal line without increasing the number of manufacturing steps.

[0006]

Among the above-mentioned objects, a semiconductor device capable of supplying a stable power supply voltage to each element of the semiconductor device is provided in parallel with a part of a power supply wiring (30) made of aluminum, or , A semiconductor device in which a gold wiring (50) made of a thick gold film is formed in series.

If the gold wiring (50) made of the thick gold film is formed only in the upper part of the region other than the region (2) where the element is formed in the active layer, the thick gold film (50) is formed. This is convenient because the wiring made of the film does not stress the element under the gold film.

When the gold wiring (50) made of the thick gold film is formed in the peripheral portion (1) of the semiconductor device chip, the wiring resistance in the vicinity of the bumps where the current density is likely to increase becomes low. This is convenient because it can be done.

Among the above-mentioned objects, in a semiconductor device having a low resistance signal line, a part of a low resistance signal wire made of aluminum is provided with a wire made of a thick gold film in parallel or in series. This is achieved by the semiconductor device being formed.

Further, among the above objects, the manufacturing method of these semiconductor devices has a step of forming a power supply bump made of a gold columnar member and at the same time forming a wiring made of a thick gold film. It is achieved by the manufacturing method of.

[0011]

According to the present invention, the aluminum wiring according to the prior art is connected in parallel with the gold wiring made of the thick gold film according to the present invention, or the aluminum wiring according to the present invention is replaced with the thick gold film according to the present invention. By using the gold wiring in part and connecting it in series with the aluminum wiring in the other parts, the electrical resistance of the wiring can be greatly reduced. Since the gold wiring can be formed simultaneously with the bump pad in the step of forming the bump, the number of manufacturing steps does not increase.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The semiconductor device according to the present invention will be described in more detail below with reference to the drawings.

First Embodiment (corresponding to Claim 1 and Claim 4) See FIG. 1. FIG. 1 is a schematic configuration diagram of a semiconductor device according to a first embodiment of the present invention, and FIG. , (B) is the X of (a)
It is a -X sectional view. In FIG. 1A, 1 is a peripheral portion of the semiconductor chip. Reference numeral 3 (region within the dotted line) is an aluminum wiring region in which wiring made of aluminum is laid, and a part of the aluminum wiring region 3 overlaps the peripheral portion 1. Reference numeral 4 denotes a bump pad arranged in the peripheral portion 1, which is a gold columnar member. Reference numeral 41 is a power supply bump pad, and 42 is a signal bump pad. Reference numeral 5 is a gold wiring region in which wiring made of a thick gold film is laid.

In FIG. 1B, 2 is an element region in which a semiconductor element is formed. Reference numeral 31 is a first aluminum wiring made of aluminum that is directly connected to the power supply bump pad 41, and 32 is a second aluminum wiring made of aluminum that is not directly connected to the power supply bump pad 41. Is. Reference numeral 30 denotes an aluminum power supply wiring including a first aluminum wiring 31 and a second aluminum wiring 32, which is arranged in the aluminum wiring region 3. Reference numeral 51 is a parallel gold wire made of a thick gold film connected in parallel with the first aluminum wire 31, and 52 is a series gold wire made of a thick gold film connected in series with the first aluminum wire 31. It is a wiring and connects the first aluminum wiring 31 and the second aluminum wiring 32. Reference numeral 50 denotes a gold wire including a parallel gold wire 51 and a series gold wire 52, which is arranged in the gold wire region 5 and is formed at the same time as the bump pad 4 in the step of forming the bump pad 4 which is a gold columnar member. ing. Reference numeral 6 is an interlayer insulating film, 7 is a barrier metal layer, and 8 is a cover film.

As described above, since the gold wiring 50 constitutes a part of the power supply wiring, the resistance of the power supply wiring is reduced and the voltage drop in the power supply wiring is reduced.
A stable voltage can be supplied to the element. Further, since the gold wiring 50 can be formed at the same time as the bump pad 4, the number of steps is the same as the conventional one.

Further, although FIG. 1B shows a cross section that crosses the power supply bump pad 41, a similar structure can be used for the cross section that crosses the signal bump pad 42. It is obvious that the wiring can be connected in parallel or in series with the signal wiring made of aluminum to form a low resistance signal line.

Second Embodiment (corresponding to claim 2) See FIG. 2. FIG. 2 is a plan view of a semiconductor device according to a second embodiment of the present invention. In the second embodiment, as shown in FIG. 2, the gold wiring region 5 is provided so as to avoid the element region 2. As described above, if the thick gold wiring is formed only in the region where the element is not formed, the element is not subjected to the stress associated with the formation of the thick gold film, so that the reliability of the semiconductor device is not deteriorated.

Third Embodiment (corresponding to claim 3) See FIG. 3. FIG. 3 is a plan view of a semiconductor device according to a third embodiment of the present invention. In the third embodiment, as shown in FIG. 3, the gold wiring region 5 is provided only in the peripheral portion 1 of the chip avoiding the element region 2. Since the current density flowing nearer the bump pad 4 in the peripheral portion 1 is higher, the voltage drop can be effectively prevented by forming thick gold wiring in this portion.

Next, a method of manufacturing a semiconductor device according to the present invention will be described in detail in the order of steps.

See FIG. 4 FIG. 4 is a process chart showing the method of manufacturing a semiconductor device (No. 1).

In FIG. 1A, reference numeral 3 is an aluminum wiring region in which an aluminum wiring layer is formed, and an element layer 2 is already formed under the aluminum wiring region 3 to connect elements and elements and bump pads. The state where the aluminum wiring to be connected is already formed in the aluminum wiring region 3 is shown in the figure. In this step, the interlayer insulating film 6 made of silicon dioxide or the like is formed on the entire upper surface of the aluminum wiring region 3 and then patterned to form the contact hole 61 in the contact portion connected to the aluminum wiring in the aluminum wiring region 3.

(B) Next, a barrier metal layer 7 made of refractory metal such as titanium is formed on the entire surface.

(C) A resist film 8 is formed on the entire surface of the barrier metal layer 7 by coating. Then, a resist film in a portion where the bump pad and the thick gold film are formed by masking portions other than the bump pad and the portion where the thick gold film is formed using a metal mask (not shown) and irradiating with an ion beam. 8 is removed and a resist film opening 81 is provided.

FIG. 5 is a process diagram showing a semiconductor device manufacturing method (part 2) performed subsequent to FIG.

(D) In this step, a gold layer is grown on the resist film opening 81 by plating the barrier metal layer 7 with gold. Reference numeral 4 is a bump pad formed in this way, and reference numeral 50 is a gold wiring made of a thick gold film.

(E) Next, the used resist film 8 is removed, and the barrier metal layer 7 immediately below the resist film 8 is removed.

(F) Finally, a cover film 8 made of PSG or the like is formed so as to cover the gold wiring 50.

If the gold wiring 50 is formed in the above steps,
To manufacture a semiconductor device in which a wiring resistance can be reduced by forming a gold wiring 50 connected in parallel or in series with a part of an aluminum wiring in the same manufacturing process as the manufacturing method of the semiconductor device according to the related art. You can

[0029]

As described above, according to the present invention, it is possible to form the wiring made of a thick gold film in the step of forming the bump pad. Then, by connecting the wiring made of the thick gold film in parallel or in series with the wiring made of aluminum according to the conventional technique, or in some cases, by using only the wiring partially made of the thick gold film, the bump Since the resistance of the pad and the element or the wiring between the elements can be reduced, it is possible to supply a stable power supply voltage to the element even in a semiconductor device such as an ultra-high-speed and large-scale semiconductor device in which power consumption is particularly large. In addition, it can be a low resistance signal line.

[Brief description of drawings]

1A and 1B are schematic configuration diagrams of a semiconductor device according to a first exemplary embodiment of the present invention, FIG. 1A is a plan view, and FIG. 1B is a sectional view taken along line XX of FIG.

FIG. 2 is a plan view showing a schematic configuration of a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a plan view showing a schematic configuration of a semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a manufacturing process diagram (1) showing the method for manufacturing a semiconductor device according to the invention.

FIG. 5 is a manufacturing process diagram (2) showing the method of manufacturing a semiconductor device according to the invention.

[Explanation of symbols]

 1 Chip Peripheral Area 2 Element Area 3 Aluminum Wiring Area 4 Bump Pad 5 Gold Wiring Area 6 Interlayer Insulation Film 7 Barrier Metal Layer 8 Cover Film 30 Power Supply Wiring Made of Aluminum 31 First Aluminum Wiring 32 Second Aluminum Wiring 41 Power Supply Supply bump pad 42 Signal bump pad 50 Gold wiring 51 Parallel gold wiring 52 Series gold wiring 61 Contact hole 81 Resist film opening

Claims (5)

[Claims] 1. A power supply wiring (30) made of aluminum
A semiconductor device, wherein gold wiring (50) made of a thick gold film is formed in a part of the above in parallel or in series. 2. A gold wiring (50) made of the thick gold film.
2. The semiconductor device according to claim 1, wherein is formed only in an upper portion of a region other than the region (2) where the element is formed in the active layer. 3. Gold wiring (50) comprising said thick gold film
The semiconductor device according to claim 1, wherein the semiconductor device is formed on a peripheral portion (1) of the semiconductor device chip. 4. A semiconductor device comprising a low resistance signal wiring made of aluminum, and a wiring made of a thick gold film formed in parallel or in series on a part of the low resistance signal wiring. 5. A method of manufacturing a semiconductor device, comprising the step of forming a power supply bump made of a gold columnar member and simultaneously forming a wiring made of a thick gold film.