JP7693830B2 - 配線基板及び電子装置 - Google Patents

配線基板及び電子装置 Download PDF

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Publication number
JP7693830B2
JP7693830B2 JP2023565074A JP2023565074A JP7693830B2 JP 7693830 B2 JP7693830 B2 JP 7693830B2 JP 2023565074 A JP2023565074 A JP 2023565074A JP 2023565074 A JP2023565074 A JP 2023565074A JP 7693830 B2 JP7693830 B2 JP 7693830B2
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JP
Japan
Prior art keywords
signal line
recess
line
wiring board
ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
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JP2023565074A
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English (en)
Japanese (ja)
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JPWO2023100964A5 (https=
JPWO2023100964A1 (https=
Inventor
芳規 川頭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Publication of JPWO2023100964A1 publication Critical patent/JPWO2023100964A1/ja
Publication of JPWO2023100964A5 publication Critical patent/JPWO2023100964A5/ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224—Patterned shielding planes, ground planes or power planes
    • H05K1/0225—Single or multiple openings in a shielding, ground or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)
JP2023565074A 2021-12-03 2022-12-01 配線基板及び電子装置 Active JP7693830B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021196776 2021-12-03
JP2021196776 2021-12-03
PCT/JP2022/044308 WO2023100964A1 (ja) 2021-12-03 2022-12-01 配線基板及び電子装置

Publications (3)

Publication Number Publication Date
JPWO2023100964A1 JPWO2023100964A1 (https=) 2023-06-08
JPWO2023100964A5 JPWO2023100964A5 (https=) 2024-08-16
JP7693830B2 true JP7693830B2 (ja) 2025-06-17

Family

ID=86612307

Family Applications (1)

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JP2023565074A Active JP7693830B2 (ja) 2021-12-03 2022-12-01 配線基板及び電子装置

Country Status (4)

Country Link
EP (1) EP4444046A1 (https=)
JP (1) JP7693830B2 (https=)
CN (1) CN118339929A (https=)
WO (1) WO2023100964A1 (https=)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017170389A1 (ja) 2016-03-30 2017-10-05 京セラ株式会社 高周波基板、高周波パッケージおよび高周波モジュール
WO2018074100A1 (ja) 2016-10-21 2018-04-26 京セラ株式会社 高周波基体、高周波パッケージおよび高周波モジュール
WO2020040072A1 (ja) 2018-08-21 2020-02-27 Ｎｇｋエレクトロデバイス株式会社 配線基板、パッケージおよびモジュール

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3598408B2 (ja) * 1996-08-07 2004-12-08 富士通株式会社 集積回路パッケージ
JP2002057513A (ja) * 2000-08-11 2002-02-22 Denso Corp ミリ波モジュール

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017170389A1 (ja) 2016-03-30 2017-10-05 京セラ株式会社 高周波基板、高周波パッケージおよび高周波モジュール
WO2018074100A1 (ja) 2016-10-21 2018-04-26 京セラ株式会社 高周波基体、高周波パッケージおよび高周波モジュール
WO2020040072A1 (ja) 2018-08-21 2020-02-27 Ｎｇｋエレクトロデバイス株式会社 配線基板、パッケージおよびモジュール

Also Published As

Publication number Publication date
WO2023100964A1 (ja) 2023-06-08
JPWO2023100964A1 (https=) 2023-06-08
EP4444046A1 (en) 2024-10-09
CN118339929A (zh) 2024-07-12

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