JP7615904B2 - 電界効果トランジスタとその製造方法 - Google Patents

電界効果トランジスタとその製造方法 Download PDF

Info

Publication number
JP7615904B2
JP7615904B2 JP2021098031A JP2021098031A JP7615904B2 JP 7615904 B2 JP7615904 B2 JP 7615904B2 JP 2021098031 A JP2021098031 A JP 2021098031A JP 2021098031 A JP2021098031 A JP 2021098031A JP 7615904 B2 JP7615904 B2 JP 7615904B2
Authority
JP
Japan
Prior art keywords
region
trench
regions
semiconductor substrate
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2021098031A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022189453A5 (https=
JP2022189453A (ja
Inventor
佑一郎 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP2021098031A priority Critical patent/JP7615904B2/ja
Priority to CN202280032568.4A priority patent/CN117242582A/zh
Priority to PCT/JP2022/001571 priority patent/WO2022259593A1/ja
Publication of JP2022189453A publication Critical patent/JP2022189453A/ja
Publication of JP2022189453A5 publication Critical patent/JP2022189453A5/ja
Priority to US18/461,679 priority patent/US12557350B2/en
Application granted granted Critical
Publication of JP7615904B2 publication Critical patent/JP7615904B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/051—Forming charge compensation regions, e.g. superjunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H10D62/156—Drain regions of DMOS transistors
    • H10D62/157—Impurity concentrations or distributions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
JP2021098031A 2021-06-11 2021-06-11 電界効果トランジスタとその製造方法 Active JP7615904B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2021098031A JP7615904B2 (ja) 2021-06-11 2021-06-11 電界効果トランジスタとその製造方法
CN202280032568.4A CN117242582A (zh) 2021-06-11 2022-01-18 场效应晶体管及其制造方法
PCT/JP2022/001571 WO2022259593A1 (ja) 2021-06-11 2022-01-18 電界効果トランジスタとその製造方法
US18/461,679 US12557350B2 (en) 2021-06-11 2023-09-06 Field-effect transistor and method for manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2021098031A JP7615904B2 (ja) 2021-06-11 2021-06-11 電界効果トランジスタとその製造方法

Publications (3)

Publication Number Publication Date
JP2022189453A JP2022189453A (ja) 2022-12-22
JP2022189453A5 JP2022189453A5 (https=) 2023-05-16
JP7615904B2 true JP7615904B2 (ja) 2025-01-17

Family

ID=84425611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021098031A Active JP7615904B2 (ja) 2021-06-11 2021-06-11 電界効果トランジスタとその製造方法

Country Status (4)

Country Link
US (1) US12557350B2 (https=)
JP (1) JP7615904B2 (https=)
CN (1) CN117242582A (https=)
WO (1) WO2022259593A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7717010B2 (ja) * 2022-03-08 2025-08-01 株式会社デンソー 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011253837A (ja) 2010-05-31 2011-12-15 Denso Corp 炭化珪素半導体装置およびその製造方法
JP2020155739A (ja) 2019-03-22 2020-09-24 富士電機株式会社 絶縁ゲート型半導体装置
JP2020191401A (ja) 2019-05-23 2020-11-26 富士電機株式会社 半導体装置及び半導体装置の製造方法
JP2021068741A (ja) 2019-10-18 2021-04-30 富士電機株式会社 半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0403934D0 (en) 2004-02-21 2004-03-24 Koninkl Philips Electronics Nv Trench-gate semiconductor devices and the manufacture thereof
CN100502041C (zh) * 2005-04-28 2009-06-17 恩益禧电子股份有限公司 半导体器件
JP5196980B2 (ja) * 2007-12-10 2013-05-15 株式会社東芝 半導体装置
EP2091083A3 (en) 2008-02-13 2009-10-14 Denso Corporation Silicon carbide semiconductor device including a deep layer
JP6283468B2 (ja) 2013-03-01 2018-02-21 株式会社豊田中央研究所 逆導通ｉｇｂｔ
JP2014236171A (ja) 2013-06-05 2014-12-15 ローム株式会社 半導体装置およびその製造方法
JP2015195262A (ja) 2014-03-31 2015-11-05 マイクロン テクノロジー， インク． 半導体装置及びその製造方法
JP6255111B2 (ja) * 2014-09-17 2017-12-27 株式会社日立製作所 半導体装置、インバータモジュール、インバータ、鉄道車両、および半導体装置の製造方法
CN105977302A (zh) * 2016-07-06 2016-09-28 电子科技大学 一种具有埋层结构的槽栅型mos
JP2019087611A (ja) 2017-11-06 2019-06-06 トヨタ自動車株式会社 スイッチング素子とその製造方法
JP7052330B2 (ja) * 2017-12-13 2022-04-12 富士電機株式会社 絶縁ゲート型半導体装置及びその製造方法
JP7622449B2 (ja) * 2021-01-22 2025-01-28 富士電機株式会社 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011253837A (ja) 2010-05-31 2011-12-15 Denso Corp 炭化珪素半導体装置およびその製造方法
JP2020155739A (ja) 2019-03-22 2020-09-24 富士電機株式会社 絶縁ゲート型半導体装置
JP2020191401A (ja) 2019-05-23 2020-11-26 富士電機株式会社 半導体装置及び半導体装置の製造方法
JP2021068741A (ja) 2019-10-18 2021-04-30 富士電機株式会社 半導体装置

Also Published As

Publication number Publication date
US12557350B2 (en) 2026-02-17
CN117242582A (zh) 2023-12-15
JP2022189453A (ja) 2022-12-22
US20230411449A1 (en) 2023-12-21
WO2022259593A1 (ja) 2022-12-15

Similar Documents

Publication Publication Date Title
JP7537377B2 (ja) 電界効果トランジスタとその製造方法
JP4980663B2 (ja) 半導体装置および製造方法
US10468520B2 (en) Switching element and method of manufacturing the same
JP2019087611A (ja) スイッチング素子とその製造方法
JP7717900B2 (ja) 半導体装置
JP7107718B2 (ja) スイッチング素子の製造方法
US12205983B2 (en) Semiconductor device and manufacturing method of semiconductor device
JP7651403B2 (ja) 電界効果トランジスタとその製造方法
CN101964343A (zh) 半导体装置
JP7694816B2 (ja) 半導体装置とその製造方法
US20230246102A1 (en) Superjunction semiconductor device
JP2017191817A (ja) スイッチング素子の製造方法
US20230369483A1 (en) Semiconductor device and manufacturing method of semiconductor device
JP7615904B2 (ja) 電界効果トランジスタとその製造方法
JP2019096732A (ja) 半導体装置
JP7824244B2 (ja) 半導体装置とその製造方法
CN117581382A (zh) 半导体装置和半导体装置的制造方法
KR102608092B1 (ko) 절연게이트 양극성 트랜지스터 및 제조방법
JP7852457B2 (ja) 半導体装置とその製造方法
US20250248065A1 (en) Semiconductor device and method for manufacturing the same
JP7852567B2 (ja) スイッチング素子の製造方法
JP7842051B2 (ja) スイッチング素子の製造方法
US20250324658A1 (en) Semiconductor device
JP7111061B2 (ja) スイッチング素子
JP2024167649A (ja) スイッチング素子の製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230508

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230508

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20240730

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240912

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20241203

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20241216

R150 Certificate of patent or registration of utility model

Ref document number: 7615904

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150