JP7404600B2 - 半導体集積回路 - Google Patents
半導体集積回路 Download PDFInfo
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- JP7404600B2 JP7404600B2 JP2019200243A JP2019200243A JP7404600B2 JP 7404600 B2 JP7404600 B2 JP 7404600B2 JP 2019200243 A JP2019200243 A JP 2019200243A JP 2019200243 A JP2019200243 A JP 2019200243A JP 7404600 B2 JP7404600 B2 JP 7404600B2
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- 239000004065 semiconductor Substances 0.000 title claims description 94
- 239000012535 impurity Substances 0.000 claims description 80
- 239000000758 substrate Substances 0.000 claims description 21
- 230000005684 electric field Effects 0.000 claims description 11
- 239000004020 conductor Substances 0.000 claims description 6
- 230000015556 catabolic process Effects 0.000 description 19
- 230000000694 effects Effects 0.000 description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 229920005591 polysilicon Polymers 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7838—Field effect transistors with field effect produced by an insulated gate without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs
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- H01L29/0692—Surface layout
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
N型不純物領域18は半導体集積回路10のカソードを構成する層の一部であり、N+コンタクト領域34を介してカソード電極22に接続されている。P型不純物領域16とN型不純物領域18との界面には、PN接合が形成されている。ここで、本実施の形態では、P-は比較的低い濃度のP型不純物領域を、P+は比較的濃度の高いP型不純物領域を、N-は比較的低い濃度のN型不純物領域を、N+は比較的濃度の高いN型不純物領域を、各々意味している。
ポリシリコン24は、SOIウェハのシリコン半導体層に形成されたトレンチ29(溝)を充填して形成されている。本実施の形態に係るトレンチ29は、一例として、埋め込み絶縁膜14に到達する深さを有している。酸化膜28は、例えばシリコン酸化膜(SiO2)を用いてトレンチ29の底部を含む内壁に形成されている。トレンチ29によって、例えば半導体集積回路10を他の回路素子から容易に分離することができる。ポリシリコン24をトレンチ29に充填することにより、後述するように埋め込み絶縁膜14に連なるポリシリコン24にバイアス電圧(本実施の形態では接地電位)を印加することができる。なお、「ポリシリコン24」は、本発明に係る「導電体」の一例である。
そのため、埋め込み絶縁膜14を挟んで対向するGND電位の半導体基板12に対して負バイアスが印加されると、P型不純物領域16が埋め込み絶縁膜14と接する界面付近まで空乏化し、半導体基板12とP型不純物領域16との間の電位差に起因するブレークダウンが抑制される。このため、埋め込み絶縁膜14(BOX層)の膜厚を従来技術に比較して薄くする(例えば、4μm程度まで薄くする)ことが可能となっている。この点が、BOX層2と接する絶縁構造で耐圧を確保する構造となっている、上述の特許文献1に係る半導体装置と根本的に異なる点である。
Claims (6)
- 第1導電型の基板と、
前記基板上に設けられた埋め込み絶縁膜と、
前記埋め込み絶縁膜上に設けられた第1導電型の活性層と、
前記活性層内に形成された第2導電型の第1不純物領域と、
前記第1不純物領域を囲んで前記活性層内に前記第1不純物領域と離隔して形成された第2導電型の電界緩和層と、
前記電界緩和層を囲んで前記活性層内に形成された第1導電型の第2不純物領域と、
前記第2不純物領域を囲んで形成され、前記埋め込み絶縁膜に達する溝と、
を含む半導体集積回路。 - 第1導電型の基板と、
前記基板上に設けられた埋め込み絶縁膜と、
前記埋め込み絶縁膜上に設けられた第1導電型の活性層と、
前記活性層内に形成された第2導電型のコンタクト領域と、
前記活性層内に形成され、前記コンタクト領域に接続された第2導電型の第1不純物領域と、
前記第1不純物領域を囲んで前記活性層内に形成された第2導電型の電界緩和層と、
前記電界緩和層を囲んで前記活性層内に形成された第1導電型の第2不純物領域と、
前記第2不純物領域を囲んで形成され、前記埋め込み絶縁膜に達する溝と、
を含む半導体集積回路。 - 前記溝の内面に形成された酸化膜と、
前記第2不純物領域を囲むとともに前記酸化膜に隣接して前記活性層内に形成された第2導電型の第3不純物領域と、をさらに含む
請求項1または2に記載の半導体集積回路。 - 前記酸化膜を介して前記溝の内部に形成された導電体をさらに含み、
前記基板、前記第1不純物領域、および前記導電体に第1電位を付与し、前記第2不純物領域に前記第1電位より低い第2電位を付与した場合に、前記活性層の全体に亘って空乏層が形成される
請求項3に記載の半導体集積回路。 - 前記基板の平面視での外形形状がトラック形状であり、
前記電界緩和層、前記第2不純物領域、前記溝、および前記第3不純物領域の各々が、前記基板の外形形状に沿ってトラック形状に形成されている
請求項3または請求項4に記載の半導体集積回路。 - 前記第1導電型がP型であり、前記第2導電型がN型である
請求項1から請求項5のいずれか1項に記載の半導体集積回路。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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JP2019200243A JP7404600B2 (ja) | 2019-11-01 | 2019-11-01 | 半導体集積回路 |
PCT/JP2020/040320 WO2021085437A1 (ja) | 2019-11-01 | 2020-10-27 | 半導体集積回路 |
CN202080073210.7A CN114556586A (zh) | 2019-11-01 | 2020-10-27 | 半导体集成电路 |
US17/771,134 US11973146B2 (en) | 2019-11-01 | 2020-10-27 | Semiconductor integrated circuit |
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JP2019200243A JP7404600B2 (ja) | 2019-11-01 | 2019-11-01 | 半導体集積回路 |
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JP2013084903A (ja) | 2011-09-27 | 2013-05-09 | Denso Corp | 横型素子を有する半導体装置 |
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JP2896141B2 (ja) * | 1987-02-26 | 1999-05-31 | 株式会社東芝 | 高耐圧半導体素子 |
US5294825A (en) | 1987-02-26 | 1994-03-15 | Kabushiki Kaisha Toshiba | High breakdown voltage semiconductor device |
US5241210A (en) * | 1987-02-26 | 1993-08-31 | Kabushiki Kaisha Toshiba | High breakdown voltage semiconductor device |
JP3293871B2 (ja) * | 1991-01-31 | 2002-06-17 | 株式会社東芝 | 高耐圧半導体素子 |
EP1138082A1 (en) * | 1999-09-16 | 2001-10-04 | Koninklijke Philips Electronics N.V. | Semiconductor device |
JP4204895B2 (ja) | 2003-05-12 | 2009-01-07 | 三菱電機株式会社 | 半導体装置 |
JP5757145B2 (ja) * | 2011-04-19 | 2015-07-29 | 富士電機株式会社 | 半導体装置 |
CN103094359B (zh) * | 2011-10-31 | 2016-05-11 | 无锡华润上华半导体有限公司 | 高压肖特基二极管及其制作方法 |
JP6098041B2 (ja) * | 2012-04-02 | 2017-03-22 | 富士電機株式会社 | 半導体装置 |
US10217733B2 (en) * | 2015-09-15 | 2019-02-26 | Semiconductor Components Industries, Llc | Fast SCR structure for ESD protection |
FR3094837B1 (fr) * | 2019-04-05 | 2022-09-09 | St Microelectronics Tours Sas | Dispositif de protection contre des décharges électrostatiques |
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JP2013084903A (ja) | 2011-09-27 | 2013-05-09 | Denso Corp | 横型素子を有する半導体装置 |
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JP2021072426A (ja) | 2021-05-06 |
CN114556586A (zh) | 2022-05-27 |
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