JP7373073B2 - 半導体パッケージ用アンダーフィルフィルム及びこれを用いた半導体パッケージの製造方法 - Google Patents
半導体パッケージ用アンダーフィルフィルム及びこれを用いた半導体パッケージの製造方法 Download PDFInfo
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- JP7373073B2 JP7373073B2 JP2022533658A JP2022533658A JP7373073B2 JP 7373073 B2 JP7373073 B2 JP 7373073B2 JP 2022533658 A JP2022533658 A JP 2022533658A JP 2022533658 A JP2022533658 A JP 2022533658A JP 7373073 B2 JP7373073 B2 JP 7373073B2
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Classifications
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Description
<半導体パッケージ用アンダーフィルフィルム>
図1は、本発明の第1の実施例に係る半導体パッケージ用アンダーフィルフィルムを概略的に示した断面図であり、図2は、本発明の第2の実施例に係る半導体パッケージ用アンダーフィルフィルムを概略的に示した断面図である。
本発明に係るアンダーフィルフィルムにおいて、基材11は、接着層を支持すると共に接着層の表面を保護する部分であって、アンダーフィルフィルムの使用時に剥離除去される。
本発明に係るアンダーフィルフィルムにおいて、接着層12は、基材11の一面上に配置されるものであって、半導体パッケージングの際に、半導体チップのパッケージ基板への位置合わせを行う時、半導体チップをパッケージ基板に接着させることができ、アンダーフィル(underfill)として半導体チップとパッケージ基板との間の熱膨張係数の差により発生する応力と歪を再分配することができる。
a及びbは、それぞれ、1~4の整数であり、
複数のR1及び複数のR2は、互いに同一又は異なり、それぞれ独立に、水素、ハロゲン、C1~C10のアルキル基、C3~C20のシクロアルキル基、C5~C20のアリール基、及びニトロ基からなる群から選択され、具体的には、それぞれ独立に、水素、ハロゲン、C1~C5のアルキル基、C3~C10のシクロアルキル基、C5~C10のアリール基、及びニトロ基からなる群から選択され、
R3~R8は、互いに同一又は異なり、それぞれ独立に、水素、又はヒドロキシ基であり、但し、R3~R8のうちの少なくとも1つがヒドロキシ基であり、
X1は、単結合、又はC1~C10のアルキレン基であり、具体的には、単結合、又はC1~C5のアルキレン基であり、
Y1及びY2は、互いに同一又は異なり、それぞれ独立に、水素、ヒドロキシ基、又はエポキシ基であり、但し、Y1及びY2のうちの少なくとも1つは、エポキシ基であり、
nは、30~400の整数である。)
n1は、1又は2であり、
n2は、0~2の整数であり、
X1~X6は、互いに同一又は異なり、それぞれ独立に、N又はC(R1)であり、但し、X1~X6のうちの1つ以上がNであり、
Y1~Y6は、互いに同一又は異なり、それぞれ独立に、N(R2)又はC(R3)(R4)であり、但し、Y1~Y6のうちの1つ以上がN(R2)であり、
このとき、複数のC(R1)は、互いに同一又は異なり、複数のN(R2)は、互いに同一又は異なり、複数のC(R3)(R4)は、互いに同一又は異なり、
R1、R2、R3、及びR4は、それぞれ独立に、水素、重水素(D)、ハロゲン、シアノ基、ニトロ基、C1~C20のアルキル基、C2~C20のアルケニル基、及びC2~C20のアルキニル基からなる群から選択される。
この場合、本発明の接着層は、取り扱いが容易であり、接着力に優れ、かつ約160~170℃での最低溶融粘度が約3000Pa.s以下であるため、ボイドの発生が極力抑制され、充填性に優れているため、接続信頼性を向上させることができる。
なお、本発明は、上述したアンダーフィルフィルム10A、10Bを用いて、種々の半導体パッケージの製造方法を提供することができる。特に、上記アンダーフィルフィルム10A、10Bは、約160~170℃で最低溶融粘度が約300Pa.s以下と低いため、約200℃、約1~3秒間、圧着によって半導体チップとパッケージ基板との位置合わせを行う場合、アンダーフィルフィルムは、容易に流動性が得られ、半導体チップとパッケージ基板とのギャップ(gap)を、ボイドが発生することなく充填することができ、これにより、半導体パッケージの接続信頼性が向上することができる。従って、本発明は、上述のようなアンダーフィルフィルムを使用することで、半導体パッケージの製造工程を簡素化させ、かつ生産効率を向上させると共に、接続信頼性に優れた半導体パッケージを製造することが可能である。
図3に示されるように、バンプ21を備えた半導体チップ20のバンプ21上に上記アンダーフィルフィルム10A、10Bの接着層12を配置する(以下、「ステップS100」)。
上記ステップS100で接着層12が圧着された半導体チップ20を、パッケージ基板30上に位置合わせする(以下、「ステップS200」)。
図5に示されるように、半導体チップ20のバンプ21を溶融させ、半導体チップ20とパッケージ基板30とを、電気的、機械的に接続する(以下、「ステップS300」)。
図6に示されるように、上記ステップS300で接続された半導体チップ20とパッケージ基板30との間に配置された接着層12を硬化させる(以下、「ステップS400」)。
1-1.接着樹脂組成物の製造
下記表1に示す組成により各成分を混合して実施例1~3及び比較例1の接着樹脂組成物を製造した。表1に示す各成分の含有量単位は、重量%であり、当該樹脂組成物の総量を基準としている。
PET離型フィルム(厚さ:38μm)の一面上に、実施例1-1で製造された各接着用樹脂組成物をダイコーティングした後、乾燥して接着層(厚さ:18μm)を形成し、非導電性接着フィルムを製造した。
実施例1~3及び比較例1でそれぞれ製造された非導電性接着フィルムの物性を、以下のようにそれぞれ測定し、測定結果を下記表2に示す。
示差走査熱量分析器(Differential Scanning Calorimetry、DSC)を用いて、非導電性接着フィルムのオンセット温度を測定した。
レオメーターを用いて、非導電性接着フィルムを、毎分10℃ずつ、50℃から300℃まで昇温しながら、粘度を測定した。
Claims (11)
- 基材;及び、
上記基材の一面に配置され、160~170℃における最低溶融粘度が3000Pa.s以下である接着層;
を含み、
示差走査熱量分析器(DSC)上の開始温度(Onset Temperature)が、160~220℃の範囲である、半導体パッケージ用アンダーフィルフィルム。 - 上記接着層を、バンプ(bump)を備えた半導体チップと、ボンディングパッドを備えたパッケージ基板との間に位置させ、200℃、30~100N、1~3秒の条件下で圧着する場合、上記接着層のボイド面積率が、1m2当たり1%以下である、請求項1に記載の半導体パッケージ用アンダーフィルフィルム。
- 上記接着層の厚さは、上記半導体チップとパッケージ基板との間の間隔の80~120%の範囲である、請求項2に記載の半導体パッケージ用アンダーフィルフィルム。
- 上記接着層は、(a)液状エポキシ樹脂、フェノキシ樹脂、及び多官能性エポキシ樹脂を含むエポキシ樹脂;(b)酸無水物系硬化剤;(c)含窒素(N)ヘテロ環化合物;及び、(d)フィラー(filler);を含む接着樹脂組成物の硬化物である、請求項1に記載の半導体パッケージ用アンダーフィルフィルム。
- 上記含窒素ヘテロ環化合物は、下記化2で示される化合物、及び下記化3で示される化合物からなる群から選択される1種以上の化合物である、請求項4に記載の半導体パッケージ用アンダーフィルフィルム:
(上記化2及び3中、
n1は、1又は2であり、
n2は、0~2の整数であり、
X1~X6は、互いに同一又は異なり、それぞれ独立に、N又はC(R1)であり、但し、X1~X6のうちの1つ以上がNであり、
Y1~Y6は、互いに同一又は異なり、それぞれ独立に、N(R2)又はC(R3)(R4)であり、但し、Y1~Y6のうちの1つ以上がN(R2)であり、
このとき、複数のC(R1)は、互いに同一又は異なり、複数のN(R2)は、互いに同一又は異なり、複数のC(R3)(R4)は、互いに同一又は異なり、
R1、R2、R3、及びR4は、それぞれ独立に、水素、重水素(D)、ハロゲン、シアノ基、ニトロ基、C1~C20のアルキル基、C2~C20のアルケニル基、及びC2~C20のアルキニル基からなる群から選択される。) - 上記接着樹脂組成物は、当該接着樹脂組成物の総量を基準にして、
40~80重量%のエポキシ樹脂、
5~20重量%の硬化剤、
0.01~5重量%の含窒素ヘテロ環化合物、及び
10~50重量%のフィラー、
を含む、請求項4に記載の半導体パッケージ用アンダーフィルフィルム。 - 上記液状エポキシ樹脂、フェノキシ樹脂、及び多官能性エポキシ樹脂は、1:1~3:1~3の重量割合で含まれる、請求項4に記載の半導体パッケージ用アンダーフィルフィルム。
- バンプを備えた半導体チップのバンプ上に、請求項1~7のうちのいずれか1項に記載のアンダーフィルフィルムの接着層を圧着するステップ;
上記接着層が圧着された半導体チップのバンプを、上記バンプ位置に対応する領域にボンディングパッドを備えたパッケージ基板のボンディングパッド上に位置合わせするステップ;
上記半導体チップのバンプを溶融させ、半導体チップとパッケージ基板とを接続させるステップ;及び、
上記接続された半導体チップとパッケージ基板との間に配置されている接着層を硬化させるステップ;
を含む、半導体パッケージの製造方法。 - 上記バンプとボンディングパッドとの間の位置合わせステップは、200℃、30~100N、1~3秒の条件下で圧着して行われ、
上記圧着の後、上記接着層中のボイド面積率は、1%以下である、請求項8に記載の半導体パッケージの製造方法。 - 上記バンプ溶融ステップを行った後、上記接着層中のボイド面積率は、0.5%以下である、請求項9に記載の半導体パッケージの製造方法。
- 上記接着層の硬化温度は、170~250℃の範囲である、請求項8に記載の半導体パッケージの製造方法。
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