JP7369895B2 - 高度なコンタクトにおけるキャップ層形成のためのエリア選択的堆積 - Google Patents

高度なコンタクトにおけるキャップ層形成のためのエリア選択的堆積 Download PDF

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JP7369895B2
JP7369895B2 JP2020559409A JP2020559409A JP7369895B2 JP 7369895 B2 JP7369895 B2 JP 7369895B2 JP 2020559409 A JP2020559409 A JP 2020559409A JP 2020559409 A JP2020559409 A JP 2020559409A JP 7369895 B2 JP7369895 B2 JP 7369895B2
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dielectric layer
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metal layer
self
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JP2021522680A5 (https=
JP2021522680A (ja
JPWO2019210234A5 (https=
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タピリー，カンダバラ
ルーシンク，ゲリット
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Tokyo Electron Ltd
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    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
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    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
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    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
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    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
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    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
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    • H10P14/69394—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing titanium, e.g. TiO2
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    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
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    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
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    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2020559409A 2018-04-27 2019-04-26 高度なコンタクトにおけるキャップ層形成のためのエリア選択的堆積 Active JP7369895B2 (ja)

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US201862663916P 2018-04-27 2018-04-27
US62/663,916 2018-04-27
PCT/US2019/029444 WO2019210234A1 (en) 2018-04-27 2019-04-26 Area selective deposition for cap layer formation in advanced contacts

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US12327764B2 (en) 2021-07-30 2025-06-10 Applied Materials, Inc. Two-dimension self-aligned scheme with subtractive metal etch
KR20230074952A (ko) 2021-11-22 2023-05-31 삼성전자주식회사 커패시터 구조체를 포함하는 반도체 장치 및 이의 제조 방법
JP2024163650A (ja) * 2023-05-12 2024-11-22 東京エレクトロン株式会社 基板処理方法および基板処理装置
KR102901082B1 (ko) * 2023-08-17 2025-12-16 한양대학교 에리카산학협력단 영역 선택적 원자층 증착법, 이를 위한 장치, 및 이를 통해 제조된 hzo 물질막 구조체

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WO2018064292A1 (en) 2016-09-30 2018-04-05 Applied Materials, Inc. Methods of forming self-aligned vias
JP2019534384A (ja) 2016-11-03 2019-11-28 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ パターニングのための膜の堆積及び処理
JP2019534573A (ja) 2016-11-08 2019-11-28 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 自己整合パターニングのための方法
JP2020501344A (ja) 2016-11-08 2020-01-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ パターニング用途のためのボトムアップ柱状体の形状制御
JP2020530663A (ja) 2017-08-13 2020-10-22 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 自己整合高アスペクト比構造及びその作製方法
JP2020532870A (ja) 2017-09-05 2020-11-12 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ ３ｄメモリ構造における高アスペクト比孔形成へのボトムアップアプローチ

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