JP7330605B2 - ヘテロ構造デバイスのためのゲートスタック - Google Patents

ヘテロ構造デバイスのためのゲートスタック Download PDF

Info

Publication number
JP7330605B2
JP7330605B2 JP2018189353A JP2018189353A JP7330605B2 JP 7330605 B2 JP7330605 B2 JP 7330605B2 JP 2018189353 A JP2018189353 A JP 2018189353A JP 2018189353 A JP2018189353 A JP 2018189353A JP 7330605 B2 JP7330605 B2 JP 7330605B2
Authority
JP
Japan
Prior art keywords
gate dielectric
dielectric layer
layer
thickness
active layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2018189353A
Other languages
English (en)
Japanese (ja)
Other versions
JP2019075558A5 (enExample
JP2019075558A (ja
Inventor
ラムダニ ジャマール
Original Assignee
パワー・インテグレーションズ・インコーポレーテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パワー・インテグレーションズ・インコーポレーテッド filed Critical パワー・インテグレーションズ・インコーポレーテッド
Publication of JP2019075558A publication Critical patent/JP2019075558A/ja
Publication of JP2019075558A5 publication Critical patent/JP2019075558A5/ja
Application granted granted Critical
Publication of JP7330605B2 publication Critical patent/JP7330605B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/824—Heterojunctions comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP2018189353A 2017-10-12 2018-10-04 ヘテロ構造デバイスのためのゲートスタック Active JP7330605B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762571642P 2017-10-12 2017-10-12
US62/571,642 2017-10-12

Publications (3)

Publication Number Publication Date
JP2019075558A JP2019075558A (ja) 2019-05-16
JP2019075558A5 JP2019075558A5 (enExample) 2021-11-04
JP7330605B2 true JP7330605B2 (ja) 2023-08-22

Family

ID=64959072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018189353A Active JP7330605B2 (ja) 2017-10-12 2018-10-04 ヘテロ構造デバイスのためのゲートスタック

Country Status (5)

Country Link
US (1) US11114539B2 (enExample)
EP (1) EP3480854A3 (enExample)
JP (1) JP7330605B2 (enExample)
CN (1) CN109659361B (enExample)
TW (1) TWI835753B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11024545B2 (en) * 2018-10-31 2021-06-01 Taiwan Semiconductor Manufacturing Company Limited Semiconductor arrangement and method of manufacture
DE102019120692B4 (de) 2019-07-31 2025-12-11 Infineon Technologies Ag Leistungshalbleitervorrichtung und Verfahren
CN112652535A (zh) * 2020-12-22 2021-04-13 深圳市美浦森半导体有限公司 一种氮化镓异质结二极管制备方法及二极管
CN113016074B (zh) * 2021-02-19 2022-08-12 英诺赛科(苏州)科技有限公司 半导体器件
CN114270533B (zh) 2021-02-19 2024-01-02 英诺赛科(苏州)科技有限公司 半导体器件及其制造方法
US12218232B2 (en) * 2021-08-25 2025-02-04 Kabushiki Kaisha Toshiba Semiconductor device including compound and nitride members
TWI808477B (zh) 2021-09-01 2023-07-11 奈盾科技股份有限公司 半導體裝置的製造方法
US12243936B2 (en) 2021-12-28 2025-03-04 Raytheon Company AIN channel heterostructure field effect transistor
US20240047529A1 (en) * 2022-08-08 2024-02-08 Texas Instruments Incorporated Gan devices with modified heterojunction structure and methods of making thereof
WO2025004581A1 (ja) * 2023-06-28 2025-01-02 ソニーセミコンダクタソリューションズ株式会社 高電子移動度トランジスタ、ｒｆスイッチ回路、パワーアンプ回路および無線通信端末

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009302435A (ja) 2008-06-17 2009-12-24 Nippon Telegr & Teleph Corp <Ntt> 半導体装置
JP2013118377A (ja) 2011-12-01 2013-06-13 Power Integrations Inc パワートランジスタ装置のための多層構造を作製する方法、ヘテロ接合電界効果トランジスタ装置のための多層構造を作製する方法、および窒化物系ヘテロ接合電界効果トランジスタ装置
US20140077266A1 (en) 2012-09-14 2014-03-20 Power Integrations, Inc. Heterostructure Transistor with Multiple Gate Dielectric Layers

Family Cites Families (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020197835A1 (en) 2001-06-06 2002-12-26 Sey-Ping Sun Anti-reflective coating and methods of making the same
EP2267783B1 (en) 2001-07-24 2017-06-21 Cree, Inc. Insulating gate algan/gan hemt
JP3871607B2 (ja) 2001-12-14 2007-01-24 松下電器産業株式会社 半導体素子およびその製造方法
JP4221697B2 (ja) 2002-06-17 2009-02-12 日本電気株式会社 半導体装置
JP2004087587A (ja) 2002-08-23 2004-03-18 Mitsubishi Electric Corp 窒化物半導体装置およびその製造方法
US7253015B2 (en) 2004-02-17 2007-08-07 Velox Semiconductor Corporation Low doped layer for nitride-based semiconductor device
JP4398780B2 (ja) 2004-04-30 2010-01-13 古河電気工業株式会社 ＧａＮ系半導体装置
US7547928B2 (en) 2004-06-30 2009-06-16 Interuniversitair Microelektronica Centrum (Imec) AlGaN/GaN high electron mobility transistor devices
KR100889362B1 (ko) 2004-10-19 2009-03-18 삼성전자주식회사 다층 유전체막으로 이루어진 트랜지스터 및 그 제조 방법
US7456443B2 (en) 2004-11-23 2008-11-25 Cree, Inc. Transistors having buried n-type and p-type regions beneath the source region
JP2006245317A (ja) 2005-03-03 2006-09-14 Fujitsu Ltd 半導体装置およびその製造方法
US8482035B2 (en) 2005-07-29 2013-07-09 International Rectifier Corporation Enhancement mode III-nitride transistors with single gate Dielectric structure
EP1938385B1 (en) 2005-09-07 2014-12-03 Cree, Inc. Transistors with fluorine treatment
JP5032145B2 (ja) 2006-04-14 2012-09-26 株式会社東芝 半導体装置
US8399911B2 (en) 2006-06-07 2013-03-19 Imec Enhancement mode field effect device and the method of production thereof
US7939853B2 (en) 2007-03-20 2011-05-10 Power Integrations, Inc. Termination and contact structures for a high voltage GaN-based heterojunction transistor
JP2009032796A (ja) 2007-07-25 2009-02-12 Rohm Co Ltd 窒化物半導体素子および窒化物半導体素子の製造方法
JP4584293B2 (ja) 2007-08-31 2010-11-17 富士通株式会社 窒化物半導体装置、ドハティ増幅器、ドレイン電圧制御増幅器
CN100594591C (zh) 2007-10-17 2010-03-17 中国科学院微电子研究所 一种提高氮化镓基场效应晶体管性能的方法
CN101459080B (zh) 2007-12-12 2010-04-14 中国科学院微电子研究所 一种制作氮化镓基场效应晶体管的方法
US8309987B2 (en) 2008-07-15 2012-11-13 Imec Enhancement mode semiconductor device
US7985986B2 (en) 2008-07-31 2011-07-26 Cree, Inc. Normally-off semiconductor devices
US7968913B2 (en) * 2008-12-08 2011-06-28 National Semiconductor Corporation CMOS compatable fabrication of power GaN transistors on a <100> silicon substrate
US8168486B2 (en) 2009-06-24 2012-05-01 Intersil Americas Inc. Methods for manufacturing enhancement-mode HEMTs with self-aligned field plate
WO2010151721A1 (en) 2009-06-25 2010-12-29 The Government Of The United States Of America, As Represented By The Secretary Of The Navy Transistor with enhanced channel charge inducing material layer and threshold voltage control
US9991360B2 (en) 2009-06-26 2018-06-05 Cornell University Method for forming III-V semiconductor structures including aluminum-silicon nitride passivation
US9105703B2 (en) 2010-03-22 2015-08-11 International Rectifier Corporation Programmable III-nitride transistor with aluminum-doped gate
JP5635803B2 (ja) 2010-05-07 2014-12-03 トランスフォーム・ジャパン株式会社 化合物半導体装置の製造方法及び化合物半導体装置
WO2012083590A1 (en) * 2010-12-20 2012-06-28 The Hong Kong University Of Science And Technology Power semiconductor field effect transistor structure with charge trapping material in the gate dielectric
JP5758132B2 (ja) 2011-01-26 2015-08-05 株式会社東芝 半導体素子
JP5648523B2 (ja) 2011-02-16 2015-01-07 富士通株式会社 半導体装置、電源装置、増幅器及び半導体装置の製造方法
US9076853B2 (en) 2011-03-18 2015-07-07 International Rectifie Corporation High voltage rectifier and switching circuits
US9070758B2 (en) * 2011-06-20 2015-06-30 Imec CMOS compatible method for manufacturing a HEMT device and the HEMT device thereof
US20130099284A1 (en) 2011-10-20 2013-04-25 Triquint Semiconductor, Inc. Group iii-nitride metal-insulator-semiconductor heterostructure field-effect transistors
WO2013095643A1 (en) * 2011-12-23 2013-06-27 Intel Corporation Iii-n material structure for gate-recessed transistors
CN102723358B (zh) 2012-05-30 2015-01-07 苏州能讯高能半导体有限公司 绝缘栅场效应晶体管及其制造方法
CN103134476B (zh) 2013-01-28 2014-12-03 中国科学院研究生院 一种基于水平集算法的海陆分界线检测方法
US8928037B2 (en) 2013-02-28 2015-01-06 Power Integrations, Inc. Heterostructure power transistor with AlSiN passivation layer
US20160204207A1 (en) * 2013-09-27 2016-07-14 Intel Corporation Composite High-K Metal Gate Stack for Enhancement Mode GaN Semiconductor Devices
JP6301640B2 (ja) * 2013-11-28 2018-03-28 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
US10002958B2 (en) * 2016-06-08 2018-06-19 The United States Of America, As Represented By The Secretary Of The Navy Diamond on III-nitride device
KR102698026B1 (ko) * 2016-09-28 2024-08-21 삼성전자주식회사 유전막 형성 방법 및 반도체 장치의 제조 방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009302435A (ja) 2008-06-17 2009-12-24 Nippon Telegr & Teleph Corp <Ntt> 半導体装置
JP2013118377A (ja) 2011-12-01 2013-06-13 Power Integrations Inc パワートランジスタ装置のための多層構造を作製する方法、ヘテロ接合電界効果トランジスタ装置のための多層構造を作製する方法、および窒化物系ヘテロ接合電界効果トランジスタ装置
US20140077266A1 (en) 2012-09-14 2014-03-20 Power Integrations, Inc. Heterostructure Transistor with Multiple Gate Dielectric Layers

Also Published As

Publication number Publication date
CN109659361B (zh) 2022-03-04
CN109659361A (zh) 2019-04-19
US11114539B2 (en) 2021-09-07
EP3480854A3 (en) 2019-08-14
TW201926693A (zh) 2019-07-01
TWI835753B (zh) 2024-03-21
JP2019075558A (ja) 2019-05-16
US20190115443A1 (en) 2019-04-18
EP3480854A2 (en) 2019-05-08

Similar Documents

Publication Publication Date Title
JP7330605B2 (ja) ヘテロ構造デバイスのためのゲートスタック
US10446676B2 (en) Heterostructure power transistor with AlSiN passivation layer
TWI525814B (zh) 具有多個閘極電介質層的異質結構電晶體
Van Hove et al. CMOS process-compatible high-power low-leakage AlGaN/GaN MISHEMT on silicon
CN105938799B (zh) 半导体器件的制造方法和半导体器件
CN102881720B (zh) 半导体结构及其形成方法
CN111199883B (zh) 具有经调整的栅极-源极距离的hemt晶体管及其制造方法
US8803158B1 (en) High electron mobility transistor and method of forming the same
CN113228297A (zh) 半导体器件及其制造方法
CN114556561B (zh) 基于氮化物的半导体ic芯片及其制造方法
CN115440811B (zh) 半导体器件及其制造方法
CN115997287A (zh) 氮化物基半导体ic芯片及其制造方法

Legal Events

Date Code Title Description
RD13 Notification of appointment of power of sub attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7433

Effective date: 20210409

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210921

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20210921

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20220930

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20221004

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221228

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20230314

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230706

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20230714

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230808

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230808

R150 Certificate of patent or registration of utility model

Ref document number: 7330605

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150