JP2019075558A5 - - Google Patents

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JP2019075558A5
JP2019075558A5 JP2018189353A JP2018189353A JP2019075558A5 JP 2019075558 A5 JP2019075558 A5 JP 2019075558A5 JP 2018189353 A JP2018189353 A JP 2018189353A JP 2018189353 A JP2018189353 A JP 2018189353A JP 2019075558 A5 JP2019075558 A5 JP 2019075558A5
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gate dielectric
dielectric layer
thickness
layer
active layer
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JP2018189353A
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JP7330605B2 (ja
JP2019075558A (ja
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JP2018189353A 2017-10-12 2018-10-04 ヘテロ構造デバイスのためのゲートスタック Active JP7330605B2 (ja)

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US201762571642P 2017-10-12 2017-10-12
US62/571,642 2017-10-12

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JP2019075558A JP2019075558A (ja) 2019-05-16
JP2019075558A5 true JP2019075558A5 (enExample) 2021-11-04
JP7330605B2 JP7330605B2 (ja) 2023-08-22

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US (1) US11114539B2 (enExample)
EP (1) EP3480854A3 (enExample)
JP (1) JP7330605B2 (enExample)
CN (1) CN109659361B (enExample)
TW (1) TWI835753B (enExample)

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CN112652535A (zh) * 2020-12-22 2021-04-13 深圳市美浦森半导体有限公司 一种氮化镓异质结二极管制备方法及二极管
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