JP7196249B2 - Packages for semiconductor devices and semiconductor devices - Google Patents

Description

The present invention relates to a semiconductor device package including a substrate on which a semiconductor device is mounted, and a semiconductor device.

2. Description of the Related Art As a semiconductor device package for housing a semiconductor device such as an optical semiconductor device or a semiconductor integrated circuit device, a package having a substrate and a frame provided on the upper surface of the substrate is used. The upper surface of the substrate has a region on which a semiconductor element is mounted, such as the central portion thereof. The frame encloses a region in which the semiconductor element is mounted in plan view. A semiconductor device is manufactured by mounting a semiconductor element on a substrate and sealing the upper opening of the frame with a sealing material such as a lid. In a semiconductor device, a semiconductor element is hermetically sealed in a container composed of a substrate, a frame and a lid.

In the semiconductor element package and the semiconductor device, the semiconductor element in the container is electrically connected to the outside through a wiring conductor that conducts the inside and outside of the frame. The wiring conductors are provided, for example, in input/output terminals penetrating the frame from inside to outside (see Patent Documents 1 to 3).

Japanese Patent Application Laid-Open No. 2002-118191 JP 2012-226377 A Japanese Patent Application Laid-Open No. 2017-120901

In the conventional technology described above, there is a possibility that mechanical damage such as partial cracks may occur in the input/output terminals due to the stress generated when the flexible substrate for external connection is pressed against the input/output terminals for connection. On the other hand, it is conceivable to provide a support portion below the input/output terminal as described in Patent Document 3, for example. However, in this case as well, since the lower surface of the supporting portion and the lower surface of the substrate are at the same height, the stress due to the reaction from the mounting substrate during mounting is applied to the input/output terminals through the supporting portion, similarly mechanically It is feared that the

A semiconductor device package according to one aspect of the present invention includes: a substrate having a first upper surface including a mounting portion for a semiconductor device; an input/output terminal including: an insulating plate located on the first top surface and having a second bottom surface located on the opposite side of the second top surface; and first wiring located on the second top surface; a plate-like body having a third lower surface located on the opposite side of the upper surface . The substrate is positioned on the second lower surface. The plate-like body is positioned on the second lower surface with a gap from the substrate. The distance between the third lower surface and the second lower surface in side view is smaller than the distance between the first lower surface and the second lower surface in side view .

Further, a semiconductor device of the present invention includes the semiconductor element package having the above configuration, and a semiconductor element mounted on the mounting portion of the substrate.

According to the semiconductor element package of one aspect of the present invention, the stress acting on the input/output terminals is reduced by the plate-shaped body. Moreover, the possibility that stress acts on the input/output terminals from the plate-like body is also reduced. Therefore, it is possible to provide a semiconductor device package in which the possibility of mechanical destruction of the input/output terminals is reduced.

According to the semiconductor device of one aspect of the present invention, since the semiconductor device package having the above configuration is included, the possibility of mechanical destruction of the input/output terminals is reduced, and the semiconductor device is advantageous in improving reliability. can provide.

1 is a perspective view showing an exploded semiconductor device package according to an embodiment of the present invention; FIG. (a) is a side view showing a semiconductor device package according to an embodiment of the present invention, and (b) is a side view showing an enlarged part of (a). 1A is a plan view showing a semiconductor device package according to an embodiment of the present invention, and FIG. 1B is a bottom view showing a semiconductor device package according to an embodiment of the present invention; FIG. 1A is a top perspective view of a semiconductor device package according to an embodiment of the present invention, and FIG. 1B is a bottom perspective view of a semiconductor device package according to an embodiment of the present invention; FIG. 1A is a perspective view showing a semiconductor device according to an embodiment of the present invention, and FIG. 1B is a perspective view showing a state in which a lid is removed from FIG. 1A is a perspective view showing a part of a semiconductor element package and a semiconductor device according to an embodiment of the present invention, and FIG. 1B is a plan view thereof; FIG.

A semiconductor element package and a semiconductor device according to embodiments of the present invention will be described with reference to the drawings. The distinction between upper and lower sides in the following description is for the convenience of explanation, and does not define the upper and lower directions when the semiconductor element package and the semiconductor device are actually used.

FIG. 1 is an exploded perspective view showing a semiconductor device package 10 according to an embodiment of the present invention. FIG. 2(a) is a side view showing a semiconductor device package according to an embodiment of the present invention, and FIG. 2(b) is a side view showing an enlarged part of FIG. 2(a). FIG. 3(a) is a plan view showing a semiconductor device package according to an embodiment of the present invention, and FIG. 3(b) is a bottom view showing a semiconductor device package according to an embodiment of the present invention. FIG. 4(a) is a perspective view of the semiconductor device package according to the embodiment of the present invention viewed from above, and FIG. 4(b) is a perspective view of the semiconductor device package according to the embodiment of the present invention viewed from below. is. For example, a semiconductor device according to an embodiment of the present invention is constructed by mounting a semiconductor element in a semiconductor element package shown in FIGS. FIG. 5(a) is a perspective view showing a semiconductor device according to an embodiment of the present invention, and FIG. 5(b) is a perspective view showing a state in which the cover is removed from FIG. 5(a). FIG. 6(a) is a perspective view showing a part of a semiconductor element package and a semiconductor device according to an embodiment of the present invention, and FIG. 6(b) is a plan view thereof.

A semiconductor device package 10 of the embodiment includes a substrate 1 having an upper surface including a semiconductor device mounting portion 1a, and a frame 2 positioned on the upper surface of the substrate 1 so as to surround the mounting portion 1a in plan view. there is The frame 2 has an opening 2a on the substrate 1 side (that is, on the lower end side). The opening 2a of the frame 2 is closed by the input/output terminal 3 and is electrically connected to the inside and outside. That is, the input/output terminal 3 includes an insulating plate 31 positioned so as to block the opening 2a from the inside to the outside of the frame 2 and a first wiring 32 positioned on the upper surface of the insulating plate 31 . Further, the semiconductor device package 10 of the embodiment includes the plate-like body 4 and the flexible substrate 5 . The plate-like body 4 is positioned on the lower surface of the insulating plate 31 in a portion of the insulating plate 31 positioned outside the opening 2a. The plate-like body 4 has a lower surface located above the lower surface of the substrate 1 . The flexible substrate 5 also has a lower surface on which the second wiring 52 connected to the first wiring 32 is located.

Note that the mounting portion 1a is, for example, the central portion of the portion of the substrate 1 positioned inside the frame 2, or the like. In FIG. 3, an example of the mounting portion 1a is indicated by a virtual line (chain line). The range surrounded by the virtual lines is the mounting portion, and the semiconductor element 101 is mounted in this range.

As described above, the semiconductor device 100 is configured by mounting the semiconductor element 101 on the semiconductor element package 10 . Examples of semiconductor elements to be mounted include optical semiconductor elements such as semiconductor lasers (laser diodes, LD) and photodiodes (PD), semiconductor integrated circuit elements, and sensor elements such as optical sensors. In this embodiment, an example in which the semiconductor element 101 is an optical semiconductor element will be described. A semiconductor device 100 including an optical semiconductor element is an optical semiconductor device used for optical communication, for example.

The substrate 1 functions as a support member for supporting the semiconductor element 101 and as a radiator plate for dissipating heat generated by the semiconductor element 101 . The substrate 1 is made of a metal material such as copper, copper-tungsten (Cu--W) alloy, iron-nickel-cobalt (Fe--Ni--Co) alloy, iron--nickel (Fe--Ni) alloy. .

The substrate 1 is manufactured in a predetermined shape and size by subjecting an ingot of the above metal material to a process selected appropriately from various metal processes such as rolling, punching, polishing, cutting, and etching. be able to. Further, the substrate 1 may be coated with a plating layer such as a nickel plating layer and a gold plating layer on its surface. For example, thickness 0.5
A nickel plating layer with a thickness of about 9 μm and a gold plating layer with a thickness of about 0.5 to 3 μm are sequentially deposited on the surface of the substrate 1 by electroplating or the like. As a result, the substrate 1 can be effectively prevented from being oxidized and corroded, and the wettability of the brazing material to the substrate 1 is improved. By improving the wettability of the brazing material, it is possible to improve the connection strength and reliability when the semiconductor element 101 and the like are fixed to the upper surface of the substrate 1 with the brazing material.

The frame 2 surrounds the mounting portion 1b of the substrate 1 in a plan view. Also, the opening 2a of the frame 2 can be regarded as a notch formed by cutting the frame 2 on the substrate 1 side. The frame 2 has a rectangular frame-like shape in plan view, and the opening 2a may be formed in one side wall of the four side walls of the frame 2, and may be continuous with two adjacent side walls. It may be formed as one piece, or may be formed continuously on the three sidewalls.

The frame 2 is made of, for example, the same metal material as the substrate 1 (iron-nickel-cobalt alloy, etc.). Further, the frame 2 may be made of the metal material described above but different from the metal material of the substrate 1 . For example, the substrate 1 may be made of a copper-tungsten alloy and the frame 2 may be made of an iron-nickel alloy or the like. The frame body 2 can be manufactured in the same manner as the substrate 1 by forming an ingot of a metal material such as iron-nickel-cobalt into a predetermined shape and size by subjecting it to a process selected appropriately from the metal processes described above. .

In the semiconductor device package 10 of the embodiment, the frame 2 has a circular through hole 2b on the short side surface opposite to the opening 2a. The through hole 2b is a portion where an optical fiber for transmitting and receiving optical signals between the semiconductor element 101, which is an optical semiconductor element, and the outside is arranged. An optical fiber is inserted into the through hole 2b, and the end portion of the optical fiber is connected to the light receiving portion or the light emitting portion of the semiconductor element 101. FIG. This enables transmission and reception of optical signals between the semiconductor element 101 (optical semiconductor element) and the outside.

The through-holes 2b of the frame 2 are formed by drilling, for example. One end of a cylindrical fixing member including a ferrule or the like may be joined around the outer opening of the frame 2 of the through hole 2b, or the fixing member may be fitted and joined to the through hole 2b. An optical fiber is inserted into a longitudinal through-hole of a cylindrical fixing member, and the optical fiber is positioned and fixed to the frame 2 via the fixing member.

The surface of the frame 2 may also be coated with a plating layer in the same manner as the substrate 1 . The plated layer includes, for example, a nickel plated layer with a thickness of 0.5 to 9 μm and a gold plated layer with a thickness of 0.5 to 9 μm, which are successively applied to the surface of the frame 2 . In this case, characteristics such as corrosion resistance and brazing filler metal wettability in the surface portion of the frame 2 can be improved. Thereby, the possibility of oxidation corrosion of the frame body 2 can be reduced. In addition, a lid body 102, which will be described later, is attached to the frame body 2.
It is possible to improve the wettability of the brazing material when brazing other members, which is advantageous for improving the reliability of hermetic sealing of the package 10 for electronic elements.

The input/output terminal 3 is positioned from the inside to the outside of the frame 2 so as to close the opening 2a. By closing the opening 2 a with the input/output terminal 3 , the semiconductor element 101 can be hermetically sealed inside the frame 2 . In this case, the through hole 2b of the frame 2 is closed with the optical fiber and the fixing member as described above, and the upper opening of the frame 2 is closed with the lid 102. FIG. As a result, the substrate 1
(Upper surface), a container surrounded by the frame 2, the fixing member, the lid 102, etc. is formed, and the semiconductor element 101 is sealed in this container.

The input/output terminal 3 includes an insulating plate 31 and a first wiring 32 located on the upper surface of the insulating plate 31 . The first wiring 32 is positioned from the inside to the outside of the frame 2b. The first wiring 32 has a function of electrically conducting the inside and outside of the container. That is, electrical connection is established between the semiconductor element 101 mounted on the mounting portion 1a and the external electric circuit via the first wiring 32. FIG.

In the semiconductor device package 10 of this embodiment, an insulating plate 31 is formed by sequentially stacking two layers of insulating layers 31a and 31b. The upper surface of the upper insulating layer 31b corresponds to the upper surface of the insulating plate 31, and the first wiring 32 is located here.

As shown in FIG. 2 and the like, in this embodiment, on the outer side of the frame 2, the end portion of the lower insulating layer 31a is located outside the end portion of the upper insulating layer 31b. As a result, the portion of the insulating plate 31 located outside the frame 2 is stepped. A portion of the first wiring 32 is also located on the upper surface of the lower insulating layer 31a and is exposed to the outside at a stepped portion. The first wiring 32 on the upper surface of the lower insulating layer 31a extends to the inside of the frame 2 from the stepped portion through between the upper and lower insulating layers 31b and 31a. The first wiring 32 of the lower insulating layer 31a also has the function of electrically conducting the inside and outside of the frame 2. As shown in FIG.

Further, in the semiconductor device package 10 of this embodiment, another insulating layer 31c is located on the upper surface of the upper insulating layer 31a. Another insulating layer 31c covers the first wiring 32 so as to include a portion overlapping the frame 2 in plan view, and has a function of ensuring electrical insulation between the first wiring 32 and the frame 2. there is The other insulating layer 31c can be formed, for example, by using a material similar to that of the insulating layer 31, which will be described later, and by a similar method.

Electrical connection of the first wiring 32 to an external electric circuit is made via a flexible substrate 5 (Flexible Printed Circuits, FPC). The flexible substrate 5 functions as an external terminal for externally connecting the semiconductor element 101 and the semiconductor device 100 including the same. The flexible substrate 5 includes a relatively thin resin substrate 51 of about several tens of μm and wiring conductors provided on its surface. A wiring conductor of the flexible substrate 5 is electrically connected to the first wiring 32 and functions as a second wiring 52 electrically connecting it to an external electric circuit. The end portion of the second wiring 52 closer to the frame 2 is connected to the first wiring 32 so as to face the first wiring 32, and the end portion on the opposite side is connected to an external electric circuit. These connections are made, for example, via a conductive bonding material such as solder or a conductive adhesive.

3 to 5, the flexible substrate 5 is omitted for clarity. In the semiconductor device 100 shown in FIG. 5 as well, the flexible substrate 5 is connected to the end portion of the input/output terminal 3 opposite to the frame 2 as in the example shown in FIGS.

A plate-like body 4 is positioned on the lower surface of the insulating plate 31 at a portion of the insulating plate 31 positioned outside the opening 2a. The plate-like body 4 has a lower surface located above the lower surface of the substrate 1 . That is, if the semiconductor device package 10 is placed on a flat surface (such as the top surface of a table for mounting), the bottom surface of the substrate 1 is in contact with the flat surface, and the bottom surface of the plate-like body 4 is slightly away from the flat surface. It will be in a state of floating (so-called floating). The plate-like body 4 has a function of reducing deflection (deflection) of the input/output terminal 3 . In addition, this has the function of reducing the possibility of mechanical damage such as cracks occurring in the input/output terminal 3 .

That is, for example, the semiconductor element package 10 (flexible substrate 5 is not connected) is placed on the above-mentioned table (flat surface), and the flexible substrate 5 (second wiring 52) is connected to the input/output terminal 3 (first wiring 32). At this time, a downward force is applied from the upper side of the input/output terminal 3, and stress is generated in the connection portion of the input/output terminal 3 with the frame 2 and the like. At this time, according to the difference in height between the bottom surface of the substrate 1 and the bottom surface of the plate-like body 4, the input/output terminal 3 is slightly bent, and further deformation (deflection) of the input/output terminal 3 is suppressed. . As a result, the stress is suppressed, and mechanical damage such as cracks in the input/output terminals 3 is effectively suppressed.

In this case, if the lower surface of the plate-like body 4 and the lower surface of the substrate 1 are at the same height, the force at the time of connection of the flexible substrate 5 is applied from the plate-like body 4 to the input/output 2 as a reaction. The effect of stress reduction in the terminal 2 may be reduced. In contrast, in the semiconductor device package 10 of the embodiment, the input/output terminals 3 are slightly bent, so that the stress can be dispersed and reduced.

That is, in the semiconductor device package 10 of the embodiment, the stress acting on the input/output terminals 3 is reduced by the plate-like body 4 . Moreover, the possibility that stress acts on the input/output terminals 3 from the plate-like body 4 is also reduced. Therefore, it is possible to provide the semiconductor device package 10 in which the possibility of mechanical destruction of the input/output terminals 3 is reduced.

The height difference H between the lower surface of the substrate 1 and the lower surface of the plate-like body 4 is about 0.05 to 0.2 mm in order to obtain the effect of suppressing the mechanical breakage of the input/output terminals 3 as described above. is set in the range of If the height difference H is 0.05 mm or more, the input/output terminal 3 can be appropriately deformed (bent) to disperse the stress. Further, if the height difference H is 0.2 mm or less, excessive deformation (excessive deflection) of the input/output terminal 3 can be suppressed. Therefore, mechanical breakage of the input/output terminal 3 can be effectively suppressed.

In this case, the outer dimension of the substrate 1 in plan view is, for example, a square shape (rectangular shape) with a side length of about 10 to 50 mm. When the substrate 1 is rectangular in plan view, the length of the short side is about 5-30 mm and the length of the long side is about 10-50 mm. Further, the plate-like body 4 is, for example, shown in FIG.
And as shown in FIG. 6, etc., it has a rectangular shape, and the corner portions are formed in a flat shape or an arc shape. In other words, the plate-like body 4 is a plate-like member whose corners are processed into a C-plane or R-plane in plan view. The shape of the plate-like body 4 in a plan view can be set to various shapes as long as the deformation of the input/output terminals can be suppressed as described above, and may be an oval shape, for example.

The insulating plate 31 of the input/output terminal 3 is made of a ceramic material such as sintered aluminum oxide, sintered mullite, sintered aluminum nitride, sintered silicon nitride, and sintered glass ceramic. ing.

If the insulating plate 31 is made of, for example, an aluminum oxide sintered body, it can be manufactured as follows. First, raw material powders such as aluminum oxide, silicon oxide, calcium oxide and magnesium oxide are kneaded together with an organic solvent, a binder and the like to prepare a slurry. Next, this slurry is formed into a sheet by a method such as a doctor blade method or a lip coater method to produce a ceramic green sheet. After that, the ceramic green sheet is cut into a predetermined shape and size to produce a plurality of sheets, which are laminated one above the other and fired at a temperature of about 1300 to 1600°C. The insulating plate 31 can be manufactured by the above steps. In this case, each sheet becomes an insulating layer 31a, 31b after firing.

The first wiring 32 of the input/output terminal 3 is made of a metal material appropriately selected from metal materials such as tungsten, molybdenum, manganese, copper, silver, gold, palladium, and platinum. The first wiring 32 may be made of an alloy material containing these metal materials. These metal materials are formed by being applied to predetermined positions of the insulating plate 31 as metallized layers or plated layers, for example.

The first wiring 32 can be formed as follows if it is made of, for example, a metallized layer of tungsten. First, tungsten powder is kneaded with an appropriate organic solvent, a binder, and the like to prepare a tungsten metal paste. Next, this metal paste is applied in a predetermined pattern on the surface of the sheet to be the insulating plate 31 (insulating layers 31a and 31b) by a method such as screen printing. After that, this metal paste is co-fired together with the sheet under the above conditions. Through the steps described above, the first wiring 32 can be provided at a predetermined position on the insulating plate 31 .

The first wiring 32 may be formed by depositing a plating layer such as a nickel plating layer or a gold plating layer on the surface of the metallization layer. When the plating layer is adhered, oxidation corrosion of the first wiring 32 can be reduced. Also, it is possible to improve characteristics such as solder wettability when the first wiring 32 and the second wiring 52 are connected via solder. Thereby, the electrical and mechanical connection reliability between the first wiring 32 and the second wiring 52 can be improved. In other words, it is effective in improving the reliability of the semiconductor device package 10 .

The plate-like body 4 may be made of the same metal material as the substrate 1, or may be made of the same ceramic material as the insulating plate 31, for example. If the plate-like body 4 is made of the same metal material as the substrate 1, the plate-like body 4 is also used for input/output when connecting the substrate 1 and the frame 2 to the input/output terminals 3 as described later. It is easy to join to the terminal 3 . At this time, it is advantageous to improve the productivity of the semiconductor device package 10 and the like.

The joining of the input/output terminals 3 to the substrate 1 and the frame 2 (that is, the step of closing the opening 2a) is performed, for example, by positioning the input/output terminals 3 so as to close the opening 2a and temporarily fixing them with a jig or the like. This is done by heating these and fixing them with brazing material. In this case, a film or paste of brazing material such as silver solder is interposed between the input/output terminal 3, the substrate 1 and the frame 2, and heated in this state. A base metal layer for brazing may be provided at the joint portion of the input/output terminal 3 with the brazing material. This base metal layer can be provided by using the same metal material as the first wiring 32, for example, and by the same method. The above silver brazing material is, for example, a silver-copper based brazing material, such as BAg8 specified by JIS.

As described above, the semiconductor device 100 of the embodiment is formed by the semiconductor device package 10 configured as described above, the semiconductor device 101 mounted on the mounting portion 1a of the substrate 1, and the lid member 102 joined to the frame member 2. basically configured. In the semiconductor device 100, the semiconductor element 101 with respect to the mounting portion 1a
can be fixed using a bonding material appropriately selected from, for example, a low-melting-point brazing material such as tin-silver, a gold-silicon (Au--Si) bonding material, a resin-based adhesive, and a bonding material such as glass. For example, the semiconductor element 101 can be positioned and placed on the mounting portion 1a via a gold-silicon paste or film or the like, and then heated to bond and fix the semiconductor element 101 to the mounting portion 1a. .

Also, the semiconductor element 101 may be mounted and fixed on the mounting portion 1b of the substrate 1 via a mounting base (not shown). The mounting base is made of, for example, silicon (Si) or a dielectric material such as an aluminum oxide sintered body or an aluminum nitride sintered body having a coefficient of thermal expansion similar to that of the substrate 1 . This mounting base is a heat transfer medium for transferring heat from the semiconductor element 101 to the substrate 1, and also has a function of adjusting its height. By adjusting the height of the semiconductor element 101, for example, it is possible to facilitate the work of adjusting so that the optical axes of the semiconductor element 10 and the optical fiber are aligned. In other words, the semiconductor device 100 can be advantageous in terms of improving the accuracy of receiving and emitting light with respect to the optical fiber and productivity.

A wiring conductor (not shown) for transmitting a high-frequency signal and a conductor layer (not shown) for mounting the semiconductor element 101 are formed on the upper surface of the mounting base. good.
In this case, bonding wires may be provided for electrically connecting the electrodes of the semiconductor element 101 and the wiring conductors on the top surface of the mounting base. Electrical connections between the wiring conductors and the semiconductor element 101 may be made by conductive connections other than bonding wires, such as metal bumps or conductive adhesives.

When there is no mounting base, the semiconductor element 101 mounted on the mounting portion 1a and the first wiring 32 provided in the portion of the input/output terminal 3 located inside the frame 2 are, for example, They are electrically connected to each other via bonding wires (not shown). In the semiconductor device 100 having the above configuration, the semiconductor element 101 is electrically connected to the first wiring 32 and electrically connected to an external electric circuit via the first wiring 32 and the second wiring 52 .

As described above, the lid 102 closes the upper opening of the frame 2 and functions as a part of a container that airtightly accommodates the semiconductor element 101 . The lid body 102 is made of, for example, a metal material such as an iron-nickel-cobalt (Fe--Ni--Co) alloy or a ceramic material such as an aluminum oxide sintered body. The bonding between the lid 102 and the upper surface of the frame 2 is, for example, gold-tin (Au-Sn
) It is performed by a joining method using a low-melting brazing material such as alloy solder. Also, the joining of the lid 102 and the upper surface of the frame 2 may be performed by a welding method such as YAG (yttrium-aluminum-garnet) laser welding or resistance welding.

In a plan view, the semiconductor element package 10 and the semiconductor device 100 of the above embodiment are:
A plurality of first wirings 32 may be arranged in parallel with each other at intervals in the width direction of the upper surface of the insulating plate 31 . The width direction of the upper surface of the insulating plate 31 is the direction orthogonal to the length direction of the first wiring 32 on this upper surface (that is, the line width direction of the first wiring 32). Also, at this time, both ends in the width direction of the plate-like body 4 may be positioned outside the first wirings 32 positioned at both ends in the width direction of the array. In other words, the plate-like body 4 may have such a shape and outer dimensions as to include all of the plurality of first wirings 32 in the line width direction in plan view. If the plate-like body 4 has a rectangular shape as described above, it can easily be positioned so as to include all of the plurality of first wirings 32 in the line width direction in its long side direction.

In the case of the above configuration, when a force for connecting the second wiring 52 is applied to the input/output terminal 3 in the range corresponding to the entirety of the first wiring 32, the stress generated in the insulating plate 31 is applied to the plate-like shape. It can be effectively reduced by the body 4 . As a result, the possibility of mechanical damage to the input/output terminal 3 including the insulating plate 31 can be effectively reduced. That is, for the semiconductor device 100,
It is possible to effectively improve electrical connection reliability with an external electric circuit, hermetic sealing reliability, and the like. In addition, the semiconductor element package 10 can be made easier to manufacture such a semiconductor device 100 .

Further, in the semiconductor element package 10 and the semiconductor device 100 of the above embodiment, the difference in thermal expansion coefficient between the plate-like body 4 and the insulating plate 31 is larger than the difference in thermal expansion coefficient between the substrate 1 and the insulating plate 31. may In other words, the difference in coefficient of thermal expansion between the plate-like body 4 and the insulating plate 31 may be relatively large in the semiconductor device package 10 and the semiconductor device 100 . In other words, regarding the material of the plate-like body 4, there is relatively little need (compared to the substrate 1) to preferentially select a material that makes the difference in coefficient of thermal expansion with the insulating plate 31 particularly small. A metal material tends to have a larger coefficient of thermal expansion than the ceramic material forming the insulating plate 31. Therefore, by using a material having a relatively large coefficient of thermal expansion, when the plate-like body 4 is made of a metal material, The restrictions on material selection are reduced.

For example, when the plate-like body 4 is smaller than the substrate 1 as in the example shown in FIGS. The effect of thermal stress caused by the difference in thermal expansion coefficient between the shaped body 4 and the insulating substrate 31 is relatively small. Therefore, when the difference in coefficient of thermal expansion between the plate-like body 4 and the insulating substrate 31 is large, the plate-like body can be manufactured by selecting from a wider range of materials. Therefore, the productivity of the semiconductor device package 10 can be improved. In addition, the degree of freedom in designing the semiconductor device package 10 and the semiconductor device 100, for example, the thermal conductivity, magnetic permeability, color tone (appearance), economic efficiency, etc. of the plate-like body can be broadened.

The coefficient of thermal expansion mentioned above is the coefficient of linear expansion of each member constituting the plate-like body 4, the insulating plate 31, the substrate 1, and the like, for example. These coefficients of linear expansion and the like can be measured, for example, using a measuring device such as a thermomechanical analyzer.

Further, the semiconductor element package 10 and the semiconductor device 100 of the above embodiment may further include a through conductor 6 penetrating through the insulating plate 31 from the upper surface to the lower surface. Moreover, at this time, the plate-like body 4 may contain a metal material, and the first wiring 32 and the metal material of the plate-like body 4 may be electrically connected to each other via the through conductors 6 . The first wiring 32 electrically connected to the metal material of the plate-like body 4 via the through conductor 6 is a ground wiring that supplies a ground potential to the semiconductor element 101, for example.

In the above case, the ground potential of the first wiring 32 can be more stabilized. Thereby, it is possible to improve the transmission characteristics of the high-frequency signal transmitted through the first wiring 32 other than for grounding. In addition, when the plate-like body 4 is made of the same metal material as the substrate 1 and the like as described above, the first wiring 32 and the first wiring 32 can be formed by connecting the through conductors 6 to arbitrary locations of the plate-like body 4 . The plate-like body 4 can be electrically connected to each other. Moreover, since the area of the metal material portion of the plate-like body 4 is relatively large, the ground potential can be stabilized more effectively. Also, it is possible to effectively reduce the transfer of electromagnetic noise between the first wiring 32 and the outside.

The penetrating conductor 6 can be formed, for example, by using a metal material similar to that of the first wiring 32, applying a similar metal paste, and firing the paste. In this case, the insulating plate 31 or the ceramic green sheet to be the insulating plate 31 is preliminarily formed with through holes by a method such as mechanical drilling or laser processing. The above-mentioned metal paste is filled in the through holes by a method such as screen printing using vacuum suction, and then fired.

Also, the semiconductor element package 10 and the semiconductor device 100 of the above-described embodiment are shown in FIG.
As in the example shown in (b), the substrate 1 and the plate-like body 4 are each rectangular in plan view, and the side surface of the substrate 1 and the side surface of the plate-like body 4 are opposed to each other with a certain distance therebetween. Anything that is That is, one side surface of each of the substrate 1 and the plate-like body 4 may be opposed to each other, and there may be a gap having a constant width in plan view between these side surfaces. In other words, the substrate 1 and the plate-like body 4 do not have to be in contact with each other.

In such a case, the thermal expansion of the plate-like body 4 and the substrate 1 can be accommodated in the gap. Therefore, the possibility of thermal stress occurring between the substrate 1 and the plate-like body 4 can be effectively reduced, and the reliability of the semiconductor element package 10 and the semiconductor device 100 can be improved. .

In such a case, as described above, the input/output terminals 3 are positioned so as to cover the openings 2a, and in the process of joining the input/output terminals 3 to the substrate 1 and the frame 2, jigs or the like are used. Temporary fixation becomes easier. In other words, the semiconductor element package 10 and the semiconductor device 100 that are advantageous for improving production can be obtained. That is, in the case of such a configuration, part of the jig can be easily fitted into the gap between the side surface of the substrate 1 and the side surface of the plate-like body 4, and the part of the jig can be, for example, a plate-like shape. It may be included in a frame-like portion that surrounds the body 4 in plan view. As a result, it is possible to temporarily fix the plate-like body 4 or the like with a part of the jig so that it is difficult to move. In other words, the semiconductor element package 10 and the semiconductor device 100 are advantageous in improving the positional accuracy of the plate-like body 4 and improving productivity.

Further, the semiconductor element package 10 and the semiconductor device 100 of the above-described embodiment have the first wiring 32
Of these, the outer end L1 (the position of the imaginary line in FIG. 2) in the length direction orthogonal to the width direction of the upper surface of the insulating plate 31 may be positioned so as to overlap the plate-like body 4 in plan view. In the example shown in FIG. 2, the first wiring 32 on the upper surface of the upper insulating layer 31b has the above configuration. In such a case, even if a relatively large stress acts on the outer end L1 of the first wiring 32 when the flexible substrate 5 is connected, that portion is supported by the plate-like body 4 and the input/output terminal 3 (particularly, the It is possible to effectively reduce the possibility of mechanical damage to the insulating plate 31).

In the semiconductor device 100 of the embodiment, as described above, the upper opening of the frame 2 is closed with the lid, the opening 2a is closed with the input/output terminal 3, and the through hole 2b contains the optical fiber. The semiconductor element 101 mounted on the mounting portion 1a is hermetically sealed by closing with a fixing member or the like. The semiconductor element 101 can be electrically connected to an external electric circuit via the input/output terminals 3 and the flexible substrate 5 . Also, the semiconductor element 101 is optically connected to the outside via an optical fiber. If the semiconductor element 101 is a semiconductor laser, an optical signal is emitted according to an electrical signal transmitted from an external electric circuit, and the optical signal is transmitted to the outside through an optical fiber. If the semiconductor element 101 is a photodiode, an electric signal is transmitted in response to an optical signal transmitted from the outside through the optical fiber, and the electric signal is transmitted to the external electric circuit through the input/output terminal 3 and the flexible substrate 5. do.

Reference Signs List 1 Substrate 1a Mounting portion 2 Frame 2a Opening 2b Through hole 3 Input/output terminal
31 Insulating plate
31a, 31b... insulating layer
31c... other insulating layer
32 First wiring 4 Plate-like body 5 Flexible substrate
51 Resin substrate
52 Second wiring 6 Penetrating conductor
10 Package for semiconductor device
100 Semiconductor device
101 Semiconductor device
102 Lid body

Claims (8)

a substrate having a first upper surface including a mounting portion for a semiconductor element and a first lower surface located on the opposite side of the first upper surface;
an input/output terminal including an insulating plate having a second upper surface and a second lower surface located opposite to the second upper surface; and a first wiring located on the second upper surface;
a plate-like body having a third upper surface and a third lower surface located on the opposite side of the third upper surface ;
the substrate is located on the second bottom surface;
the plate-shaped body is positioned on the second lower surface with a gap from the substrate;
The semiconductor element package , wherein a distance between the third bottom surface and the second bottom surface in side view is smaller than a distance between the first bottom surface and the second bottom surface in side view . When viewed from the bottom, the distance between the inner edge of the plate-like body and the inner edge of the substrate facing the inner edge of the plate-like body is the distance between the outer edge of the plate-like body and the outer edge of the input/output terminal. 2. The semiconductor device package according to claim 1, wherein the distance is greater than the distance. In a plan view, the plate-like body has a rectangular shape,
3. The package for a semiconductor device according to claim 1, wherein corners of said plate-like body have curved portions. 4. The semiconductor according to claim 3 , wherein the distance between the short side of the plate-like member and the outer edge of the input/output terminal is greater than the distance between the long side of the plate-like member and the outer edge of the input/output terminal in plan view. Device package. In plan view, the insulating plate has a rectangular outer region located outside the first upper surface,
5. The semiconductor device package according to claim 1 , wherein an outer corner of said outer region has a notch. The insulating plate includes a first insulating layer, a second insulating layer laminated on the first insulating layer so as to be positioned inside an outer edge of the first insulating layer, and the second insulating layer. a third insulating layer laminated on the second insulating layer so as to be positioned inside the outer ends of the two insulating layers;
6. The outer edge of the third insulating layer according to any one of claims 1 to 5 , wherein the outer edge of the third insulating layer is located inside the inner edge of the plate-shaped body and outside the outer edge of the substrate. Package for semiconductor devices. A flexible substrate having the first wiring located on at least one of the top surface of the first insulating layer and the top surface of the second insulating layer, and having a second wiring connected to the first wiring. 7. The semiconductor device package according to claim 6 , which is bonded. A semiconductor device package according to any one of claims 1 to 7 ;
and a semiconductor element mounted on the mounting portion of the substrate.

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