JP2009158511A - Input/output terminal and package for housing semiconductor device - Google Patents

Input/output terminal and package for housing semiconductor device Download PDF

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JP2009158511A
JP2009158511A JP2007331503A JP2007331503A JP2009158511A JP 2009158511 A JP2009158511 A JP 2009158511A JP 2007331503 A JP2007331503 A JP 2007331503A JP 2007331503 A JP2007331503 A JP 2007331503A JP 2009158511 A JP2009158511 A JP 2009158511A
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conductor
input
output terminal
multilayer substrate
ceramic
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Takuji Ikeda
拓児 池田
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Sumitomo Metal SMI Electronics Device Inc
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Sumitomo Metal SMI Electronics Device Inc
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<P>PROBLEM TO BE SOLVED: To provide an input/output terminal that transmits a high-frequency signal to a line conductor without generating mismatching of characteristic impedance and improve bonding strength of a lead terminal, and to provide a package for housing a semiconductor device. <P>SOLUTION: The input/output terminal 10 includes: a line conductor 13 wherein a lead terminal 12 is connected with a ceramic multilayer substrate 11; a solid conductive film 16 which is connected with a ground conductor 14 through a conductor via 15 and is provided on the lower layer; a castellation conductor film 17 connected to the line conductor 13 and the ground conductor 14 respectively; and a ceramic erected body 18 to be bonded to the upper surface of the substrate 11. Notch sections 19 are provided in the periphery of ridges on the side of one side of the solid conductor film 16 under the line conductor 13 so that the insulator of the substrate 11 may be exposed over from an opening, and an insulator film 20 made of the same material as ceramic included in the substrate 11 is provided up to the upper surface of the solid conductor film 16 in the periphery including the notch sections. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、高周波信号を特性インピーダンスの不整合を発生させることなく伝搬させるための入出力端子、及びこの入出力端子を取り付けて高周波信号で作動する半導体素子を収納するための半導体素子収納用パッケージに関する。   The present invention relates to an input / output terminal for propagating a high-frequency signal without causing a mismatch in characteristic impedance, and a package for housing a semiconductor element for housing a semiconductor element that is operated by the high-frequency signal by attaching the input / output terminal. About.

近年のモジュールの高速化に伴い、高周波信号で作動する半導体素子を搭載するための半導体素子収納用パッケージには、半導体素子と外部との間で特性インピーダンスの不整合を発生させることなく高周波信号を伝播させるために入出力端子が用いられている。この入出力端子は、アルミナ（Ａｌ２Ｏ３）や、窒化アルミニウム（ＡｌＮ）等のセラミックや、プラスチックからなる誘電体基材に導体金属からなる信号線用や、接地線用の導体線路を形成して、そこにリード端子を取り付けるのに用いられている。 Along with the recent increase in the speed of modules, a package for housing a semiconductor element for mounting a semiconductor element that operates with a high-frequency signal can receive a high-frequency signal without causing a mismatch in characteristic impedance between the semiconductor element and the outside. Input / output terminals are used for propagation. This input / output terminal forms conductor lines for signal lines and ground lines made of conductive metal on a dielectric substrate made of ceramic such as alumina (Al 2 O 3 ) and aluminum nitride (AlN), and plastic. It is used to attach lead terminals there.

図３（Ａ）、（Ｂ）を参照しながら従来の入出力端子を説明する。ここで、図３（Ａ）は従来の入出力端子の斜視図、図３（Ｂ）は従来の入出力端子を構成するセラミック多層基板各層の説明図である。
図３（Ａ）、（Ｂ）に示すように、従来の入出力端子５０は、略四角形状のＡｌ２Ｏ３や、ＡｌＮ等のセラミックの例えば、２層の複数層からなるセラミック多層基板５１の最上層上面の一辺から相対向する他辺にかけて延設され、一辺側の端部に金属製のリード端子５２を接合するためのタングステン（Ｗ）や、モリブデン（Ｍｏ）等の導体金属からなる信号線用の線路導体５３を有している。また、この入出力端子５０は、一辺から相対向する他辺にかけて延設される線路導体５３に近接して併設されて一辺側の端部にリード端子５２を接合するための上記と同様の導体金属からなる接地導体５４を有している。 A conventional input / output terminal will be described with reference to FIGS. Here, FIG. 3A is a perspective view of a conventional input / output terminal, and FIG. 3B is an explanatory view of each layer of the ceramic multilayer substrate constituting the conventional input / output terminal.
As shown in FIGS. 3A and 3B, the conventional input / output terminal 50 is formed of a ceramic multilayer substrate 51 made of, for example, two or more layers of ceramics such as Al 2 O 3 having a substantially rectangular shape or AlN. It extends from one side of the top surface of the uppermost layer to the other side opposite to each other, and is made of a conductive metal such as tungsten (W) or molybdenum (Mo) for joining a metal lead terminal 52 to an end on one side. A signal line conductor 53 is provided. The input / output terminal 50 is provided in the vicinity of a line conductor 53 extending from one side to the other side opposite to each other, and is a conductor similar to the above for joining the lead terminal 52 to the end on one side. A ground conductor 54 made of metal is provided.

更に、この入出力端子５０は、接地導体５４にセラミック多層基板５１の上下層を導通させるための導体金属からなる導体ビア５５を介して接続され、広範囲の導体面積を確保するためにセラミック多層基板５１の下層に設けられる導体金属からなるベタ導体膜５６を有している。また、更に、この入出力端子５０は、セラミック多層基板５１の上面のリード端子５２が接合される一辺側の壁面に線路導体５３、及び接地導体５４のそれぞれと接続され、リード端子５２の接合強度を向上させるための導体金属からなるキャスタレーション導体膜５７を有している。また、更に、この入出力端子５０は、セラミック多層基板５１の上面に線路導体５３、及び接地導体５４の一部を間に挟んで接合される直方体状の上記と同様のＡｌ２Ｏ３や、ＡｌＮ等のセラミックからなるセラミック立設体５８を有している。そして、更に、この入出力端子５０には、線路導体５３の下方のベタ導体膜５６に、線路導体５３の略幅寸法に相当するセラミック多層基板５１の絶縁体が開口から露出する切り欠き部５９を有している。この切り欠き部５９は、キャスタレーション導体膜５７によってリード端子５２を強固に接合するためと共に、線路導体５３のキャスタレーション導体膜５７によって接地導体５４と電気的に導通状態にあるベタ導体膜５６に接触して線路導体５３と接地導体５４が電気的に接続することを防止するために設けられている。 Further, the input / output terminal 50 is connected to the ground conductor 54 via a conductor via 55 made of a conductor metal for conducting the upper and lower layers of the ceramic multilayer substrate 51, and the ceramic multilayer substrate is secured in order to secure a wide conductor area. The solid conductor film 56 made of a conductor metal is provided below the layer 51. Further, the input / output terminal 50 is connected to each of the line conductor 53 and the ground conductor 54 on the wall surface on one side to which the lead terminal 52 on the upper surface of the ceramic multilayer substrate 51 is joined. A castellation conductor film 57 made of a conductor metal is provided. Further, the input / output terminal 50 is a rectangular parallelepiped Al 2 O 3 which is joined to the upper surface of the ceramic multilayer substrate 51 with a part of the line conductor 53 and the ground conductor 54 interposed therebetween, A ceramic standing body 58 made of ceramic such as AlN is provided. Further, in this input / output terminal 50, a notch 59 in which the insulator of the ceramic multilayer substrate 51 corresponding to the substantially width dimension of the line conductor 53 is exposed from the opening on the solid conductor film 56 below the line conductor 53. have. The notch 59 is used to firmly join the lead terminal 52 with the castellation conductor film 57 and to the solid conductor film 56 that is electrically connected to the ground conductor 54 by the castoration conductor film 57 of the line conductor 53. It is provided to prevent the line conductor 53 and the ground conductor 54 from being in electrical contact with each other.

上記の入出力端子５０は、高周波信号で作動する半導体素子を収納するための半導体素子収納用パッケージを構成するのに用いられている。そして、この半導体素子収納用パッケージには、半導体素子が搭載され、ボンディングワイヤを介して入出力端子５０と電気的導通状態が形成された後、パッケージの内部を気密に封止して半導体素子が収納されるようになっている。   The input / output terminal 50 is used to configure a semiconductor element housing package for housing a semiconductor element that operates with a high-frequency signal. The semiconductor element storage package is mounted with a semiconductor element, and is electrically connected to the input / output terminal 50 via a bonding wire. It is designed to be stored.

従来の入出力端子及び半導体素子収納用パッケージには、リード端子を線路導体に強固に接合させリード端子が線路導体から剥離するのを防止すると共に、線路導体で高周波信号の反射等の伝送損失が発生するのを防止するために、線路導体がタングステンを主成分とするメタライズ層及びその上に被着されためっき層からなり、リード端子が接合される側の側面の上端部から線路導体の端部にかけてモリブデン、マンガンの少なくとも一方を主成分とするメタライズ層及びその上に被着されためっき層からなる側部導体層が設けられているのが提案されている（例えば、特許文献１参照）。
また、従来の入出力端子及び半導体素子収納用パッケージには、高周波信号の反射損失が低減でき伝送特性を向上させるために、上面に線路導体、及びその両側に接地導体が形成され、更に、リード端子を接合する一辺側の壁面に接地導体を延設させて設けられているのが開示されている（例えば、特許文献２参照）。 In the conventional input / output terminal and semiconductor element storage package, the lead terminal is firmly joined to the line conductor to prevent the lead terminal from being peeled off from the line conductor, and the transmission loss such as reflection of a high-frequency signal is caused by the line conductor. In order to prevent the occurrence of the line conductor, the line conductor is composed of a metallized layer mainly composed of tungsten and a plating layer deposited thereon, and the end of the line conductor from the upper end of the side surface to which the lead terminal is joined. It is proposed that a metallized layer containing at least one of molybdenum and manganese as a main component and a side conductor layer made of a plating layer deposited thereon are provided over the part (see, for example, Patent Document 1). .
In addition, in the conventional input / output terminal and semiconductor element storage package, in order to reduce the reflection loss of the high frequency signal and improve the transmission characteristics, a line conductor is formed on the upper surface, and a ground conductor is formed on both sides thereof. It is disclosed that a ground conductor is provided on a wall surface on one side where terminals are joined (see, for example, Patent Document 2).

特開２００４−２９６７８９号公報JP 2004-296789 A 特許第３６７０５７４号公報Japanese Patent No. 3670574

しかしながら、前述したような従来の入出力端子及び半導体素子収納用パッケージには、次のような問題がある。
（１）入出力端子及びこれを用いた半導体素子収納用パッケージは、入出力端子の線路導体の下方のベタ導体膜に設ける切り欠き部の一辺側の稜部周辺部の幅寸法を、線路導体を伝播する高周波信号の特性インピーダンスの不整合を防止するために、できるだけ線路導体の幅寸法に相当する幅寸法として線路導体をベタ導体膜に近接させるのがよい。しかしながら、入出力端子のセラミック多層基板の一辺側の壁面には、キャスタレーション導体膜を設ける必要があり、例え、キャスタレーション導体膜の幅を小さくなるように形成しても導体膜形成時の導体金属の滲みが裏面側表面に発生することで線路導体のキャスタレーション導体膜とベタ導体膜の接触を発生させる場合がある。この接触によって、入出力端子の線路導体は、接地導体と短絡して入出力端子及び半導体素子収納用パッケージとしての機能を果たせなくなっている。
（２）特開２００４−２９６７８９号公報で開示される入出力端子及び半導体素子収納用パッケージは、キャスタレーション導体膜がセラミック基板の線路導体のみに設けられており、しかもベタ導体膜に切り欠き部を設ける必要がないので、キャスタレーション導体膜とベタ導体膜が接触するという問題の発生がない。
（３）特許第３６７０５７４号公報で開示される入出力端子及び半導体素子収納用パッケージは、キャスタレーション導体膜がセラミック基板の接地導体のみに設けられてベタ導体膜に切り欠き部を設ける必要がないので、キャスタレーション導体膜とベタ導体膜が接触するという問題の発生がないと共に、線路導体にはキャスタレーション導体膜がなくそこに接合するリード端子の接合強度を向上させることができなくなっている。 However, the conventional input / output terminal and the semiconductor element storage package as described above have the following problems.
(1) An input / output terminal and a package for housing a semiconductor element using the input / output terminal have the width dimension of the peripheral portion of the ridge on one side of the notch provided on the solid conductor film below the line conductor of the input / output terminal. In order to prevent mismatching in the characteristic impedance of the high-frequency signal propagating through the line conductor, it is preferable to place the line conductor close to the solid conductor film as much as possible to a width dimension corresponding to the width dimension of the line conductor. However, it is necessary to provide a castoration conductor film on the wall surface on one side of the ceramic multilayer substrate of the input / output terminals. For example, even if the width of the castoration conductor film is reduced, the conductor at the time of forming the conductor film Metal bleeding may occur on the back side surface, which may cause contact between the castoration conductor film of the line conductor and the solid conductor film. By this contact, the line conductor of the input / output terminal is short-circuited with the ground conductor and cannot function as the input / output terminal and the package for housing the semiconductor element.
(2) In the input / output terminal and semiconductor element storage package disclosed in Japanese Patent Application Laid-Open No. 2004-296789, the castoration conductor film is provided only on the line conductor of the ceramic substrate, and the notch portion is formed in the solid conductor film. Therefore, there is no problem of contact between the castellation conductor film and the solid conductor film.
(3) In the input / output terminal and semiconductor element storage package disclosed in Japanese Patent No. 3670574, the castoration conductor film is provided only on the ground conductor of the ceramic substrate, and it is not necessary to provide a notch in the solid conductor film. Therefore, the problem that the castoration conductor film and the solid conductor film come into contact with each other does not occur, and the line conductor does not have the castoration conductor film, so that it is impossible to improve the bonding strength of the lead terminal bonded thereto.

本発明は、かかる事情に鑑みてなされたものであって、線路導体に高周波信号を特性インピーダンスの不整合を発生させることなく伝搬させることができると共に、リード端子の接合強度を向上させることができる入出力端子及び半導体素子収納用パッケージを提供することを目的とする。   The present invention has been made in view of such circumstances, and can propagate a high-frequency signal to a line conductor without causing a mismatch of characteristic impedance, and can improve the bonding strength of a lead terminal. An object is to provide an input / output terminal and a package for housing a semiconductor element.

前記目的に沿う本発明に係る入出力端子は、略四角形状のセラミック多層基板の最上層上面の一辺から他辺にかけて設けられ一辺側の端部にリード端子が接合される導体金属からなる線路導体と、線路導体に近接して併設され一辺側の端部にリード端子が接合される導体金属からなる接地導体と、接地導体にセラミック多層基板の上下層を導通させるための導体金属からなる導体ビアを介して接続され、セラミック多層基板の下層に設けられる導体金属からなるベタ導体膜と、セラミック多層基板の上層の一辺側の壁面に線路導体及び接地導体のそれぞれと接続する導体金属からなるキャスタレーション導体膜と、セラミック多層基板の上面に線路導体及び接地導体の一部を間に挟んで接合される直方体状のセラミック立設体を有する入出力端子において、線路導体の下方のベタ導体膜の一辺側の稜部周辺部にセラミック多層基板の絶縁体が開口から露出する切り欠き部を有すると共に、切り欠き部を含有して切り欠き部周縁のベタ導体膜の上面までセラミック多層基板のセラミックと同材料からなる絶縁体膜を有する。   An input / output terminal according to the present invention that meets the above-mentioned object is a line conductor made of a conductive metal that is provided from one side to the other side of the top surface of the uppermost layer of a substantially rectangular ceramic multilayer substrate, and a lead terminal is joined to an end on one side. A ground conductor made of a conductor metal adjacent to the line conductor and having a lead terminal joined to an end on one side, and a conductor via made of a conductor metal for conducting the upper and lower layers of the ceramic multilayer substrate to the ground conductor A solid conductor film made of a conductive metal provided on the lower layer of the ceramic multilayer substrate and a castellation made of a conductive metal connected to each of the line conductor and the ground conductor on the wall surface on one side of the upper layer of the ceramic multilayer substrate Input / output having a conductor film and a rectangular parallelepiped ceramic body joined to the upper surface of the ceramic multilayer substrate with a part of the line conductor and the ground conductor interposed therebetween The conductor has a notch portion where the insulator of the ceramic multilayer substrate is exposed from the opening in the peripheral portion of the ridge portion on one side of the solid conductor film below the line conductor, and includes a notch portion and the periphery of the notch portion. An insulating film made of the same material as the ceramic of the ceramic multilayer substrate is provided up to the upper surface of the solid conductor film.

前記目的に沿う本発明に係る半導体素子収納用パッケージは、半導体素子を載置させるための搭載部を有する基体と、基体の上面に搭載部を囲繞して接合され、側壁部に貫通孔、又は切り欠きからなる入出力端子の取り付け部を設ける枠体と、取り付け部に嵌着させる請求項１記載の入出力端子と、入出力端子に外部水平方向に突出させて接合させるリード端子を有する。   A package for housing a semiconductor element according to the present invention that meets the above-described object is a base having a mounting part for mounting a semiconductor element, and is joined to the upper surface of the base so as to surround the mounting part, and a through hole or A frame body provided with a mounting portion for the input / output terminal made of a notch, an input / output terminal according to claim 1 fitted to the mounting portion, and a lead terminal that protrudes and joins the input / output terminal in the external horizontal direction.

請求項１記載の入出力端子は、線路導体の下方のベタ導体膜の一辺側の稜部周辺部にセラミック多層基板の絶縁体が開口から露出する切り欠き部を有すると共に、切り欠き部を含有して切り欠き部周縁のベタ導体膜の上面までセラミック多層基板のセラミックと同材料からなる絶縁体膜を有するので、切り欠き部と絶縁体膜とによってキャスタレーション部の導体膜形成時の導体金属の裏面側表面への滲み発生があったとしても線路導体とベタ導体膜との接触を防止できると共に、線路導体の下方のベタ導体膜に設ける切り欠き部の幅寸法をできるだけ線路導体の幅寸法に相当する幅寸法として線路導体をベタ導体膜に近接させることができ、線路導体を伝播する高周波信号の特性インピーダンスの不整合を防止することができる。また、線路導体及び接地導体のそれぞれに接合されるリード端子は、それぞれに設けるキャスタレーション導体膜によって接合強度を向上させることができる。   The input / output terminal according to claim 1 includes a notch portion where the insulator of the ceramic multilayer substrate is exposed from the opening in the periphery of the ridge portion on one side of the solid conductor film below the line conductor, and includes the notch portion. Since there is an insulator film made of the same material as the ceramic of the ceramic multilayer substrate up to the upper surface of the solid conductor film at the periphery of the notch portion, the conductor metal when the conductor film of the castellation portion is formed by the notch portion and the insulator film Can prevent the line conductor and the solid conductor film from coming into contact with each other even if bleeding occurs on the backside surface of the wire, and the width dimension of the notch provided in the solid conductor film below the line conductor as much as possible. The line conductor can be brought close to the solid conductor film with a width dimension corresponding to the above, and mismatching of characteristic impedance of the high-frequency signal propagating through the line conductor can be prevented. Moreover, the lead terminal joined to each of a line conductor and a ground conductor can improve joint strength by the castellation conductor film | membrane provided in each.

請求項２記載の半導体素子収納用パッケージは、半導体素子を載置させるための搭載部を有する基体と、基体の上面に搭載部を囲繞して接合され、側壁部に貫通孔、又は切り欠きからなる入出力端子の取り付け部を設ける枠体と、取り付け部に嵌着させる請求項１記載の入出力端子と、入出力端子に外部水平方向に突出させて接合させるリード端子を有するので、高周波信号で作動する半導体素子を搭載部に載置させ、ボンディングワイヤを介して入出力端子と電気的導通状態が形成された後、パッケージの内部を気密に封止して半導体素子を収納し、入出力端子の線路導体を伝播する高周波信号の特性インピーダンスの不整合を防止することができると共に、入出力端子にリード端子を外部水平方向に突出させて接合させるための接合強度を強固に維持することができる。   According to a second aspect of the present invention, there is provided a package for housing a semiconductor element, comprising: a base having a mounting portion for mounting the semiconductor element; and an upper surface of the base surrounding and mounting the mounting portion; A frame body provided with a mounting portion for the input / output terminal, an input / output terminal according to claim 1 fitted to the mounting portion, and a lead terminal that protrudes and joins the input / output terminal in the external horizontal direction. After mounting the semiconductor element that operates on the mounting part and forming electrical continuity with the input / output terminals via the bonding wires, the inside of the package is hermetically sealed to house the semiconductor element and input / output Bond strength to prevent the mismatch of characteristic impedance of high-frequency signal propagating through the terminal line conductor and to connect the lead terminal to the input / output terminal by projecting in the external horizontal direction It can be firmly maintained.

続いて、添付した図面を参照しつつ、本発明を具体化した実施の形態について説明し、本発明の理解に供する。
ここに、図１（Ａ）、（Ｂ）はそれぞれ本発明の一実施の形態に係る入出力端子の斜視図、入出力端子を構成するセラミック多層基板各層の説明図、図２は本発明の一実施の形態に係る半導体素子収納用パッケージの斜視図である。 Subsequently, embodiments of the present invention will be described with reference to the accompanying drawings to provide an understanding of the present invention.
1A and 1B are perspective views of an input / output terminal according to an embodiment of the present invention, an explanatory diagram of each layer of a ceramic multilayer substrate constituting the input / output terminal, and FIG. 1 is a perspective view of a package for housing a semiconductor element according to an embodiment.

図１（Ａ）、（Ｂ）に示すように、本発明の一実施の形態に係る入出力端子１０は、平面視して略四角形状のＡｌ２Ｏ３や、ＡｌＮ等のセラミックの例えば、２層の複数層からなるセラミック多層基板１１を備えている。このセラミック多層基板１１の最上層上面には、一辺から相対向する他辺にかけて延設され、一辺側の端部にセラミックと熱膨張係数が近似するＫＶ（Ｆｅ−Ｎｉ−Ｃｏ系合金、商品名「Ｋｏｖａｒ（コバール）」）や、４２アロイ（Ｆｅ−Ｎｉ系合金）等からなる金属製のリード端子１２を接合するためのタングステン（Ｗ）や、モリブデン（Ｍｏ）等の高融点の導体金属からなる信号線用の線路導体１３を有している。また、この入出力端子１０のセラミック多層基板１１の最上層上面には、一辺から相対向する他辺にかけて延設される線路導体１３に近接して併設されて一辺側の端部に上記と同様のＫＶや、４２アロイ等からなる金属製のリード端子１２を接合するための上記と同様のＷや、Ｍｏ等の高融点の導体金属からなる接地導体１４を有している。なお、線路導体１３や、接地導体１４にリード端子１２を、例えば、Ａｇろう等で接合する場合には、導体金属の上面にＮｉめっき被膜を形成している。 As shown in FIGS. 1A and 1B, the input / output terminal 10 according to an embodiment of the present invention is made of, for example, a substantially square Al 2 O 3 or a ceramic such as AlN in plan view. A ceramic multilayer substrate 11 composed of two or more layers is provided. The upper surface of the uppermost layer of the ceramic multilayer substrate 11 is extended from one side to the other side opposite to each other, and KV (Fe—Ni—Co alloy, product name) whose thermal expansion coefficient approximates that of the ceramic at the end on one side. "Kovar"), high-melting conductor metals such as tungsten (W) and molybdenum (Mo) for joining metal lead terminals 12 made of 42 alloy (Fe-Ni alloy), etc. A signal line conductor 13 for the signal line. Further, the upper surface of the uppermost layer of the ceramic multilayer substrate 11 of the input / output terminal 10 is provided adjacent to the line conductor 13 extending from one side to the opposite side, and is similar to the above at the end on one side. A grounding conductor 14 made of a high melting point conductive metal such as W or Mo for joining a metal lead terminal 12 made of KV, 42 alloy or the like. When the lead terminal 12 is joined to the line conductor 13 or the ground conductor 14 by, for example, Ag brazing or the like, a Ni plating film is formed on the upper surface of the conductor metal.

更に、入出力端子１０は、接地導体１４にセラミック多層基板１１の上下層を導通させるための上記と同様のＷや、Ｍｏ等の高融点の導体金属からなる導体ビア１５を介して接続され、広範囲の導体面積を確保するためにセラミック多層基板１１の下層に設けられる上記と同様のＷや、Ｍｏ等の高融点の導体金属からなるベタ導体膜１６を有している。また、この入出力端子１０は、セラミック多層基板１１の上面のリード端子１２が接合される一辺側の壁面に線路導体１３、及び接地導体１４のそれぞれと接続され、リード端子１２の接合強度を接合部に接合材のメニスカス（接合材溜まり）を設けるようにして向上させるための上記と同様のＷや、Ｍｏ等の高融点の導体金属からなるキャスタレーション導体膜１７を有している。また、更に、入出力端子５０は、セラミック多層基板１１の上面に線路導体１３、及び接地導体１４の一部を間に挟んで接合される直方体状のセラミック多層基板１１と同様のＡｌ２Ｏ３や、ＡｌＮ等のセラミックからなり、複数枚が積層されて積み上げられたセラミック立設体１８を有している。 Further, the input / output terminal 10 is connected to the ground conductor 14 through a conductor via 15 made of a conductive metal having a high melting point such as W or Mo for conducting the upper and lower layers of the ceramic multilayer substrate 11, In order to ensure a wide conductor area, a solid conductor film 16 made of a high melting point conductor metal such as W or Mo provided in the lower layer of the ceramic multilayer substrate 11 is provided. In addition, the input / output terminal 10 is connected to each of the line conductor 13 and the ground conductor 14 on the wall surface on one side to which the lead terminal 12 on the upper surface of the ceramic multilayer substrate 11 is joined, and the joining strength of the lead terminal 12 is joined. The caster conductor film 17 made of a conductive metal having a high melting point such as W or Mo, which is similar to the above, is provided in order to improve the joint material by providing a meniscus (joint material reservoir). Furthermore, the input / output terminal 50 is formed of Al 2 O 3 similar to the rectangular parallelepiped ceramic multilayer substrate 11 joined to the upper surface of the ceramic multilayer substrate 11 with a part of the line conductor 13 and the ground conductor 14 interposed therebetween. Or a ceramic upright body 18 made of a ceramic such as AlN and stacked and stacked.

上記の入出力端子１０には、線路導体１３の下方のベタ導体膜１６の一辺側の稜部周辺部に、線路導体１３の略幅寸法に相当するセラミック多層基板１１の絶縁体が開口から露出する切り欠き部１９を有している。また、この入出力端子１０には、この切り欠き部１９と共に、切り欠き部１９を含有して切り欠き部１９周縁のベタ導体膜１６の上面までセラミック多層基板１１のセラミックと同材質からなる絶縁体膜２０が被覆されて有している。この切り欠き部１９は、線路導体１３のキャスタレーション導体膜１７によって接合材のメニスカスができることでリード端子１２の接合強度を向上させるためと共に、このキャスタレーション導体膜１７によってベタ導体膜１６に接続して電気的に導通状態にある接地導体１４と短絡するのを防止するために設けられている。そして、この切り欠き部１９は、切り欠き幅が線路導体１３の略幅寸法に相当することで、線路導体１３を伝播する高周波信号の特性インピーダンスの不整合を防止することができる。また、絶縁体膜２０は、切り欠き部１９周縁のベタ導体膜１６の上面まで被覆して設けられていることで、キャスタレーション導体膜１７形成時の導体金属の滲みが裏面側表面に発生したとしても線路導体１３のキャスタレーション導体膜１７と、接地導体１４と電気的に導通状態にあるベタ導体膜１６との接触を防止して、線路導体１３と接地導体１４の短絡を防止することができる。   In the input / output terminal 10, the insulator of the ceramic multilayer substrate 11 corresponding to the substantially width dimension of the line conductor 13 is exposed from the opening at the periphery of the ridge on one side of the solid conductor film 16 below the line conductor 13. It has the notch part 19 to be. In addition, the input / output terminal 10 includes the notch 19 and includes the notch 19 up to the upper surface of the solid conductor film 16 at the periphery of the notch 19, and is made of the same material as the ceramic of the ceramic multilayer substrate 11. The body membrane 20 is covered. The notch 19 is connected to the solid conductor film 16 by the castellation conductor film 17 while improving the bonding strength of the lead terminal 12 by forming a meniscus of the bonding material by the castration conductor film 17 of the line conductor 13. In order to prevent a short circuit with the ground conductor 14 that is electrically conductive. And this notch part 19 can prevent the mismatch of the characteristic impedance of the high frequency signal which propagates the line conductor 13 because a notch width corresponds to the substantially width dimension of the line conductor 13. Further, since the insulator film 20 is provided so as to cover the upper surface of the solid conductor film 16 at the periphery of the notch portion 19, bleeding of the conductor metal at the time of forming the castellation conductor film 17 occurred on the back surface. However, it is possible to prevent contact between the castoration conductor film 17 of the line conductor 13 and the solid conductor film 16 that is in electrical conduction with the ground conductor 14, thereby preventing a short circuit between the line conductor 13 and the ground conductor 14. it can.

ここで、入出力端子１０を構成するセラミック多層基板１１や、セラミック立設体１８に用いられるセラミックについて簡単に説明する。例えば、セラミックがアルミナ（Ａｌ２Ｏ３）からなる場合には、先ず、アルミナ粉末にマグネシア、シリカ、カルシア等の焼結助剤を適当量加えた粉末に、ジオクチルフタレート等の可塑剤と、アクリル樹脂等のバインダー、及びトルエン、キシレン、アルコール類等の溶剤を加え、十分に混練し、脱泡して粘度２０００〜４００００ｃｐｓのスラリーを作製する。次いで、スラリーは、ドクターブレード法等によってシート状に成形し、乾燥して、例えば、厚み０．５ｍｍのセラミックグリーンシートに作製している。 Here, the ceramic multilayer substrate 11 constituting the input / output terminal 10 and the ceramic used for the ceramic standing body 18 will be briefly described. For example, when the ceramic is made of alumina (Al 2 O 3 ), first, a powder obtained by adding an appropriate amount of a sintering aid such as magnesia, silica, or calcia to alumina powder, a plasticizer such as dioctyl phthalate, and acrylic A binder such as a resin and a solvent such as toluene, xylene, and alcohols are added, kneaded sufficiently, and defoamed to prepare a slurry having a viscosity of 2000 to 40000 cps. Next, the slurry is formed into a sheet shape by a doctor blade method or the like and dried to produce, for example, a ceramic green sheet having a thickness of 0.5 mm.

次いで、上記のセラミックグリーンシートを用いた入出力端子１０の作製方法を簡単に説明する。セラミック多層基板１１用の複数枚のセラミックグリーンシートのそれぞれには、先ず、必要とする位置に導体ビア１５用や、キャスタレーション導体膜１７形成用等のための貫通孔を孔明け金型や、パンチングマシーン等を用いて穿設している。次に、セラミックグリーンシートの導体ビア１５用の貫通孔には、Ｗや、Ｍｏ等の高融点の導体金属ペーストを用いてスクリーン印刷で導体金属の孔埋め充填体を形成している。また、セラミックグリーンシートのキャスタレーション導体膜１７形成用の貫通孔には、Ｗや、Ｍｏ等の高融点の導体金属ペーストを用いてスクリーン印刷で貫通孔壁面にスルーホール導体を形成している。更に、セラミックグリーンシートの表面には、Ｗや、Ｍｏ等の高融点の導体金属ペーストを用いてスクリーン印刷で線路導体１３や、接地導体１４や、ベタ導体膜１６用の導体パターンを形成している。なお、上記のベタ導体膜１６用の導体パターンには、導体膜を設けない部分となる切り欠き部１９を設けて導体パターンを形成している。また、接地導体１４用の導体パターンは、導体ビア１５用の導体金属の孔埋め充填体、及びキャスタレーション導体膜１７用のスルーホール導体を介してベタ導体膜１６用の導体パターンと接続状態となっている。次に、上記のそれぞれのセラミックグリーンシートは、決められた所望の形状に打ち抜き金型等で打ち抜いたり、切り刃等で切断したりして形成している。このとき、キャスタレーション部は、貫通孔の中心を横断するようにして形成している。   Next, a method for manufacturing the input / output terminal 10 using the ceramic green sheet will be briefly described. In each of the plurality of ceramic green sheets for the ceramic multilayer substrate 11, first, through holes for forming the conductor vias 15 and for forming the castellation conductor film 17 are formed at necessary positions. Drilled using a punching machine. Next, in the through hole for the conductor via 15 of the ceramic green sheet, a conductor metal hole filling material is formed by screen printing using a high melting point conductor metal paste such as W or Mo. Further, in the through hole for forming the castoration conductor film 17 of the ceramic green sheet, a through hole conductor is formed on the wall surface of the through hole by screen printing using a high melting point conductive metal paste such as W or Mo. Further, a conductor pattern for the line conductor 13, the ground conductor 14, and the solid conductor film 16 is formed on the surface of the ceramic green sheet by screen printing using a high melting point conductive metal paste such as W or Mo. Yes. The conductor pattern for the solid conductor film 16 is provided with a cutout portion 19 which is a portion where no conductor film is provided to form a conductor pattern. Further, the conductor pattern for the ground conductor 14 is connected to the conductor pattern for the solid conductor film 16 via the hole filling for the conductor metal for the conductor via 15 and the through-hole conductor for the castellation conductor film 17. It has become. Next, each ceramic green sheet is formed by punching into a predetermined desired shape with a punching die or cutting with a cutting blade or the like. At this time, the castellation part is formed so as to cross the center of the through hole.

一方、セラミック立設体１８用の複数枚のセラミックグリーンシートのそれぞれには、図示しないが、必要に応じてＷや、Ｍｏ等の高融点の導体金属ペーストを用いてスクリーン印刷で導体パターンを形成している。そして、上記のそれぞれのセラミックグリーンシートは、決められた所望の形状に打ち抜き金型等で打ち抜いたり、切り刃等で切断したりして形成している。   On the other hand, although not shown, each of the plurality of ceramic green sheets for the ceramic standing body 18 is formed with a conductive pattern by screen printing using a high melting point conductive metal paste such as W or Mo as necessary. is doing. Each ceramic green sheet is formed by punching into a predetermined desired shape with a punching die or cutting with a cutting blade or the like.

次いで、セラミック多層基板１１用の複数枚のセラミックグリーンシートと、セラミック立設体１８用の複数枚のセラミックグリーンシートは、全てを重ね合わせ、温度と圧力をかけて積層した後、セラミックグリーンシートと、Ｗや、Ｍｏ等の高融点の導体金属を還元雰囲気中の約１５５０℃で同時焼成して焼結体からなる入出力端子１０を作製している。   Next, a plurality of ceramic green sheets for the ceramic multilayer substrate 11 and a plurality of ceramic green sheets for the ceramic standing body 18 are all overlaid and laminated by applying temperature and pressure. The input / output terminal 10 made of a sintered body is manufactured by simultaneously firing high melting point conductive metals such as W, Mo and Mo at about 1550 ° C. in a reducing atmosphere.

次に、図２を参照しながら、本発明の一実施の形態に係る半導体素子収納用パッケージを説明する。図２に示すように、本発明の一実施の形態に係る半導体素子収納用パッケージ２１は、高周波信号で作動する半導体素子を載置させるための搭載部２２を有し、そこに搭載された半導体素子からの発熱を速やかに外部に放熱することができるように熱伝導性に優れた、例えば、ＫＶや、４２アロイや、Ｃｕや、Ｃｕ合金等からなる板状の基体２３を備えている。また、この半導体素子収納用パッケージ２１は、基体２３の上面に搭載部２２を囲繞するようにしてろう付け等で接合され、側壁部に貫通孔、又は切り欠きからなる前記の請求項１記載の入出力端子１０の取り付け部２４を設ける枠体２５を備えている。この枠体２５は、そこに接合される入出力端子１０を構成するセラミックと熱膨張係数が近似する、例えば、ＫＶや、４２アロイ等の金属製からなっている。   Next, a semiconductor element storage package according to an embodiment of the present invention will be described with reference to FIG. As shown in FIG. 2, a semiconductor element storage package 21 according to an embodiment of the present invention has a mounting portion 22 for mounting a semiconductor element that operates with a high-frequency signal, and the semiconductor mounted thereon A plate-like substrate 23 made of, for example, KV, 42 alloy, Cu, Cu alloy or the like having excellent thermal conductivity is provided so that heat generated from the element can be quickly radiated to the outside. Further, the semiconductor element storage package 21 is joined to the upper surface of the base 23 by brazing or the like so as to surround the mounting portion 22, and the side wall portion is formed with a through hole or a notch. A frame body 25 is provided on which the mounting portion 24 of the input / output terminal 10 is provided. The frame 25 is made of a metal such as KV or 42 alloy having a thermal expansion coefficient similar to that of the ceramic constituting the input / output terminal 10 joined thereto.

この半導体素子収納用パッケージ２１は、枠体２５の側壁部に貫通孔や、切り欠きとして設けた取り付け部２４にろう付け接合で嵌着させる入出力端子１０を有している。なお、入出力端子１０には、枠体２５の取り付け部２４の貫通孔面、又は切り欠き面にろう材を介してろう付け接合するために、当接面部の外周全体にＷや、Ｍｏ等の高融点の導体金属が形成されている。また、ろう付け接合には、導体金属の上面にＮｉめっき被膜を形成し、例えば、Ａｇろう等を用いて加熱して接合している。   The semiconductor element storage package 21 has an input / output terminal 10 that is fitted into a side wall portion of a frame 25 by a brazed joint to a mounting portion 24 provided as a through hole or notch. In addition, in order to braze and join the input / output terminal 10 to the through-hole surface of the mounting portion 24 of the frame 25 or the notch surface via a brazing material, W, Mo, etc. The high melting point conductor metal is formed. Further, in the brazing joining, a Ni plating film is formed on the upper surface of the conductor metal, and the joining is performed by heating using, for example, Ag brazing.

また、この半導体素子収納用パッケージ２１は、入出力端子１０に外部水平方向に突出させて接合させるＫＶや、４２アロイ等の金属からなるリード端子１２を有している。このリード端子１２のろう付け接合においては、上記と同様に、導体金属の上面にＮｉめっき被膜を形成し、例えば、Ａｇろう等を用いて加熱して接合している。そして、この半導体素子収納用パッケージ２１は、外部に露出する金属部分にＮｉめっき被膜、及びＡｕめっき被膜が施されている。   The semiconductor element storage package 21 has a lead terminal 12 made of a metal such as KV or 42 alloy which is protruded and joined to the input / output terminal 10 in the external horizontal direction. In the brazing joining of the lead terminals 12, as described above, a Ni plating film is formed on the upper surface of the conductor metal, and the joining is performed by heating using, for example, Ag brazing. The semiconductor element storage package 21 is provided with a Ni plating film and an Au plating film on a metal portion exposed to the outside.

上記の半導体素子収納用パッケージ２１には、搭載部２２に高周波信号で作動する半導体素子を載置させ、半導体素子と入出力端子１０の搭載部２２側の線路導体１３や、接地導体１４をボンディングワイヤを介して接続し、外部との間に電気的導通状態を形成している。また、上記の半導体素子収納用パッケージ２１には、光ファイバーが取着された金属フォルダを固定するためのＫＶや、４２アロイ等からなる金属製の固定部材２６が設けられており、半導体素子と光結合できるようになっている。更に、上記の半導体素子収納用パッケージ２１には、半導体素子等が実装された後、上部にＫＶや、４２アロイ等からなる金属製の蓋体（図示せず）が接合されて、搭載部２２の内部を気密に封止するようになっている。   In the semiconductor element storage package 21, a semiconductor element that operates with a high-frequency signal is placed on the mounting portion 22, and the line conductor 13 on the mounting portion 22 side of the semiconductor element and the input / output terminal 10 and the ground conductor 14 are bonded. They are connected via wires and form an electrically conductive state with the outside. The semiconductor element storage package 21 is provided with a metal fixing member 26 made of KV, 42 alloy or the like for fixing the metal folder to which the optical fiber is attached. It can be combined. Furthermore, after the semiconductor elements are mounted on the semiconductor element storage package 21, a metal lid (not shown) made of KV, 42 alloy or the like is bonded to the upper part, and the mounting portion 22 is attached. Is hermetically sealed.

本発明の入出力端子及び半導体素子収納用パッケージは、例えば、４０ＧＨＺを超えるような高周波信号を特性インピーダンスの不整合を生じさせることなく伝送できる入出力端子及び半導体素子収納用パッケージとして使用することができる。 Input and output terminals and the semiconductor element storage package of the present invention, for example, be used as input and output terminals and a semiconductor element housing package can be transmitted without causing mismatching of the high frequency signal characteristic impedance exceeding 40GH Z Can do.

（Ａ）、（Ｂ）はそれぞれ本発明の一実施の形態に係る入出力端子の斜視図、入出力端子を構成するセラミック多層基板各層の説明図である。(A), (B) is the perspective view of the input / output terminal which concerns on one embodiment of this invention, respectively, and explanatory drawing of each layer of the ceramic multilayer substrate which comprises an input / output terminal. は本発明の一実施の形態に係る半導体素子収納用パッケージの斜視図である。FIG. 3 is a perspective view of a package for housing a semiconductor device according to an embodiment of the present invention. （Ａ）、（Ｂ）はそれぞれ従来の入出力端子の斜視図、入出力端子を構成するセラミック多層基板各層の説明図である。(A), (B) is the perspective view of the conventional input / output terminal, respectively, and explanatory drawing of each layer of the ceramic multilayer substrate which comprises an input / output terminal.

符号の説明Explanation of symbols

１０：入出力端子、１１：セラミック多層基板、１２：リード端子、１３：線路導体、１４：接地導体、１５：導体ビア、１６：ベタ導体膜、１７：キャスタレーション導体膜、１８：セラミック立設体、１９：切り欠き部、２０：絶縁体膜、２１：半導体素子収納用パッケージ、２２：搭載部、２３：基体、２４：取り付け部、２５：枠体、２６：固定部材   10: input / output terminal, 11: ceramic multilayer substrate, 12: lead terminal, 13: line conductor, 14: ground conductor, 15: conductor via, 16: solid conductor film, 17: castoration conductor film, 18: ceramic standing Body: 19: Notch, 20: Insulator film, 21: Package for housing semiconductor element, 22: Mounting part, 23: Base, 24: Mounting part, 25: Frame, 26: Fixing member

Claims (2)

略四角形状のセラミック多層基板の最上層上面の一辺から他辺にかけて設けられ前記一辺側の端部にリード端子が接合される導体金属からなる線路導体と、該線路導体に近接して併設され前記一辺側の端部に前記リード端子が接合される前記導体金属からなる接地導体と、該接地導体に前記セラミック多層基板の上下層を導通させるための前記導体金属からなる導体ビアを介して接続され、前記セラミック多層基板の下層に設けられる前記導体金属からなるベタ導体膜と、前記セラミック多層基板の上層の前記一辺側の壁面に前記線路導体及び接地導体のそれぞれと接続する前記導体金属からなるキャスタレーション導体膜と、前記セラミック多層基板の上面に前記線路導体及び接地導体の一部を間に挟んで接合される直方体状のセラミック立設体を有する入出力端子において、
前記線路導体の下方の前記ベタ導体膜の前記一辺側の稜部周辺部に前記セラミック多層基板の絶縁体が開口から露出する切り欠き部を有すると共に、該切り欠き部を含有して該切り欠き部周縁の前記ベタ導体膜の上面まで前記セラミック多層基板のセラミックと同材料からなる絶縁体膜を有することを特徴とする入出力端子。 A line conductor made of a conductive metal provided from one side to the other side of the top surface of the uppermost layer of the substantially square ceramic multilayer substrate and having a lead terminal joined to an end of the one side, and provided adjacent to the line conductor, A ground conductor made of the conductor metal to which the lead terminal is joined to an end portion on one side, and a conductor via made of the conductor metal for conducting the upper and lower layers of the ceramic multilayer substrate to the ground conductor. A solid conductor film made of the conductor metal provided in a lower layer of the ceramic multilayer substrate, and a caster made of the conductor metal connected to each of the line conductor and the ground conductor on the wall surface on the one side of the upper layer of the ceramic multilayer substrate. And a rectangular parallelepiped ceramic bonded to the upper surface of the ceramic multilayer substrate with a part of the line conductor and the ground conductor interposed therebetween In the input and output terminals of the 設体,
The solid conductor film below the line conductor has a notch portion where the insulator of the ceramic multilayer substrate is exposed from the opening in the periphery of the ridge portion on the one side, and includes the notch portion. An input / output terminal comprising an insulating film made of the same material as the ceramic of the ceramic multilayer substrate up to the upper surface of the solid conductor film at the periphery of the part. 半導体素子を載置させるための搭載部を有する基体と、該基体の上面に前記搭載部を囲繞して接合され、側壁部に貫通孔、又は切り欠きからなる入出力端子の取り付け部を設ける枠体と、前記取り付け部に嵌着させる請求項１記載の入出力端子と、該入出力端子に外部水平方向に突出させて接合させるリード端子を有することを特徴とする半導体素子収納用パッケージ。   A frame having a mounting part for mounting a semiconductor element, and a frame which is joined to the upper surface of the base so as to surround the mounting part, and which has an input / output terminal mounting part formed of a through hole or a notch on a side wall part. A package for housing a semiconductor element, comprising: a body; an input / output terminal according to claim 1 fitted to the mounting portion; and a lead terminal that protrudes and joins the input / output terminal in an external horizontal direction.
JP2007331503A 2007-12-25 2007-12-25 Input/output terminal and package for housing semiconductor device Pending JP2009158511A (en)

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