JP7006118B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP7006118B2 JP7006118B2 JP2017200997A JP2017200997A JP7006118B2 JP 7006118 B2 JP7006118 B2 JP 7006118B2 JP 2017200997 A JP2017200997 A JP 2017200997A JP 2017200997 A JP2017200997 A JP 2017200997A JP 7006118 B2 JP7006118 B2 JP 7006118B2
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Description
本発明の実施形態に係る半導体装置は、図1に示すように、活性領域(1,2,3,4a~4d,5a~5c)と、絶縁層膜(層間絶縁膜)8a、8bと、第1バリア膜9と、下地コンタクト層11a、11b、11cと、第2バリア膜12と、第3バリア膜13を備える。活性領域(1,2,3,4a~4d,5a~5c)は、キャリア走行領域(2,3)と、オーミック接触形成領域(4a~4d,5a~5c)を有する。キャリア走行領域(2,3)は第1導電型(n型)のドリフト層2と第2導電型(p型)のベース層3を備える。オーミック接触形成領域(4a~4d,5a~5c)は、キャリア走行領域(2,3)よりも高不純物密度の半導体領域である。オーミック接触形成領域(4a~4d,5a~5c)は、n+型の第1主電極領域(ソース領域)4a,4b,4c,4dとp+型のベースコンタクト領域5a,5b,5cを備える。オーミック接触形成領域(4a~4d,5a~5c)の下面には、第2主電極領域(ドレイン領域)1が設けられている。図1では、ベース層3とドリフト層2を貫通する2本のトレンチが示されているが、実際にはマルチチャネル構造を構成するように多数のトレンチを有していても構わない。図1の左側のトレンチの内壁にはゲート絶縁膜6aが設けられ、ゲート絶縁膜6aの上にトレンチを埋め込むようにゲート電極7aが配置されている。同様に、図1の右側のトレンチの内壁にはゲート絶縁膜6bが設けられ、ゲート絶縁膜6bの上にトレンチを埋め込むようにゲート電極7bが配置されている。
次に、図2に示すフローチャートに沿って、図3~図11に示す工程断面図を用いて、本発明の実施形態に係る半導体装置の製造方法を、トレンチゲート型MISFETの場合を一例に説明する。なお、以下に述べるトレンチゲート型MISFETの製造方法は一例であり、特許請求の範囲に記載した趣旨の範囲であれば、この変形例を含めて、これ以外の種々の製造方法により実現可能であることは勿論である。
上記のように、本発明の実施形態を記載したが、この開示の一部をなす論述及び図面は本発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施形態、実施例及び運用技術が明らかとなろう。
2…ドリフト層
3…ベース領域
4a、4b、4c、4d…ソース領域(第1主電極領域:オーミック接触形成領域)
5a、5b、5c…ベースコンタクト領域(オーミック接触形成領域)
6a、6b…ゲート絶縁膜
7a、7b…ゲート電極
8a、8b…絶縁膜層(層間絶縁膜)
9…第1バリア膜
10…裏面電極層(ドレイン電極層)
11a、11b、11c、11d…下地コンタクト層
12…第2バリア膜
13…第3バリア膜
14…表面電極層
Claims (8)
- キャリア走行領域と、該キャリア走行領域よりも高不純物密度のオーミック接触形成領域を有する活性領域と、
前記オーミック接触形成領域の一部を露出する窓部を設けるように、前記活性領域の主面上に選択的に配置された絶縁膜層と、
前記窓部の内側の一部に前記オーミック接触形成領域を露出するオーミック開口部を有し、前記オーミック開口部以外の箇所で前記主面及び前記絶縁膜層を被覆する第1バリア膜と、
前記オーミック開口部に充填され、前記オーミック接触形成領域とオーミック接触する下地コンタクト層と、
チタンからなり、前記第1バリア膜及び前記下地コンタクト層の表面を被覆する第2バリア膜と、
酸化チタンと窒化チタンからなり、前記第2バリア膜の表面を被覆する第3バリア膜と
前記第3バリア膜上に配置されたアルミニウム又はアルミニウム合金からなる表面電極層と、
を備え、
前記下地コンタクト層は、前記第1バリア膜と接する界面において、前記第1バリア膜の下側に重なり、
前記酸化チタンが、前記表面電極層と接触する前記第3バリア膜の表面に形成されることを特徴とする半導体装置。 - 前記下地コンタクト層は、ニッケルシリサイドからなることを特徴とする請求項1に記載の半導体装置。
- 前記下地コンタクト層の下端は、前記主面より下方に位置することを特徴とする請求項1又は2に記載の半導体装置。
- 前記オーミック接触形成領域は、第1導電型半導体領域と該第1導電型半導体領域に隣接した第2導電型半導体領域を含むことを特徴とする請求項1~3のいずれか1項に記載の半導体装置。
- 前記オーミック接触形成領域は、前記キャリア走行領域を流れる主電流を放出若しくは受け入れる主電極領域を含むことを特徴とする請求項1~3のいずれか1項に記載の半導体装置。
- 前記オーミック接触形成領域は、前記キャリア走行領域の一部となるチャネルを形成するベース領域の一部に設けられたベースコンタクト領域を更に含むことを特徴とする請求項5に記載の半導体装置。
- 半導体からなる活性領域に、キャリア走行領域と、該キャリア走行領域よりも高不純物密度のオーミック接触形成領域を形成する工程と、
前記オーミック接触形成領域の一部を露出するように、前記活性領域の主面上に絶縁膜層を選択的に形成する工程と、
前記絶縁膜層を内包するように、前記主面上に窒化チタン層を全面に堆積して第1バリア膜を形成する工程と、
前記絶縁膜層が存在しない前記絶縁膜層の窓部の内側の一部において、前記オーミック接触形成領域を露出するオーミック開口部を前記第1バリア膜に開孔する工程と、
前記オーミック開口部に、前記オーミック接触形成領域とオーミック接触する下地コンタクト層を埋め込む工程と、
前記第1バリア膜及び前記下地コンタクト層の表面を被覆するようにチタン層を全面に堆積して第2バリア膜を形成する工程と、
前記第2バリア膜の表面を窒化チタン膜により被覆する工程と、
前記窒化チタン膜を酸素と反応させて、前記窒化チタン膜の一部に酸化チタンを含有させて第3バリア膜を形成する工程と、
前記第3バリア膜の上にアルミニウム又はアルミニウム合金からなる表面電極層を形成する工程と、
を含み、
前記下地コンタクト層は、前記第1バリア膜と接する界面において、前記第1バリア膜の下側に重なり、
前記酸化チタンが、前記表面電極層と接触する前記第3バリア膜の表面に形成されることを特徴とする半導体装置の製造方法。 - 前記下地コンタクト層を形成する工程は、
前記オーミック開口部により露出された前記オーミック接触形成領域上にニッケルを堆積するステップと、
前記ニッケルを第1温度で熱処理して、前記ニッケルの一部をニッケルシリサイドに変化させるステップと、
前記第1温度で熱処理において未反応のニッケルを除去するステップと、
前記ニッケルシリサイドを前記第1温度より高い第2温度で熱処理するステップと、
を含むことを特徴とする請求項7に記載の半導体装置の製造方法。
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