JP6945388B2 - エッチング方法及びエッチング処理装置 - Google Patents

エッチング方法及びエッチング処理装置 Download PDF

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JP6945388B2
JP6945388B2 JP2017160546A JP2017160546A JP6945388B2 JP 6945388 B2 JP6945388 B2 JP 6945388B2 JP 2017160546 A JP2017160546 A JP 2017160546A JP 2017160546 A JP2017160546 A JP 2017160546A JP 6945388 B2 JP6945388 B2 JP 6945388B2
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etching
silicon
power
film
containing film
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JP2019040959A5 (enExample
JP2019040959A (ja
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祐介 斎藤
祐介 斎藤
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to JP2017160546A priority Critical patent/JP6945388B2/ja
Priority to KR1020180096843A priority patent/KR102720049B1/ko
Priority to US16/106,545 priority patent/US11043391B2/en
Priority to SG10201807085RA priority patent/SG10201807085RA/en
Priority to CN201810959062.3A priority patent/CN111916350B/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32146Amplitude modulation, includes pulsing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32155Frequency modulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32155Frequency modulation
    • H01J37/32165Plural frequencies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32174Circuits specially adapted for controlling the RF discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32917Plasma diagnostics
    • H01J37/32935Monitoring and controlling tubes by information coming from the object and/or discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
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    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
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    • H01L21/67005Apparatus not specifically provided for elsewhere
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
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    • H10BELECTRONIC MEMORY DEVICES
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    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
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    • H10B41/41Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
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    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Electromagnetism (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Plasma Technology (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2017160546A 2017-08-23 2017-08-23 エッチング方法及びエッチング処理装置 Active JP6945388B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2017160546A JP6945388B2 (ja) 2017-08-23 2017-08-23 エッチング方法及びエッチング処理装置
KR1020180096843A KR102720049B1 (ko) 2017-08-23 2018-08-20 에칭 방법 및 에칭 처리 장치
US16/106,545 US11043391B2 (en) 2017-08-23 2018-08-21 Etching method and etching processing apparatus
SG10201807085RA SG10201807085RA (en) 2017-08-23 2018-08-21 Etching method and etching processing apparatus
CN201810959062.3A CN111916350B (zh) 2017-08-23 2018-08-22 蚀刻方法和蚀刻处理装置

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JP2017160546A JP6945388B2 (ja) 2017-08-23 2017-08-23 エッチング方法及びエッチング処理装置

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JP2019040959A5 JP2019040959A5 (enExample) 2020-07-30
JP6945388B2 true JP6945388B2 (ja) 2021-10-06

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SG (1) SG10201807085RA (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102633484B1 (ko) 2019-07-10 2024-02-05 삼성전자주식회사 더미 패턴들을 갖는 반도체 소자들
CN111739795B (zh) * 2020-06-24 2023-08-18 北京北方华创微电子装备有限公司 刻蚀方法
TWI878602B (zh) * 2020-09-14 2025-04-01 日商東京威力科創股份有限公司 蝕刻處理方法及基板處理裝置
JP7650349B2 (ja) * 2021-04-14 2025-03-24 東京エレクトロン株式会社 エッチング方法及びプラズマ処理装置

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JP3799073B2 (ja) * 1994-11-04 2006-07-19 株式会社日立製作所 ドライエッチング方法
JPH08241885A (ja) * 1995-03-06 1996-09-17 Hitachi Ltd 表面処理方法および表面処理装置
JPH10209126A (ja) * 1997-01-23 1998-08-07 Hitachi Ltd プラズマエッチング装置
US6255221B1 (en) * 1998-12-17 2001-07-03 Lam Research Corporation Methods for running a high density plasma etcher to achieve reduced transistor device damage
JP3795798B2 (ja) * 2001-12-03 2006-07-12 株式会社東芝 半導体記憶装置
JP5014166B2 (ja) * 2007-02-13 2012-08-29 株式会社日立ハイテクノロジーズ プラズマ処理方法およびプラズマ処理装置
JP2010272649A (ja) * 2009-05-20 2010-12-02 Panasonic Corp 半導体装置及びその製造方法
US9373521B2 (en) * 2010-02-24 2016-06-21 Tokyo Electron Limited Etching processing method
JP2012077983A (ja) 2010-09-30 2012-04-19 Daikin Industries Ltd 冷凍回路
JP5893864B2 (ja) * 2011-08-02 2016-03-23 東京エレクトロン株式会社 プラズマエッチング方法
US8598040B2 (en) 2011-09-06 2013-12-03 Lam Research Corporation ETCH process for 3D flash structures
JP6096470B2 (ja) 2012-10-29 2017-03-15 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
JP6154820B2 (ja) * 2012-11-01 2017-06-28 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
JP6180824B2 (ja) * 2013-07-02 2017-08-16 東京エレクトロン株式会社 プラズマエッチング方法及びプラズマエッチング装置
JP6320248B2 (ja) * 2014-03-04 2018-05-09 東京エレクトロン株式会社 プラズマエッチング方法
JP6498022B2 (ja) * 2015-04-22 2019-04-10 東京エレクトロン株式会社 エッチング処理方法
JP6516603B2 (ja) * 2015-04-30 2019-05-22 東京エレクトロン株式会社 エッチング方法及びエッチング装置
JP6504989B2 (ja) 2015-05-14 2019-04-24 東京エレクトロン株式会社 エッチング方法
JP6604833B2 (ja) * 2015-12-03 2019-11-13 東京エレクトロン株式会社 プラズマエッチング方法
JP6498152B2 (ja) * 2015-12-18 2019-04-10 東京エレクトロン株式会社 エッチング方法
KR20180019906A (ko) * 2016-08-17 2018-02-27 삼성전자주식회사 플라즈마 식각장비 및 이를 이용한 반도체 소자의 제조방법

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US11043391B2 (en) 2021-06-22
KR102720049B1 (ko) 2024-10-21
CN111916350B (zh) 2023-12-26
SG10201807085RA (en) 2019-03-28
CN111916350A (zh) 2020-11-10
JP2019040959A (ja) 2019-03-14
US20190067030A1 (en) 2019-02-28
KR20190022351A (ko) 2019-03-06

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