JP6784148B2 - 半導体装置、絶縁ゲート型バイポーラトランジスタ、絶縁ゲート型バイポーラトランジスタの製造方法 - Google Patents
半導体装置、絶縁ゲート型バイポーラトランジスタ、絶縁ゲート型バイポーラトランジスタの製造方法 Download PDFInfo
- Publication number
- JP6784148B2 JP6784148B2 JP2016219845A JP2016219845A JP6784148B2 JP 6784148 B2 JP6784148 B2 JP 6784148B2 JP 2016219845 A JP2016219845 A JP 2016219845A JP 2016219845 A JP2016219845 A JP 2016219845A JP 6784148 B2 JP6784148 B2 JP 6784148B2
- Authority
- JP
- Japan
- Prior art keywords
- buffer layer
- layer
- impurity concentration
- back surface
- directly below
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 97
- 238000004519 manufacturing process Methods 0.000 title claims description 28
- 239000012535 impurity Substances 0.000 claims description 102
- 238000000034 method Methods 0.000 claims description 20
- 238000009826 distribution Methods 0.000 claims description 18
- 230000002093 peripheral effect Effects 0.000 claims description 15
- 238000002347 injection Methods 0.000 claims description 14
- 239000007924 injection Substances 0.000 claims description 14
- 239000002019 doping agent Substances 0.000 claims description 11
- 238000005468 ion implantation Methods 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 5
- 238000005224 laser annealing Methods 0.000 claims description 5
- 229910052698 phosphorus Inorganic materials 0.000 claims description 5
- 239000011574 phosphorus Substances 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 229910052785 arsenic Inorganic materials 0.000 claims description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 4
- 229910021478 group 5 element Inorganic materials 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 230000001133 acceleration Effects 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 description 272
- 230000005684 electric field Effects 0.000 description 20
- 230000000694 effects Effects 0.000 description 14
- 230000010355 oscillation Effects 0.000 description 13
- 230000009471 action Effects 0.000 description 9
- 239000000758 substrate Substances 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 6
- 238000004088 simulation Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000001965 increasing effect Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 229910000789 Aluminium-silicon alloy Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000003134 recirculating effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- -1 that is Chemical compound 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
- H01L21/047—Making n or p doped regions or layers, e.g. using diffusion using ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
- H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
- H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electrodes Of Semiconductors (AREA)
Description
第1導電型の半導体材料で形成されたドリフト層と、
前記ドリフト層の表面に設けられ、前記ドリフト層とpn接合する第2導電型の半導体層を含むMOSFET部と、
前記ドリフト層の裏面に設けられ、前記第1導電型を有し、前記ドリフト層よりも不純物濃度が高く、複数の濃度ピークを有し、単位面積当りの電気的に活性な不純物の総量が1.0×1012cm−2以下である第1のバッファ層と、
前記第1のバッファ層の裏面に設けられ、前記第1導電型を有し、前記第1のバッファ層よりも不純物濃度が高い第2のバッファ層と、
を備える。
表面にMOSFET部を備えるドリフト層を準備する工程と、
前記ドリフト層の裏面にプロトンをイオン注入することで、厚さ方向における不純物濃度分布が複数の濃度ピークを有し、単位面積当りの電気的に活性な不純物の総量が1.0×1012cm−2以下である第1のバッファ層を形成する第1のバッファ層形成工程と、
前記第1のバッファ層の裏面にV族元素をイオン注入することで、厚さ方向における不純物濃度分布が前記複数の濃度ピークよりも高い濃度ピークを有する第2のバッファ層を形成する第2のバッファ層形成工程と、
を備える。
図1は、本発明の実施の形態1にかかる半導体装置20を示す図である。実施の形態1にかかる半導体装置20は、トレンチゲートを備える絶縁ゲート型バイポーラトランジスタ(IGBT)である。図1において、半導体装置20は、基板1を備えている。基板1は、珪素からなりn型の導電性を有する。基板1は、IGBTにおけるドリフト層1として機能するので、以下基板1をドリフト層1とも呼称する。
図12に示すフローチャートでは、まず、図13に示すように、表面プロセスが完了した時点の半導体ウエハが準備される。半導体ウエハは、珪素からなる基板1にMOSFET部22を形成したものである。図12に示す裏面プロセスの完了後の所定の段階で半導体ウエハがダイシングされることで、チップ化された半導体装置20が提供される。図13の時点ではウエハ厚みは700μm程度であり、ベアウエハとほぼ同じである。
次に、図14に示すように、半導体ウエハの裏面側、つまりドリフト層1の裏面側をグラインダーあるいはウェットエッチングで所望の厚みにまで研磨する。実施の形態1では、一例として、ウエハ厚みが110μmとなるまで研磨を行う。
具体的には、まず、図15のように、裏面側からプロトンを最大1500keVの加速電圧で複数回注入する。プロトンの飛程は500keVで6μm、1500keVで30μm程度である。第1のバッファ層形成工程におけるイオン注入は、1.5×106eV以下の加速電圧でのイオン注入を、複数回、行うものであることが好ましい。活性化アニールを実施することでプロトンを拡散させてブロードな不純物濃度勾配が形成されるものの、よりガウス分布に近い不純物濃度勾配を構成するために加速電圧を変更して複数回の注入を行うことが好ましい。
次に350℃〜450℃程度でのファーネスアニールを行う。これによりプロトンが活性化され、図16のように第1のn型バッファ層8が形成される。
具体的には、まず、図17に示すように、加速電圧を1MeV以下でリンを注入する。これにより、ドリフト層1の裏面側の浅い部分、言い換えると第1のn型バッファ層8の裏面の浅い部分に第2のn型バッファ層11を形成する。なお、リンの代わりにヒ素を注入してもよい。
その後、レーザーアニールで活性化を実施し、図18で示すように第2のn型バッファ層11を形成する。
次に図19のように、コレクタ層9を形成するために、第2のn型バッファ層11の裏面にホウ素を注入する。
次に、レーザーアニールを実施し、図20に示すようにコレクタ層9を形成する。
その後、図21のように、コレクタ電極10をスパッタで作製する。コレクタ電極10の材料は、Al/Ti/Ni/AuまたはAlSi/Ti/Ni/Auなどを用いてもよい。
最後にn型珪素基板1とコレクタ電極10のコンタクト抵抗の低減のために、熱処理を行う。なお、変形例として、ステップS106におけるプロトンの活性化の熱処理を省略しておき、コレクタ電極10を形成した時の熱処理で兼ねてもよい。
図25は、本発明の実施の形態2にかかる半導体装置50を示す図である。実施の形態1ではドリフト層1の裏面側全体に渡ってコレクタ層9を形成している。これに対し、実施の形態2では、セル部62の直下にp型のコレクタ層9を形成し、ゲート配線部64および耐圧保持部66の直下にはコレクタ層9よりも不純物濃度が低いp型のコレクタ層14を形成する。この点を除いては、実施の形態2にかかる半導体装置50は実施の形態1にかかる半導体装置20と同様の構造を備えている。従って、以下では実施の形態1との相違点を中心に説明するものとし、実施の形態1と実施の形態2との間で同一または対応する要素には同一の符号を付し、説明を簡略化または省略する。
Claims (13)
- 第1導電型の半導体材料で形成されたドリフト層と、
前記ドリフト層の表面に設けられ、前記ドリフト層とpn接合する第2導電型の半導体層を含むMOSFET部と、
前記ドリフト層の裏面に設けられ、前記第1導電型を有し、前記ドリフト層よりも不純物濃度が高く、複数の濃度ピークを有し、単位面積当りの電気的に活性な不純物の総量が1.0×1012cm−2以下である第1のバッファ層と、
前記第1のバッファ層の裏面に設けられ、前記第1導電型を有し、前記第1のバッファ層よりも不純物濃度が高い第2のバッファ層と、
を備える絶縁ゲート型バイポーラトランジスタ。 - 前記第1のバッファ層が有する単位面積当りの電気的に活性な不純物の総量が、4.5×1011cm−2以上である請求項1に記載の絶縁ゲート型バイポーラトランジスタ。
- 前記半導体材料が珪素であり、
前記第1のバッファ層のドーパントが、プロトンであり、
前記第2のバッファ層のドーパントが、リンまたはヒ素である請求項1または2に記載の絶縁ゲート型バイポーラトランジスタ。 - 前記半導体材料が炭化珪素であり、
前記第1のバッファ層のドーパントが、プロトンであり、
前記第2のバッファ層のドーパントが、窒素である請求項1または2に記載の絶縁ゲート型バイポーラトランジスタ。 - 前記第2のバッファ層の裏面に設けられ前記第2導電型を有するコレクタ層を、さらに備える請求項1〜4のいずれか1項に記載の絶縁ゲート型バイポーラトランジスタ。
- 前記ドリフト層の表面における前記MOSFET部の周囲に設けられた外周部を、さらに備え、
前記コレクタ層は、前記第2のバッファ層の裏面において前記MOSFET部の直下領域および前記外周部の直下領域に渡って設けられ、前記第2導電型を有し、前記外周部の直下領域における不純物濃度が前記MOSFET部の直下領域における不純物濃度よりも低い請求項5に記載の絶縁ゲート型バイポーラトランジスタ。 - 前記ドリフト層の表面における前記MOSFET部の周囲に設けられた外周部を、さらに備え、
前記コレクタ層は、前記第2導電型を有し、前記第2のバッファ層の裏面における前記MOSFET部の直下領域に設けられ、前記第2のバッファ層の裏面における前記外周部の直下領域には設けられていない請求項5に記載の絶縁ゲート型バイポーラトランジスタ。 - 表面にMOSFET部を備えるドリフト層を準備する工程と、
前記ドリフト層の裏面にプロトンをイオン注入することで、厚さ方向における不純物濃度分布が複数の濃度ピークを有し、単位面積当りの電気的に活性な不純物の総量が1.0×1012cm−2以下である第1のバッファ層を形成する第1のバッファ層形成工程と、
前記第1のバッファ層の裏面にV族元素をイオン注入することで、厚さ方向における不純物濃度分布が前記複数の濃度ピークよりも高い濃度ピークを有する第2のバッファ層を形成する第2のバッファ層形成工程と、
を備える絶縁ゲート型バイポーラトランジスタの製造方法。 - 前記第1のバッファ層形成工程で、前記プロトンの注入角度を7度〜60度とする請求項8に記載の絶縁ゲート型バイポーラトランジスタの製造方法。
- 前記第1のバッファ層形成工程は、ファーネスアニールを含み、
前記第2のバッファ層形成工程は、レーザーアニールを含む請求項8または9に記載の絶縁ゲート型バイポーラトランジスタの製造方法。 - 前記第1のバッファ層形成工程におけるイオン注入は、1.5×106eV以下の加速電圧でのイオン注入を、複数回、行うものである請求項8〜10のいずれか1項に記載の絶縁ゲート型バイポーラトランジスタの製造方法。
- 第1導電型の半導体材料で形成されたドリフト層と、
前記ドリフト層の表面に設けられ、前記ドリフト層とpn接合する第2導電型の半導体層を含むMOSFET部と、
前記ドリフト層の裏面に設けられ、前記第1導電型を有し、前記ドリフト層よりも不純物濃度が高く、複数の濃度ピークを有し、単位面積当りの電気的に活性な不純物の総量が1.0×10 12 cm −2 以下である第1のバッファ層と、
前記第1のバッファ層の裏面に設けられ、前記第1導電型を有し、前記第1のバッファ層よりも不純物濃度が高い第2のバッファ層と、
前記ドリフト層の表面における前記MOSFET部の周囲に設けられた外周部と、
前記第2のバッファ層の裏面において前記MOSFET部の直下領域および前記外周部の直下領域に渡って設けられ、第2導電型を有し、前記外周部の直下領域における不純物濃度が前記MOSFET部の直下領域における不純物濃度よりも低いコレクタ層と、
を備える半導体装置。 - 前記外周部は、前記ドリフト層の表面において前記MOSFET部の隣に設けられたゲート配線部と、前記ゲート配線部のさらに隣に設けられた耐圧保持部とを含み、
前記コレクタ層は、前記第2のバッファ層の裏面において前記ゲート配線部の直下領域および前記耐圧保持部の直下領域に渡って設けられ、かつ前記ゲート配線部の直下領域および前記耐圧保持部の直下領域における不純物濃度が前記MOSFET部の直下領域における不純物濃度よりも低い請求項12に記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016219845A JP6784148B2 (ja) | 2016-11-10 | 2016-11-10 | 半導体装置、絶縁ゲート型バイポーラトランジスタ、絶縁ゲート型バイポーラトランジスタの製造方法 |
US15/648,062 US10347715B2 (en) | 2016-11-10 | 2017-07-12 | Semiconductor device having improved safe operating areas and manufacturing method therefor |
DE102017219159.7A DE102017219159A1 (de) | 2016-11-10 | 2017-10-25 | Halbleitervorrichtung und Fertigungsverfahren dafür |
CN201711107493.9A CN108074977A (zh) | 2016-11-10 | 2017-11-10 | 半导体装置及其制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016219845A JP6784148B2 (ja) | 2016-11-10 | 2016-11-10 | 半導体装置、絶縁ゲート型バイポーラトランジスタ、絶縁ゲート型バイポーラトランジスタの製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020136151A Division JP2020182009A (ja) | 2020-08-12 | 2020-08-12 | 半導体装置およびその製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2018078216A JP2018078216A (ja) | 2018-05-17 |
JP2018078216A5 JP2018078216A5 (ja) | 2019-01-10 |
JP6784148B2 true JP6784148B2 (ja) | 2020-11-11 |
Family
ID=62026390
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016219845A Active JP6784148B2 (ja) | 2016-11-10 | 2016-11-10 | 半導体装置、絶縁ゲート型バイポーラトランジスタ、絶縁ゲート型バイポーラトランジスタの製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10347715B2 (ja) |
JP (1) | JP6784148B2 (ja) |
CN (1) | CN108074977A (ja) |
DE (1) | DE102017219159A1 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6964566B2 (ja) * | 2018-08-17 | 2021-11-10 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
DE112020001040T5 (de) | 2019-10-17 | 2021-12-23 | Fuji Electric Co., Ltd. | Halbleitervorrichtung und herstellungsverfahren einer halbleitervorrichtung |
WO2021125140A1 (ja) * | 2019-12-17 | 2021-06-24 | 富士電機株式会社 | 半導体装置 |
JP7374054B2 (ja) * | 2020-08-20 | 2023-11-06 | 三菱電機株式会社 | 半導体装置 |
CN116978937A (zh) * | 2021-02-07 | 2023-10-31 | 华为技术有限公司 | 半导体器件及相关模块、电路、制备方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4156717B2 (ja) * | 1998-01-13 | 2008-09-24 | 三菱電機株式会社 | 半導体装置 |
CN103943672B (zh) * | 2006-01-20 | 2020-06-16 | 英飞凌科技奥地利股份公司 | 处理含氧半导体晶片的方法及半导体元件 |
US7989888B2 (en) * | 2006-08-31 | 2011-08-02 | Infineon Technologies Autria AG | Semiconductor device with a field stop zone and process of producing the same |
JP5150953B2 (ja) | 2008-01-23 | 2013-02-27 | 三菱電機株式会社 | 半導体装置 |
KR101752640B1 (ko) | 2009-03-27 | 2017-06-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체장치 |
JP5569532B2 (ja) * | 2009-11-02 | 2014-08-13 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP5609087B2 (ja) | 2009-12-04 | 2014-10-22 | 富士電機株式会社 | 内燃機関点火装置用半導体装置 |
IT1401754B1 (it) * | 2010-08-30 | 2013-08-02 | St Microelectronics Srl | Dispositivo elettronico integrato e relativo metodo di fabbricazione. |
WO2013005304A1 (ja) * | 2011-07-05 | 2013-01-10 | 三菱電機株式会社 | 半導体装置 |
JP5735077B2 (ja) | 2013-10-09 | 2015-06-17 | 株式会社東芝 | 半導体装置の製造方法 |
WO2015114748A1 (ja) * | 2014-01-29 | 2015-08-06 | 三菱電機株式会社 | 電力用半導体装置 |
JP6269858B2 (ja) * | 2014-11-17 | 2018-01-31 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP6519649B2 (ja) * | 2015-03-13 | 2019-05-29 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
-
2016
- 2016-11-10 JP JP2016219845A patent/JP6784148B2/ja active Active
-
2017
- 2017-07-12 US US15/648,062 patent/US10347715B2/en active Active
- 2017-10-25 DE DE102017219159.7A patent/DE102017219159A1/de active Pending
- 2017-11-10 CN CN201711107493.9A patent/CN108074977A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2018078216A (ja) | 2018-05-17 |
CN108074977A (zh) | 2018-05-25 |
US10347715B2 (en) | 2019-07-09 |
DE102017219159A1 (de) | 2018-05-17 |
US20180130875A1 (en) | 2018-05-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10388775B2 (en) | Semiconductor device having multiple field stop layers | |
KR102204272B1 (ko) | 게이트 트렌치들 및 매립된 종단 구조체들을 갖는 전력 반도체 디바이스들 및 관련 방법들 | |
JP6784148B2 (ja) | 半導体装置、絶縁ゲート型バイポーラトランジスタ、絶縁ゲート型バイポーラトランジスタの製造方法 | |
JP2022031964A (ja) | イオン注入側壁を有するゲート・トレンチを備えるパワー半導体デバイス及び関連方法 | |
US10109725B2 (en) | Reverse-conducting semiconductor device | |
WO2017047285A1 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2019117953A (ja) | トレンチゲート型絶縁ゲートバイポーラトランジスタ | |
US10593789B2 (en) | Semiconductor apparatus and method of manufacturing the same | |
CN109103247B (zh) | 半导体装置及其制造方法 | |
JPWO2012056536A1 (ja) | 半導体装置および半導体装置の製造方法 | |
US20160284693A1 (en) | Semiconductor device and method for manufacturing the same | |
JP2009021285A (ja) | 電力用半導体装置とその製造方法 | |
JP7271659B2 (ja) | 絶縁ゲートパワー半導体装置、およびそのような装置を製造するための方法 | |
KR101798273B1 (ko) | 바이폴라 펀치 쓰루 반도체 디바이스 및 그러한 반도체 디바이스의 제조 방법 | |
KR20160012879A (ko) | 반도체 장치 | |
JP2002246597A (ja) | 半導体装置 | |
JP2020155581A (ja) | 半導体装置 | |
JP3952452B2 (ja) | 半導体装置の製造方法 | |
JP2005252212A (ja) | 逆阻止型半導体装置およびその製造方法 | |
JP2020182009A (ja) | 半導体装置およびその製造方法 | |
CN109564939B (zh) | 半导体装置 | |
JP7361634B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
US11107887B2 (en) | Semiconductor device | |
JP2017188569A (ja) | 半導体装置およびその製造方法 | |
JP4904635B2 (ja) | 半導体装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181121 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20181121 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190830 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20191001 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20191119 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20200602 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200812 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20200824 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200923 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20201006 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6784148 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |