JP6746185B2 - Jig for semiconductor wafer plating - Google Patents

Description

The present invention, evenly-metal plating on a semiconductor wafer (in particular, silver plating, nickel plating, etc.) Osamu again and again relates semiconductor wafer plating for manufacturing a semiconductor weblog Ha obtained by laminating.

Conventionally, an electrolytic (electric) plating method is used to plate a metal (for example, gold, silver, platinum, copper, etc.) on a semiconductor mounting surface of a semiconductor wafer (a surface on which a semiconductor is mounted, which will be referred to as a surface hereinafter). It is well known to use.

A method for manufacturing a semiconductor device capable of stable power supply is disclosed in such an electrolytic plating process of a plating apparatus that performs electrolytic (electro)plating on the surface of a semiconductor wafer (see Patent Document 1).

In addition, when electroplating an object to be plated such as a semiconductor wafer, a bump having a flat tip shape or a metal film having good in-plane uniformity is formed even under conditions of high current density. There is disclosed a plating device that can be used (see Patent Document 2).

At the time of plating treatment on an object to be plated such as a semiconductor wafer as described above, an electrolysis that forms a plating thin film of a noble metal by sandwiching the semiconductor wafer with a supporting member and using the external DC power source to perform cathodic reduction of metal ions in the plating tank. Since the plating process is performed, various support devices for the wafer have been devised so that the transport plating process in the electrolytic plating tank can be performed quickly and accurately.

JP, 2010-287648, A JP, 2005-145537, A

However, the electrolytic (electro)plating techniques disclosed in Patent Documents 1 and 2 only perform electroplating with a metal on the surface of the semiconductor wafer (mounting surface of the semiconductor). However, in recent years, metal (gold, silver, platinum, copper, etc.) is plated not only on the front surface of the semiconductor wafer but also on the back surface of the semiconductor wafer (the surface opposite to the semiconductor mounting surface). The significance of plating on the back surface of the semiconductor wafer is that the electric conductivity (hereinafter, simply referred to as conductivity) of the wafer semiconductor device can be finally improved, and the resistance value can be lowered to reduce the power consumption. In particular, reduction of power consumption has become one of the most important issues in semiconductor devices used for communication devices such as smartphones these days.

As a method for plating the back surface of the semiconductor wafer for that purpose, a plating film having a thickness of 1 to 3 μm is formed on the back surface of the semiconductor wafer by using a sputtering method or a vapor deposition method. In order to finally improve the conductivity of the wafer semiconductor device, a further improvement in conductivity can be expected by setting the conventional metal plating film of 1 to 3 μ to a thickness of approximately 10 μ or more. However, it was not possible to form a thick plating film (for example, approximately 10 μm or more) on the back surface of the semiconductor wafer by the sputtering method or the vapor deposition method. Therefore, it is conceivable to form a metal plating film on the back surface of the semiconductor wafer with a thickness of approximately 10 μm or more by the above electrolytic (electro) plating.

Conventionally, a semiconductor wafer is hung and supported by a supporting device (for example, a hanger), and a metal thin film is formed by cathodic reduction of metal ions in an aqueous solution using an external DC power source while circulating and moving the hanger by a circulating carrier device. In the electrolytic plating method, the entire back surface of the semiconductor wafer may not be uniformly coated. This is because the current used in electroplating flows perpendicularly to the equipotential surface of the electrode surface, so the current distribution on the electrode surface (processing surface) becomes uneven, and the film is not formed on the periphery of the disk to be processed. Because it becomes thicker.

As described above, even if the metal plating film is formed on the back surface of the semiconductor wafer to a thickness of approximately 10 μ or more simply by using the electroplating method, the metal plating film on the periphery of the semiconductor wafer having a high current density becomes thick and It has a defect that the coating becomes thin in the central portion where the density is low. If the film thickness is distorted during the plating process on the back surface of the semiconductor wafer, the semiconductor function will be impaired when it is incorporated into a semiconductor device, and the semiconductor wafer will be ineligible. In addition, if only a wafer portion plated with a uniform film thickness is used for a semiconductor device, the yield of using the wafer is deteriorated, which is uneconomical.

According to the present invention, a coating formed by metal plating for improving conductivity formed on the back surface of a semiconductor wafer can be treated substantially evenly even though the film thickness is reduced by using an electrolytic plating method. It is intended to provide a semiconductor wafer plating jig, a plating method, a semiconductor device using the semiconductor wafer subjected to the plating process, and various electric devices using the semiconductor device.

The present invention includes a wafer holding plate, a wafer pressing plate that is separate from the wafer holding plate, and a crimping jig that press-bonds the wafer holding plate and the wafer pressing plate to each other. The wafer having a fixed width annular support plate protruding from the outer peripheral edge, a positioning part formed on the surface of the annular support plate, and a wafer holding part formed on the inner peripheral edge of the annular support plate. The pressing plate has an annular plate that comes into pressure contact with the support plate surface of the annular support plate, and a fitting portion formed on the annular plate surface so that it can be fitted into the positioning portion of the annular support plate. A semiconductor wafer is sandwiched between the board and the wafer pressure bonding board via the pressure bonding jig and pressure-fixed to perform electrolytic plating. The present invention relates to a jig for semiconductor wafer plating, which is characterized in that plating is formed uniformly .

According to the present invention, a highly conductive metal (gold, silver, platinum, copper, etc.) plating and a metal (nickel, etc.) plating that protects this highly conductive metal plating are laminated on the entire back surface of a semiconductor wafer. Since the plating is performed almost uniformly on the wafer surface, even if the metal plating film becomes thick, the back surface of the wafer does not have uneven coating and the film thickness can be made uniform. Therefore, it is possible to sufficiently exert the effect of reducing the power consumption due to the improvement of the conductivity and the reduction of the resistance value with the film thickness of the metal plating having high conductivity.

Further, the semiconductor wafer is clamped and fixed by a crimping jig between the wafer holding plate and the wafer pressure bonding plate, and in particular, the semiconductor wafer is clamped while covering the outer peripheral edge portion of the back surface of the semiconductor wafer, that is, the annular edge portion. An electroplating process that forms a metal film by cathodic reduction of metal ions in an aqueous solution while the wafer holding plate and the wafer pressure plate are integrally fixed by the positioning part and the fitting part of each plate and conveyed in the electrolytic bath. It can be carried out.

Therefore, although the current distribution on the electrode surface is not uniform and the metal plating film concentrates on the periphery of the disk-shaped object to be plated, which has a particularly high current density, the metal plating film has a film thickness. The ring-shaped support plate of the board coincides with the portion where the current density is high, and becomes an area where the film thickness of the dummy metal plating film increases. That is, since the annular region of the annular supporting plate of the wafer holding plate coincides with the film thickness increasing region of high current density in the object to be plated, a metal plating film is formed on the annular supporting plate of constant width of the wafer holding plate. However, since the peripheral edge of the back surface of the semiconductor wafer is covered by the annular support plate of the wafer holding plate, the film thickness does not reach the other metal plating area, that is, the wafer holding plate. The current distribution becomes uniform on the back surface of the semiconductor wafer which is not covered with the annular support plate, and the film thickness of the metal plating on the back surface of the semiconductor wafer can be made substantially uniform. Therefore, even if the film thickness of the metal plating is increased, there is an effect that a uniform plating process can be performed.

Further, the positioning portion formed on the plate-shaped support plate of the wafer holding plate is composed of a concave groove formed on the surface of the ring support plate, and the fitting portion formed on the ring plate surface of the wafer pressure plate is formed on the ring plate surface. It can also be composed of a fitting convex portion. This configuration has the effect of facilitating the fitting and positioning of the wafer pressure welding plate with respect to the wafer holding plate.

Also, in the electroplating process, the nonuniform region of the current flowing perpendicularly to the electrode surface, especially the annular region where the thickness of the metal plating film is large, is used as a dummy region with a simple structure, and the other wafer processing body, which is the plating region. The back surface can be plated uniformly, which has the effect of improving the conductivity of the semiconductor wafer and reducing the power consumption.

Further, the semiconductor wafer plated with the metal as described above can be subdivided to manufacture a semiconductor device having a semiconductor substrate, and the power consumption of the semiconductor device can be significantly reduced.

In addition, by mounting the above-described semiconductor device on each electric device (for example, a communication device, an electronic device, a video device, an electric home appliance, a battery, etc.), the operation of each electric device can be speeded up and power consumption can be reduced as much as possible. Since it can be reduced, there is an effect that the unique functionality of each electric device can be improved.

It is a perspective view explaining the composition of the jig for semiconductor wafer plating concerning this embodiment. It is a figure explaining the wafer holding board of the jig|tool for semiconductor wafer plating which concerns on this embodiment. It is a figure explaining the wafer holding board of the jig|tool for semiconductor wafer plating which concerns on this embodiment. It is a figure explaining the wafer pressure welding board of the jig|tool for semiconductor wafer plating which concerns on this embodiment. It is a figure explaining the crimping jig of the jig|tool for semiconductor wafer plating which concerns on this embodiment. It is a perspective view explaining the assembly of the jig for semiconductor wafer plating concerning an embodiment. It is a perspective view explaining the assembly of the jig for semiconductor wafer plating concerning this embodiment. It is a perspective view explaining the assembly of the jig for semiconductor wafer plating concerning an embodiment. It is a perspective view explaining the assembly of the jig for semiconductor wafer plating concerning an embodiment. It is a side view explaining the assembly of the jig for semiconductor wafer plating concerning an embodiment. It is sectional drawing explaining the assembly of the jig|tool for semiconductor wafer plating which concerns on embodiment. It is a figure explaining the process of the plating process using the jig|tool for semiconductor wafer plating which concerns on embodiment.

The present invention relates to a semiconductor wafer having a structure in which silver plating and nickel plating are laminated almost uniformly on the entire back surface of the wafer.

Embodiments of the present invention will be described below in detail with reference to the drawings.

First, a semiconductor wafer plating jig for stacking silver plating, which is a highly conductive metal, and nickel plating for protecting the silver plating on the entire back surface of the semiconductor wafer will be described. In the following embodiments, a case where silver is used for plating as a metal having high conductivity will be described as an example, but the present invention is not limited to this, and another metal having high conductivity is used instead of silver. Metals such as metals (gold, platinum, copper, etc.) can also be used. The jig for semiconductor wafer plating according to the present embodiment is basically a wafer holding plate and a wafer pressure bonding plate which is separate from the wafer holding plate, and these two plates are pressure-bonded to clamp and fix the semiconductor wafer. It is composed of a crimping jig. Hereinafter, the configuration of the semiconductor wafer plating jig 10 will be described with reference to FIGS.

As shown in FIG. 1, a wafer holding plate 11 that constitutes a semiconductor wafer plating jig 10 is provided on an outer peripheral edge so as to infiltrate into a plating tank of an electrolytic plating apparatus (not shown) that performs metal plating. A type (hereinafter, referred to as wafer holding plate 11A) in which a holder 16 for suspending above the plating tank of the electrolytic plating apparatus is provided on the upper end of the suspension portion 12 that is being operated, and B in which the holder 16 is not provided. It is composed of two types, a mold (hereinafter referred to as wafer holding plate 11B).

The difference between the wafer holding board 11A and the wafer holding board 11B is that a holder 16 is provided on the upper end of the suspension portion 12 in the A type. Further, the suspension section 12 protruding from the outer peripheral edges of the wafer holding board 11A and the wafer holding board 11B will be described later in detail, but the suspension section 12 of the wafer holding board 11A and the suspension section 12 of the wafer holding board 11B are integrated. When they are overlapped with each other, the annular supporting plates 13 are bent so as to vertically bend to form a space of a predetermined distance (for example, 20 mm) so as to be bent outward in the middle of the suspension portion 12. As a material of the wafer holding plate 11A and the wafer holding plate 11B, stainless steel (SUS), which is an alloy that is resistant to acid and has excellent durability, is preferably used.

As shown in FIGS. 2 and 3, the main body of the wafer holding plate 11A and the wafer holding plate 11B is composed of an annular support plate 13 having a constant width, and as shown in FIG. A concave groove 14 as a positioning portion is formed in an annular substantially central position on a surface facing each other when the wafer holding plate 11B and the wafer holding plate 11B are integrally stacked. The concave groove 14 is fitted with a wafer pressure plate 20 described later. The fitting convex portion 21 as the fitting portion is fitted. As a result, the semiconductor wafer 30 can be easily positioned and pinched by the wafer holding plate 11A and the wafer holding plate 11B and the respective wafer pressure contact plates 20.

In addition, an inner peripheral edge portion of the annular support plate 13 is formed with a wafer fitting recess 15 as an annular wafer holding portion in a state of being in contact with the annular inner space, and the width of the wafer fitting recess 15 is a semiconductor wafer. The width of the outer peripheral edge of the semiconductor wafer 30 is about 1 mm, and the depth is about the same thickness of the semiconductor wafer 30, that is, about 200 μm.

The wafer fitting recess 15 is configured so that the semiconductor wafer 30 can be supported and mounted on the annular support plate 13 so that the outer peripheral edge of the disk-shaped semiconductor wafer 30 is fitted to close the annular inner space. Has been done. That is, the semiconductor wafer 30 is located in the annular inner space of the annular support plate 13, and the back surface of the semiconductor wafer 30 is plated with silver and nickel by electrolytic plating. Here, the plating surface of the semiconductor wafer 30 in the present embodiment is not the surface that opposes when the wafer holding plate 11A and the wafer holding plate 11B are integrally stacked, but the back surface. That is, in the semiconductor wafer 30, the semiconductor mounting surface (hereinafter referred to as the front surface of the semiconductor wafer 30) is arranged so as to oppose it when the wafer holding board 11A and the wafer holding board 11B are superposed on each other. Metals such as silver and nickel are plated on the surface on the back side of the mounting surface (hereinafter referred to as the back surface of the semiconductor wafer 30) by electrolytic plating.

A material such as silicon is used for the semiconductor wafer 30, but it is difficult to directly plate silver on the surface of silicon. Therefore, a thin film of silver is previously attached to the plated surface of the semiconductor wafer 30 (the back surface of the semiconductor wafer 30), and the electroplating treatment with silver or nickel is facilitated by energizing the plated surface. At this time, a circuit pattern is formed on the surface of the semiconductor wafer 30 (semiconductor mounting surface), and various semiconductors (for example, ICs (semiconductor integrated circuits) composed of transistors, capacitors, resistors, etc.) are formed therein. ) Is implemented. Therefore, the surface of the semiconductor wafer 30 is previously covered with a film made of an insulating material, and silver and nickel are prevented from adhering to the surface of the semiconductor wafer 30 by electrolytic plating.

With the above-described configuration, the ring-shaped regions of the ring-shaped support plates 13 of the wafer holding plate 11A and the wafer holding plate 11B coincide with the film thickness increasing regions of high current density in the back surface of the semiconductor wafer 30. Although the silver or nickel plating film concentrates on the annular support plate 13 having a constant width of the wafer holding plate 11B to have a film thickness, the peripheral edge of the back surface of the semiconductor wafer 30 has a wafer holding plate 11A and a wafer holding plate 11B. Since it is covered with the annular support plate 13 of the semiconductor wafer, the film thickness does not become another area, that is, the back surface of the semiconductor wafer which is not covered with the annular support plate 13 of the wafer holding plate 11A and the wafer holding plate 11B (that is, , The exposed surface) has a uniform current distribution, and the thickness of the plating of silver or nickel on the back surface of the semiconductor wafer 30 can be made substantially uniform. As a result, it is possible to perform uniform plating even if the silver or nickel plating film is thickened.

According to the above configuration, in the present embodiment, the thickness where the effect of improving the electrical conductivity or reducing the resistance value is small even when the conventional plating treatment or the like is not performed or the plating treatment is performed (for example, approximately 1 to Conductivity between various semiconductor integrated circuits installed on the front surface of the semiconductor wafer 30 that has been plated with silver of 3 μm is subjected to electrolytic plating of silver with a film thickness (for example, about 10 μm). Can be improved and the resistance value can be reduced, and the effect of reducing power consumption can be sufficiently achieved.

As shown in FIG. 4, the wafer pressing plate 20 for sandwiching the semiconductor wafer 30 by integrally uniting with the annular supporting plates 13 of the wafer holding plate 11A and the wafer holding plate 11B described above is an annular plate made of vinyl chloride, for example. It is formed into a shape. The wafer press-contacting plate 20 is configured to be capable of press-contacting with the support plate surface of the annular support plate 13 in substantially the same size, and one surface of the wafer press-contacting plate 20 includes a wafer holding plate 11A and a wafer holding plate 11B. Is a fitting portion of the wafer pressure welding plate 20 so that it can be fitted into the concave groove 14 which is a positioning portion of the annular support plate 13 when the plate surfaces of the respective annular support plates 13 are combined and united. The fitting convex portion 21 is provided so as to project on the wafer pressure bonding plate 20. The fitting convex portion 21 may be formed in a ring shape along the wafer pressure welding plate 20, or may be a semi-circular line formed by appropriately cutting the middle of the wafer pressure welding plate 20.

Further, the present invention is not limited to the above-described embodiment, a convex projection is provided on the annular support plate 13 as a positioning portion, and a fitting recess (concave groove) is provided as a fitting portion on the wafer pressing plate 20 to form a convex shape as a positioning portion. It is also possible to configure so that a fitting recess is fitted as the fitting and the fitting portion. Further, a positioning pin as a positioning portion is provided so as to project above the annular support plate 13, a positioning hole is provided as a fitting portion in the wafer pressure welding plate 20, and a positioning pin as a positioning portion is inserted into the positioning hole as a fitting portion. Then, the wafer holding board 11A and the wafer holding board 11B and the wafer pressure board 20 can be positioned and fitted together. That is, the configuration of the positioning portion of the annular support plate 13 and the fitting portion of the wafer pressing plate 20 is such that the semiconductor wafer 30 can be reliably positioned and sandwiched between the annular support plate 13 and the wafer pressing plate 20. It is not particularly limited.

The wafer holding board 11A, the wafer holding board 11B, and the wafer pressure-bonding board 20 are configured as described above, and a plurality of crimping jigs 40 are used in order to overlap and fix the two boards integrally. As shown in FIG. 5, the crimping jig 40 is formed in a clip shape with an elastic plate body having a U-shaped cross section (for example, polypropylene). As shown in FIG. 1, four crimping jigs are arranged at intervals of 90 degrees. By the jig 40, both the annular supporting plate 13 of the wafer holding plate 11A and the wafer holding plate 11B and the wafer pressing plate 20 are overlapped and sandwiched from the outer side surface. For this reason, the crimping jig 40 is provided with an opening for holding the annular support plate 13 and the wafer pressure plate 20, and a holding space 41 continuous with the opening. The opening has a narrow tip, and the elastic force of the crimping jig 40 holds the annular support plate 13 and the wafer pressure plate 20 together.

Then, the suspension portion 12 of the wafer holding board 11A and the suspension portion 12 of the wafer holding board 11B are integrally overlapped with each other to configure the semiconductor wafer plating jig 10 in the present embodiment (see FIG. 1). As a result, the semiconductor wafers 30 are sandwiched one by one in the annular inner space formed between the annular support plates 13 constituting the wafer holding plate 11A and the wafer holding plate 11B. That is, the semiconductor wafer plating jig 10 according to this embodiment is capable of simultaneously performing electrolytic plating on the back surfaces of two semiconductor wafers 30 at a time to form a silver-plated film having a film thickness.

The semiconductor wafer plating jig 10 is configured as described above, and the procedure for electrolytically plating silver or nickel on the back surface of the semiconductor wafer 30 using the jig will be described below.

First, a procedure for attaching the semiconductor wafer 30 to the semiconductor wafer plating jig 10 will be described with reference to FIGS. As shown in FIGS. 6 and 7, the outer peripheral edge portion of the semiconductor wafer 30 to be plated is fitted into the respective wafer fitting recesses 15 of the wafer holding board 11A and the wafer holding board 11B, The semiconductor wafer 30 is placed on the wafer holding plate 11 in a state where the annular inner space 11 is closed.

Next, as shown in FIG. 8, the wafer pressing plate 20 is placed on each of the annular supporting plates 13 of the wafer holding plate 11A and the wafer holding plate 11B. At this time, the fitting convex portions 21 of the wafer pressure bonding board 20 are fitted into the respective wafer fitting concave portions 15 of the wafer holding board 11A and the wafer holding board 11B to ensure positioning and united fixing of both boards, and The outer peripheral edge of the wafer 30 is sandwiched and fixed by both plates.

Then, as shown in FIG. 9, in a state in which the wafer pressing plate 20 is fixed to the annular supporting plates 13 of the wafer holding plate 11A and the wafer holding plate 11B with four pressure bonding jigs 40 at intervals of 90 degrees, The semiconductor wafer plating jig 10 is configured by stacking the suspension parts 12 of the wafer holding plate 11A and the wafer holding plate 11B, respectively. Then, the holder 16 provided on the upper end of the suspension portion 12 of the wafer holding board 11A is hung above the plating tank of the electrolytic plating apparatus (not shown), and the semiconductor wafer 30 is immersed in the plating tank. Electrolytic plating is performed. That is, the holder 16 holds the semiconductor wafer plating jig 10 in which two semiconductor wafers 30 are sandwiched between the wafer holding plate 11A and the wafer holding plate 11B and the respective wafer pressure welding plates 20 for electrolytic treatment. It is for hanging above the plating tank of the plating apparatus.

Then, the plating bath of the electrolytic plating apparatus is filled with a plating solution containing silver and nickel ions, and the semiconductor wafer plating jig 10 is set to a cathode (cathode) while the semiconductor wafer 30 is immersed in the plating solution. (-)), and an electric current is applied from an external DC power source using a metal plate of silver or nickel which is similarly immersed in the plating solution as an anode (anode (+)). As a result, on the anode side, electrons are carried to the cathode side through the external DC power source by the anode reaction, and silver and nickel ions are released into the plating solution in the plating tank. On the other hand, on the cathode side, metallic silver and metallic nickel are deposited by the cathodic reaction between the electrons charged on the back surface of the semiconductor wafer 30 which is the surface to be plated and the silver and nickel ions in the plating solution in the plating tank to deposit metallic silver and metallic nickel. A coating of silver and nickel is formed on the back surface of 30, and a plating process is performed.

As shown in FIGS. 10 and 11, the structure of the suspension part 12 of the wafer holding plate 11A and the wafer holding plate 11B is such that the vertical hanging plate having a constant width and the upper half part thereof are bent forward by approximately 45°, The engaging portion is formed near the upper end thereof, and in particular, the engaging portion includes a mating tongue piece 17 projecting forward. The structure of such an engaging portion is a structure configured to suspend two semiconductor wafers 30 as a unit at the same time for silver and nickel plating. That is, the ring-shaped support plates 13 of the wafer holding plate 11A and the wafer holding plate 11B are overlapped with each other while holding a space at a constant interval, and the semiconductor wafers 30 are placed on the ring-shaped support plates 13 of the wafer holding plate 11A and the wafer holding plate 11B, respectively. The fitting convex portion 21 of the wafer pressing plate 20 is fitted and sandwiched in the concave groove 14 at a substantially central position of the annular pressing plate 20 and the annular supporting plate 13 and the wafer pressing plate 20 are overlapped with each other. Fix with.

As shown in FIG. 11, two units of the annular supporting plate 13 of the wafer holding plate 11A and the wafer holding plate 11B and the wafer pressure plate 20 are formed at a fixed interval, and each unit is formed as shown in FIG. By sandwiching the semiconductor wafer 30, it is possible to hold two semiconductor wafers 30 at the same time and perform plating processing. At this time, the suspension part 12 protruding from the wafer holding plate of the other unit is formed in a shape contrasting with the suspension part 12 of the holding plate of the one unit, and only the engaging part is formed on the wafer holding plate 11B. A piece insertion hole 18 (see FIG. 3) is formed, and the receiving tongue piece 17 of the wafer holding plate 11B is provided directly above the tongue piece insertion hole 18, and the mating tongue piece 17 and the wafer holding plate of the wafer holding plate 11A are provided. By integrally stacking the receiving tongue piece 17 of 11B, the central positions of the semiconductor wafers 30 sandwiched between the wafer holding plate 11A and the wafer holding plate 11B can be made horizontal and the same. The mating tongue piece 17 of the wafer holding plate 11A and the receiving tongue piece 17 of the wafer holding plate 11B of one unit have substantially the same shape.

Therefore, when two semiconductor wafers 30 are suspended as a unit to perform a plating process at the same time, the annular support plate 13 and the wafer pressure bonding plate 20 of the wafer holding plate 11A and the wafer holding plate 11B holding the semiconductor wafer 30 are sandwiched. One unit and the other unit are arranged so as to face each other, and the engaging portions of the suspension portions of the respective units are brought into contact with each other and overlapped. At this time, the united tongue piece 17 of one suspension portion is projected from the tongue piece insertion hole 18 of the other suspension portion and is fixed to overlap with the receiving tongue piece 17 so that the units are integrally connected to each other. The back surfaces of the two semiconductor wafers 30 sandwiched between can be simultaneously plated with silver and nickel.

Next, a plating method using the above-described semiconductor wafer plating jig 10 will be described with reference to FIG.

As shown in FIG. 12, first, pretreatment (step S10) of the semiconductor wafer plating jig 10 in which two semiconductor wafers 30 are set is performed. In this pretreatment, the plating surface of the semiconductor wafer 30 (the back surface of the semiconductor wafer 30) is immersed in a solution of potassium cyanide or the like to wash impurities and perform surface activation treatment. To enable uniform electroplating on the plating surface.

Next, the semiconductor wafer 30 is immersed in a plating bath for silver plating, and an electric current is applied for a predetermined time to perform silver plating treatment (step S11). In this silver plating process, the semiconductor wafer 30 is immersed in a plating bath filled with a plating solution containing silver ions in an electrolytic plating apparatus (not shown). In this plating tank, the semiconductor wafer plating jig 10 holding the semiconductor wafer 30 as the cathode electrode is used as described above, and silver is used as the associative electrode. Then, a DC current is supplied from an external DC power supply (not shown) to the jig 10 for semiconductor wafer plating that forms the cathode electrode and the silver that forms the cathode electrode, so that the plated surface (back surface) of the semiconductor wafer 30 is silvered. A plating film is formed. In electrolytic plating, a silver-plated film having a predetermined thickness is formed in accordance with the current supply time and current value supplied from the external DC power supply. Therefore, in the present embodiment, the current supply time and the current value for forming the silver plating having a predetermined film thickness (about 10 μm in the embodiment) are supplied from the external DC power supply.

Thus, even when silver plating having a thickness of approximately 10 μ, which has not been used in the past, is formed on the plated surface of the semiconductor wafer 30, the semiconductor wafer 30 is held between the wafer holding plates 11A and 11B and the respective wafer pressure bonding plates 20. Therefore, in particular, the outer peripheral edge portion of the plating surface of the semiconductor wafer 30, that is, the annular edge portion is covered with the annular supporting plate 13 of the wafer holding plate 11A and the wafer holding plate 11B in the plating solution in the plating bath. By the cathodic reaction of the silver ions, a silver plating film is formed on the surface of the plated surface of the semiconductor wafer 30. At this time, on the annular support plate 13 that covers the annular edge of the plated surface of the semiconductor wafer 30, the silver plating film concentrates to a film thickness, but the semiconductor wafers not covered by other annular support plates 13 are formed. The current distribution is uniform on the back surface (that is, the exposed surface), and it is possible to make the thickness of the plating of silver on the back surface of the semiconductor wafer 30 substantially uniform.

Further, in the present embodiment, the two semiconductor wafers 30 are sandwiched between the wafer holding plate 11A and the wafer holding plate 11B that form the semiconductor wafer plating jig 10. The semiconductor mounting surfaces (non-plated surfaces) of the two semiconductor wafers 30 are arranged on the opposing surfaces of the wafer holding board 11A and the wafer holding board 11B, and the plated surface of the semiconductor wafer 30 is provided on the back surface of each mounting surface. Are arranged. Then, the silver anode electrodes are arranged at two locations outside the jig 10 for semiconductor wafer plating, which is the cathode electrode, with a predetermined distance. This makes it possible to perform silver plating on the plated surfaces of two semiconductor wafers 30 at the same time in one plating tank.

Next, a shower water washing process (step S12) is performed on the plated surface of the semiconductor wafer 30. In this shower water washing treatment, the plating surface of the semiconductor wafer 30 is shower-washed to wash away the excess plating solution on the annular support plate 13 and the plating surface.

Next, the semiconductor wafer plating jig 10 is immersed in a predetermined immersion water washing liquid to perform immersion water washing treatment on the plated surface of the semiconductor wafer 30 (step S13). In this immersion washing process, the plating surface of the silver-plated semiconductor wafer 30 is dipped in the immersion washing solution to wash the excess plating solution on the plating surface of the semiconductor wafer 30. That is, in the present embodiment, the plating surface of the semiconductor wafer 30 is washed and excess plating solution is washed on the plating surface in two steps of the shower water washing process (step S12) and the immersion water washing process (step S13). ing.

Next, the semiconductor wafer 30 is immersed in a plating bath for nickel plating, and an electric current is applied for a predetermined time to perform nickel plating treatment (step S14). In this nickel plating treatment, the semiconductor wafer 30 is immersed in a plating tank filled with a plating solution containing nickel ions in an electrolytic plating apparatus (not shown). In this plating tank, the semiconductor wafer plating jig 10 sandwiching the semiconductor wafer 30 is used as the cathode electrode as described above, and nickel is used as the associative electrode. Then, a DC current is supplied from an external DC power supply (not shown) to the semiconductor wafer plating jig 10 that forms the cathode electrode and the nickel that forms the associative electrode, so that the silver plating applied to the back surface of the semiconductor wafer 30. Then, nickel plating is formed with a film thickness of approximately 1 μ. Also in this case, the current supply time and the current value for forming the nickel plating having a predetermined film thickness (approximately 1 μm in the embodiment) are supplied from the external DC power supply.

As described above, even when the approximately 1 μ nickel plating is laminated on the unprecedented approximately 10 μ silver plating, the nickel plating film is concentrated on the annular support plate 13 to increase the film thickness, The current distribution is uniform on the back surface (that is, the exposed surface) of the semiconductor wafer that is not covered by the other annular support plate 13, and it is possible to keep the film thickness of the nickel plating on the back surface of the semiconductor wafer 30 substantially uniform. ..

In this nickel plating process as well, similar to the silver plating process described above, the nickel anode electrodes are arranged at two positions outside the jig 10 for semiconductor wafer plating, which is the cathode electrode, at a predetermined distance. This makes it possible to simultaneously perform nickel plating on the plating surfaces of two semiconductor wafers 30 in one plating tank.

Next, the shower water washing process of the semiconductor wafer plating jig 10 (step S15) is performed. In this shower water washing treatment, shower washing of the plating surface of the annular support plate 13 and the semiconductor wafer 30 is performed to wash away excess plating solution on the plating surface.

Next, the semiconductor wafer plating jig 10 is immersed in a predetermined immersion water washing solution to perform immersion water washing treatment on the plated surface of the semiconductor wafer 30 (step S16). In this immersion water washing treatment, the plating surface of the nickel-plated semiconductor wafer 30 is dipped in the immersion water washing liquid to wash the excess plating liquid on the plating surface of the semiconductor wafer 30. That is, in the present embodiment, similarly to after the above-described silver plating treatment, the plating surface of the semiconductor wafer 30 is washed in two steps of the shower water washing treatment (step S15) and the immersion water washing treatment (step S16), The excess plating solution on the plating surface is being cleaned.

Next, the two semiconductor wafers 30 sandwiched and fixed to the semiconductor wafer plating jig 10 are removed.

Next, a hot water washing process (step S17) of washing the two removed semiconductor wafers 30 with hot water is performed. In this hot water washing process, the plated surface of the semiconductor wafer 30 that has been electrolytically plated with silver and nickel in the above-described process is hot water washed. In this way, by washing the plated surface of the semiconductor wafer 30 with hot water, there is an effect of promoting the drying of the plated surface in the drying process (step S18) described later.

Finally, a drying process (step S18) of drying the two semiconductor wafers 30 is performed. In this drying treatment, the semiconductor wafer 30 electrolytically plated with silver and nickel is placed in a constant temperature circulation drying oven and exposed to dry air at a constant temperature, whereby the plated surface of the semiconductor wafer 30 is quickly dried. With this step as the end, the plating process of the semiconductor wafer 30 is completed.

As described above, the conductivity of the semiconductor wafer 30 can be improved and the resistance value can be reduced by first processing the plated surface of the semiconductor wafer 30 with silver plating having a predetermined thickness (for example, 10 μm). Then, by laminating a nickel plating having a predetermined thickness (for example, 1 μ) on the upper layer of the silver plating, it is possible to prevent the diffusion of the silver plating and to form the plated surface of the semiconductor wafer 30 having improved resistance to the chemical solution. it can.

A communication device, an electronic device, a video device, a home electric appliance, a battery, or the like having a semiconductor device manufactured by the semiconductor wafer manufactured by the above-described semiconductor wafer plating method will be described.

In recent years, as a communication device, a communication device such as a smartphone or a tablet terminal equipped with a large liquid crystal display device has become widespread. In such a communication device, since a large liquid crystal display device is used, the power consumption is large, and the battery of the device needs to be consumed faster and needs to be charged frequently as compared with a conventional mobile phone (so-called Galaga). There was a problem that it was not easy to use.

In such a situation, a highly conductive metal (gold, silver, platinum, copper, etc.) plating and a metal (nickel, etc.) plating that protects this highly conductive metal plating are laminated and plated almost uniformly. However, by using the semiconductor device manufactured by the semiconductor wafer 30 in which the film thickness of the metal plating having high conductivity is increased as much as possible, it is possible to improve the conductivity and decrease the resistance value. It is possible to provide a communication device that is easy to use and has low consumption.

In addition, even in other communication devices, electronic devices, video devices, home appliances, batteries, etc., by using the semiconductor wafer 30 formed with metal plating according to the present invention, it is possible to provide devices with low power consumption. Power can be saved in homes, companies, public facilities, etc., and the increase in carbon dioxide due to power generation, which has been a problem in recent years, can be suppressed, and a semiconductor device that is friendly to the global environment can be provided.

10 Semiconductor wafer plating jig 10
11A Wafer holding plate 11B Wafer holding plate 12 Suspension part 13 Annular support plate 14 Recessed groove 15 Wafer fitting concave part 16 Holder 17 Tongue piece 20 Wafer pressure bonding plate 21 Fitting convex part 30 Semiconductor wafer

Claims (1)

A wafer holder
A wafer pressure welding plate separate from the wafer holding plate,
A crimping jig for crimping and fixing the wafer holding plate and the wafer pressure bonding plate,
The wafer holder is
An annular support plate having a constant width with a suspension portion protruding from the outer peripheral edge,
A positioning portion formed on the surface of the annular support plate,
A wafer holding portion formed on the inner peripheral edge of the annular support plate,
The wafer press plate is
An annular plate that is in pressure contact with the support plate surface of the annular support plate,
A fitting portion formed on the annular plate surface so as to be freely fitted to the positioning portion of the annular support plate,
By sandwiching and crimping a semiconductor wafer via the crimping jig between the wafer holding plate and the wafer pressure welding plate to perform electrolytic plating, a semiconductor wafer not covered by the annular support plate of the wafer holding plate can be formed. A jig for semiconductor wafer plating, wherein metal plating is uniformly formed on the back surface.

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