JP6727111B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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JP6727111B2
JP6727111B2 JP2016246555A JP2016246555A JP6727111B2 JP 6727111 B2 JP6727111 B2 JP 6727111B2 JP 2016246555 A JP2016246555 A JP 2016246555A JP 2016246555 A JP2016246555 A JP 2016246555A JP 6727111 B2 JP6727111 B2 JP 6727111B2
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chip
semiconductor device
semiconductor
device wafer
electrode
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Japanese (ja)
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JP2018101685A5 (https=
JP2018101685A (ja
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翔太 三木
翔太 三木
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2016246555A priority Critical patent/JP6727111B2/ja
Priority to US15/825,622 priority patent/US10340200B2/en
Publication of JP2018101685A publication Critical patent/JP2018101685A/ja
Publication of JP2018101685A5 publication Critical patent/JP2018101685A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/40Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/47Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40Fillings or auxiliary members in containers, e.g. centering rings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H10P72/7418Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. a chip mounting substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7422Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/20Arrangements for cooling
    • H10W40/22Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/014Manufacture or treatment using batch processing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/297Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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JP2016246555A 2016-12-20 2016-12-20 半導体装置及びその製造方法 Active JP6727111B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2016246555A JP6727111B2 (ja) 2016-12-20 2016-12-20 半導体装置及びその製造方法
US15/825,622 US10340200B2 (en) 2016-12-20 2017-11-29 Semiconductor device

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Application Number Priority Date Filing Date Title
JP2016246555A JP6727111B2 (ja) 2016-12-20 2016-12-20 半導体装置及びその製造方法

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JP2018101685A JP2018101685A (ja) 2018-06-28
JP2018101685A5 JP2018101685A5 (https=) 2019-07-11
JP6727111B2 true JP6727111B2 (ja) 2020-07-22

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7063224B2 (ja) * 2018-10-09 2022-05-09 株式会社デンソー 半導体モジュール
US11410961B2 (en) * 2020-03-17 2022-08-09 Micron Technology, Inc. Methods and apparatus for temperature modification in bonding stacked microelectronic components and related substrates and assemblies
KR102792968B1 (ko) * 2020-09-04 2025-04-11 에스케이하이닉스 주식회사 적층 반도체 칩을 포함하는 반도체 패키지 및 그 제조 방법
US12176313B2 (en) 2021-07-12 2024-12-24 Samsung Electronics Co., Ltd. Semiconductor package

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5264640B2 (ja) * 2009-07-24 2013-08-14 新光電気工業株式会社 積層型半導体装置及びその製造方法
JP2012004432A (ja) 2010-06-18 2012-01-05 Elpida Memory Inc 半導体装置
KR101692955B1 (ko) * 2010-10-06 2017-01-05 삼성전자 주식회사 반도체 패키지 및 그 제조 방법
JP2012222038A (ja) * 2011-04-05 2012-11-12 Elpida Memory Inc 半導体装置の製造方法
JP5357241B2 (ja) * 2011-08-10 2013-12-04 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
KR101906408B1 (ko) * 2011-10-04 2018-10-11 삼성전자주식회사 반도체 패키지 및 그 제조 방법
KR101916225B1 (ko) * 2012-04-09 2018-11-07 삼성전자 주식회사 Tsv를 구비한 반도체 칩 및 그 반도체 칩 제조방법
JP2014060241A (ja) * 2012-09-18 2014-04-03 Toray Ind Inc 半導体装置の製造方法
TWI518878B (zh) * 2012-12-18 2016-01-21 村田製作所股份有限公司 Laminated type electronic device and manufacturing method thereof
KR102143518B1 (ko) * 2013-10-16 2020-08-11 삼성전자 주식회사 칩 적층 반도체 패키지 및 그 제조 방법
KR20150066184A (ko) * 2013-12-06 2015-06-16 삼성전자주식회사 반도체 패키지 및 그 제조방법
US9269700B2 (en) * 2014-03-31 2016-02-23 Micron Technology, Inc. Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods
JP2015225933A (ja) * 2014-05-27 2015-12-14 マイクロン テクノロジー, インク. 半導体装置及びその製造方法
JP2016062995A (ja) * 2014-09-16 2016-04-25 株式会社東芝 半導体装置および半導体装置の製造方法
JP6276151B2 (ja) * 2014-09-17 2018-02-07 東芝メモリ株式会社 半導体装置
JP6032345B2 (ja) 2015-12-07 2016-11-24 住友ベークライト株式会社 接着フィルム

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JP2018101685A (ja) 2018-06-28
US10340200B2 (en) 2019-07-02

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