JP2018101685A5 - - Google Patents

Download PDF

Info

Publication number
JP2018101685A5
JP2018101685A5 JP2016246555A JP2016246555A JP2018101685A5 JP 2018101685 A5 JP2018101685 A5 JP 2018101685A5 JP 2016246555 A JP2016246555 A JP 2016246555A JP 2016246555 A JP2016246555 A JP 2016246555A JP 2018101685 A5 JP2018101685 A5 JP 2018101685A5
Authority
JP
Japan
Prior art keywords
chip
semiconductor
semiconductor device
semiconductor chip
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016246555A
Other languages
English (en)
Japanese (ja)
Other versions
JP2018101685A (ja
JP6727111B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2016246555A priority Critical patent/JP6727111B2/ja
Priority claimed from JP2016246555A external-priority patent/JP6727111B2/ja
Priority to US15/825,622 priority patent/US10340200B2/en
Publication of JP2018101685A publication Critical patent/JP2018101685A/ja
Publication of JP2018101685A5 publication Critical patent/JP2018101685A5/ja
Application granted granted Critical
Publication of JP6727111B2 publication Critical patent/JP6727111B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2016246555A 2016-12-20 2016-12-20 半導体装置及びその製造方法 Active JP6727111B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2016246555A JP6727111B2 (ja) 2016-12-20 2016-12-20 半導体装置及びその製造方法
US15/825,622 US10340200B2 (en) 2016-12-20 2017-11-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016246555A JP6727111B2 (ja) 2016-12-20 2016-12-20 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2018101685A JP2018101685A (ja) 2018-06-28
JP2018101685A5 true JP2018101685A5 (https=) 2019-07-11
JP6727111B2 JP6727111B2 (ja) 2020-07-22

Family

ID=62556959

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016246555A Active JP6727111B2 (ja) 2016-12-20 2016-12-20 半導体装置及びその製造方法

Country Status (2)

Country Link
US (1) US10340200B2 (https=)
JP (1) JP6727111B2 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7063224B2 (ja) * 2018-10-09 2022-05-09 株式会社デンソー 半導体モジュール
US11410961B2 (en) * 2020-03-17 2022-08-09 Micron Technology, Inc. Methods and apparatus for temperature modification in bonding stacked microelectronic components and related substrates and assemblies
KR102792968B1 (ko) * 2020-09-04 2025-04-11 에스케이하이닉스 주식회사 적층 반도체 칩을 포함하는 반도체 패키지 및 그 제조 방법
US12176313B2 (en) 2021-07-12 2024-12-24 Samsung Electronics Co., Ltd. Semiconductor package

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5264640B2 (ja) * 2009-07-24 2013-08-14 新光電気工業株式会社 積層型半導体装置及びその製造方法
JP2012004432A (ja) 2010-06-18 2012-01-05 Elpida Memory Inc 半導体装置
KR101692955B1 (ko) * 2010-10-06 2017-01-05 삼성전자 주식회사 반도체 패키지 및 그 제조 방법
JP2012222038A (ja) * 2011-04-05 2012-11-12 Elpida Memory Inc 半導体装置の製造方法
JP5357241B2 (ja) * 2011-08-10 2013-12-04 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
KR101906408B1 (ko) * 2011-10-04 2018-10-11 삼성전자주식회사 반도체 패키지 및 그 제조 방법
KR101916225B1 (ko) * 2012-04-09 2018-11-07 삼성전자 주식회사 Tsv를 구비한 반도체 칩 및 그 반도체 칩 제조방법
JP2014060241A (ja) * 2012-09-18 2014-04-03 Toray Ind Inc 半導体装置の製造方法
TWI518878B (zh) * 2012-12-18 2016-01-21 村田製作所股份有限公司 Laminated type electronic device and manufacturing method thereof
KR102143518B1 (ko) * 2013-10-16 2020-08-11 삼성전자 주식회사 칩 적층 반도체 패키지 및 그 제조 방법
KR20150066184A (ko) * 2013-12-06 2015-06-16 삼성전자주식회사 반도체 패키지 및 그 제조방법
US9269700B2 (en) * 2014-03-31 2016-02-23 Micron Technology, Inc. Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods
JP2015225933A (ja) * 2014-05-27 2015-12-14 マイクロン テクノロジー, インク. 半導体装置及びその製造方法
JP2016062995A (ja) * 2014-09-16 2016-04-25 株式会社東芝 半導体装置および半導体装置の製造方法
JP6276151B2 (ja) * 2014-09-17 2018-02-07 東芝メモリ株式会社 半導体装置
JP6032345B2 (ja) 2015-12-07 2016-11-24 住友ベークライト株式会社 接着フィルム

Similar Documents

Publication Publication Date Title
US12315831B2 (en) Package structure and manufacturing method thereof
US12087745B2 (en) Package structure and manufacturing method thereof
US12255196B2 (en) Semiconductor package with thermal relaxation block and manufacturing method thereof
TWI811191B (zh) 半導體裝置及其製造方法
TWI832448B (zh) 半導體裝置及其製造方法
CN103201836B (zh) 具有面阵单元连接体的可堆叠模塑微电子封装
US10115715B2 (en) Methods of making semiconductor device packages and related semiconductor device packages
KR102591618B1 (ko) 반도체 패키지 및 반도체 패키지의 제조 방법
US9029199B2 (en) Method for manufacturing semiconductor device
US11195819B2 (en) Semiconductor device
JP2013138177A (ja) 半導体装置の製造方法
CN116884961A (zh) 电子装置
JP2015008210A (ja) 半導体装置の製造方法
CN101477980B (zh) 具有减小尺寸的堆叠晶片水平封装
KR20200134104A (ko) 반도체 패키지 및 반도체 패키지의 제조 방법
JP2018101685A5 (https=)
JP2012209449A (ja) 半導体装置の製造方法
JP6727111B2 (ja) 半導体装置及びその製造方法
CN104112715A (zh) 半导体装置及其制造方法
JP2015018897A (ja) 半導体装置の製造方法
US11670600B2 (en) Panel level metal wall grids array for integrated circuit packaging
KR101494411B1 (ko) 반도체패키지 및 이의 제조방법
JP2011029370A (ja) 積層型半導体装置及びその製造方法
JP6018672B1 (ja) 半導体装置とその製造方法
TW201507097A (zh) 半導體晶片及具有半導體晶片之半導體裝置