JP6710627B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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JP6710627B2
JP6710627B2 JP2016246521A JP2016246521A JP6710627B2 JP 6710627 B2 JP6710627 B2 JP 6710627B2 JP 2016246521 A JP2016246521 A JP 2016246521A JP 2016246521 A JP2016246521 A JP 2016246521A JP 6710627 B2 JP6710627 B2 JP 6710627B2
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region
recess
semiconductor device
insulating film
main surface
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JP2018101683A (ja
JP2018101683A5 (enExample
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宏基 藤井
宏基 藤井
森　隆弘
隆弘 森
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Renesas Electronics Corp
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Renesas Electronics Corp
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Priority to US15/847,342 priority patent/US10468523B2/en
Priority to CN201711381037.3A priority patent/CN108321203B/zh
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
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    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
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    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
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    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
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    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
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US15/847,342 US10468523B2 (en) 2016-12-20 2017-12-19 Semiconductor device and method for manufacturing the same
CN201711381037.3A CN108321203B (zh) 2016-12-20 2017-12-20 半导体器件及其制造方法

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JP6837384B2 (ja) * 2017-05-23 2021-03-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US10424647B2 (en) 2017-10-19 2019-09-24 Texas Instruments Incorporated Transistors having gates with a lift-up region
JP7195167B2 (ja) * 2019-02-08 2022-12-23 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US11195915B2 (en) * 2019-04-15 2021-12-07 Texas Instruments Incorporated Semiconductor devices with a sloped surface
US11222955B2 (en) * 2020-04-22 2022-01-11 Wolfspeed, Inc. Semiconductor power devices having gate dielectric layers with improved breakdown characteristics and methods of forming such devices
US11469307B2 (en) 2020-09-29 2022-10-11 Taiwan Semiconductor Manufacturing Company, Ltd. Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device
US12057475B2 (en) * 2021-03-11 2024-08-06 Taiwan Semiconductor Manufacturing Company Limited Field effect transistor including a downward-protruding gate electrode and methods for forming the same
US12684805B2 (en) * 2022-07-25 2026-07-14 Globalfoundries U.S. Inc. High performance laterally-diffused metal-oxide semiconductor structure
JP2024053671A (ja) * 2022-10-04 2024-04-16 新電元工業株式会社 半導体装置及びその製造方法
US12648172B2 (en) * 2022-11-10 2026-06-02 Globalfoundries U.S. Inc. Transistor with metal field plate contact
TWI828536B (zh) * 2023-02-08 2024-01-01 力晶積成電子製造股份有限公司 電晶體結構及其製造方法

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