JP6679412B2 - ストレージ制御装置、情報処理方法及びプログラム - Google Patents
ストレージ制御装置、情報処理方法及びプログラム Download PDFInfo
- Publication number
- JP6679412B2 JP6679412B2 JP2016100796A JP2016100796A JP6679412B2 JP 6679412 B2 JP6679412 B2 JP 6679412B2 JP 2016100796 A JP2016100796 A JP 2016100796A JP 2016100796 A JP2016100796 A JP 2016100796A JP 6679412 B2 JP6679412 B2 JP 6679412B2
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- JP
- Japan
- Prior art keywords
- data
- partition
- area
- mlc
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- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
- G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5641—Multilevel memory having cells with different number of storage levels
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System (AREA)
- Read Only Memory (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016100796A JP6679412B2 (ja) | 2016-05-19 | 2016-05-19 | ストレージ制御装置、情報処理方法及びプログラム |
| US15/594,212 US10276249B2 (en) | 2016-05-19 | 2017-05-12 | Storage control device, information processing method, and storage medium |
| CN201710356345.4A CN107402888A (zh) | 2016-05-19 | 2017-05-19 | 存储控制设备及信息处理方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016100796A JP6679412B2 (ja) | 2016-05-19 | 2016-05-19 | ストレージ制御装置、情報処理方法及びプログラム |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020047673A Division JP6852207B2 (ja) | 2020-03-18 | 2020-03-18 | ストレージ制御装置、情報処理方法及びプログラム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017207980A JP2017207980A (ja) | 2017-11-24 |
| JP2017207980A5 JP2017207980A5 (enExample) | 2019-06-13 |
| JP6679412B2 true JP6679412B2 (ja) | 2020-04-15 |
Family
ID=60330378
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016100796A Expired - Fee Related JP6679412B2 (ja) | 2016-05-19 | 2016-05-19 | ストレージ制御装置、情報処理方法及びプログラム |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US10276249B2 (enExample) |
| JP (1) | JP6679412B2 (enExample) |
| CN (1) | CN107402888A (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7047628B2 (ja) * | 2018-06-25 | 2022-04-05 | 日本精機株式会社 | 車両用表示装置 |
| JP7256976B2 (ja) * | 2018-06-25 | 2023-04-13 | 日本精機株式会社 | 車両用表示装置 |
| US11640262B2 (en) * | 2020-05-07 | 2023-05-02 | Micron Technology, Inc. | Implementing variable number of bits per cell on storage devices |
| US20220374216A1 (en) * | 2021-05-20 | 2022-11-24 | Lenovo (United States) Inc. | Method of manufacturing information processing apparatus and mobile computer |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2077559B1 (en) * | 2007-12-27 | 2012-11-07 | Hagiwara Solutions Co., Ltd. | Refresh method of a flash memory |
| JP2010198407A (ja) * | 2009-02-26 | 2010-09-09 | Sony Corp | 情報処理装置、およびデータ記録制御方法、並びにプログラム |
| JP2012089085A (ja) * | 2010-10-22 | 2012-05-10 | Toshiba Corp | 半導体メモリ装置および半導体メモリシステム |
| KR20120043524A (ko) * | 2010-10-26 | 2012-05-04 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그 동작 방법 |
| WO2012147136A1 (en) * | 2011-04-28 | 2012-11-01 | Hitachi, Ltd. | Semiconductor storage apparatus and method for controlling semiconductor storage apparatus |
| US9176864B2 (en) * | 2011-05-17 | 2015-11-03 | SanDisk Technologies, Inc. | Non-volatile memory and method having block management with hot/cold data sorting |
| JP2012240397A (ja) * | 2011-05-24 | 2012-12-10 | Canon Inc | 印刷装置及びその制御方法 |
| KR101625777B1 (ko) * | 2011-12-28 | 2016-05-30 | 인텔 코포레이션 | 휘발성 메모리 및 비휘발성 메모리 간의 코드 및 데이터 저장소들을 분산하기 위한 방법 및 장치 |
| US8954655B2 (en) * | 2013-01-14 | 2015-02-10 | Western Digital Technologies, Inc. | Systems and methods of configuring a mode of operation in a solid-state memory |
| JP2015148859A (ja) * | 2014-02-05 | 2015-08-20 | コニカミノルタ株式会社 | 情報処理装置及び起動制御プログラム並びに起動制御方法 |
| CN104934066B (zh) * | 2014-03-19 | 2018-03-27 | 安华高科技通用Ip(新加坡)公司 | Nand闪存中的读取干扰处理 |
| US10234931B2 (en) * | 2014-05-05 | 2019-03-19 | Empire Technology Development Llc | Electronic device |
| CN103984509B (zh) * | 2014-06-11 | 2019-02-12 | 上海新储集成电路有限公司 | 异构nand型固态硬盘及提高其性能的方法 |
| US10108546B2 (en) * | 2014-12-30 | 2018-10-23 | Sandisk Technologies Llc | Method and system for using non-volatile memory as a replacement for volatile memory |
| US10048898B2 (en) * | 2015-06-15 | 2018-08-14 | Sandisk Technologies Llc | Data retention in a memory block based on local heating |
| KR102309841B1 (ko) * | 2015-08-24 | 2021-10-12 | 삼성전자주식회사 | 표면 실장 기술의 적용에 따른 메모리 셀의 문턱 전압 산포 변화 복구 기능을 갖는 데이터 스토리지 및 그것의 동작 방법 |
-
2016
- 2016-05-19 JP JP2016100796A patent/JP6679412B2/ja not_active Expired - Fee Related
-
2017
- 2017-05-12 US US15/594,212 patent/US10276249B2/en not_active Expired - Fee Related
- 2017-05-19 CN CN201710356345.4A patent/CN107402888A/zh active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JP2017207980A (ja) | 2017-11-24 |
| US10276249B2 (en) | 2019-04-30 |
| CN107402888A (zh) | 2017-11-28 |
| US20170337977A1 (en) | 2017-11-23 |
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