JP6579996B2 - シート、テープおよび半導体装置の製造方法 - Google Patents
シート、テープおよび半導体装置の製造方法 Download PDFInfo
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- JP6579996B2 JP6579996B2 JP2016094499A JP2016094499A JP6579996B2 JP 6579996 B2 JP6579996 B2 JP 6579996B2 JP 2016094499 A JP2016094499 A JP 2016094499A JP 2016094499 A JP2016094499 A JP 2016094499A JP 6579996 B2 JP6579996 B2 JP 6579996B2
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- resin
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
- H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- Condensed Matter Physics & Semiconductors (AREA)
- Dicing (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Adhesive Tapes (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
図1に示すように、テープ1は、はく離ライナー13と、はく離ライナー13上に位置するシート71a、71b、71c、……、71m(以下、「シート71」と総称する。)とを含む。テープ1はロール状をなすことができる。シート71aとシート71bのあいだの距離、シート71bとシート71cのあいだの距離、……シート71lとシート71mのあいだの距離は一定である。
粘着剤層122の第1部分122Aは、エネルギー線により硬化する性質を有する。粘着剤層122の第2部分122Bもエネルギー線により硬化する性質を有する。変形例1では、ボンディング前チップ5を形成する工程の後に、粘着剤層122にエネルギー線を照射しボンディング前チップ5をピックアップする。エネルギー線を照射すると、ボンディング前チップ5のピックアップが容易である。
粘着剤層122の第1部分122Aはエネルギー線により硬化されている。粘着剤層122の第2部分122Bもエネルギー線により硬化されている。
図6に示すように、粘着剤層122の片面全体が半導体裏面保護フィルム11と接している。
変形例1〜変形例3などは、任意に組み合わせることができる。
アクリル酸エステル共重合体(ナガセケムテックス社製 SG−70L)の固形分―溶剤を除く固形分―100重量部に対して、エポキシ樹脂(三菱化学社製 jER YL980)20重量部と、エポキシ樹脂(東都化成社製 KI−3000)50重量部と、フェノール樹脂(明和化成社製 MEH7851−SS)75重量部と、球状シリカ(アドマテックス社製 SO−25R 平均粒径0.5μm)180重量部と、染料(オリエント化学工業社製 OIL BLACK BS)10重量部と、触媒(四国化成社製 2PHZ)20重量部とをメチルエチルケトンに溶解して、固形分濃度23.6重量%の樹脂組成物の溶液を調製した。樹脂組成物の溶液をはく離ライナー(三菱樹脂社 ダイヤホイルMRA50 (シリコーン離型処理した厚み50μmのポリエチレンテレフタレートフィルム))に塗布した。130℃で2分間乾燥させることにより、平均厚み20μmの半導体裏面保護フィルムを作製した。
ハンドローラーを用いてダイシングフィルム(日東電工社製 V−8−AR (平均厚み65μmの基材層と平均厚み10μmの粘着剤層とを有するダイシングフィルム))に半導体裏面保護フィルムをはりあわせることにより、実施例1のシートを得た。実施例1のシートは、ダイシングフィルムと、ダイシングフィルムの粘着剤層上に位置する半導体裏面保護フィルムとを有する。
アクリル酸エステル共重合体(ナガセケムテックス社製 SG−70L)の固形分―溶剤を除く固形分―100重量部に対して、エポキシ樹脂(三菱化学社製 jER YL980)140重量部と、エポキシ樹脂(東都化成社製 KI−3000)140重量部と、フェノール樹脂(明和化成社製 MEH7851−SS)290重量部と、球状シリカ(アドマテックス社製 SO−25R 平均粒径0.5μm)470重量部と、染料(オリエント化学工業社製 OIL BLACK BS)10重量部と、触媒(四国化成社製 2PHZ)20重量部とをメチルエチルケトンに溶解して、固形分濃度23.6重量%の樹脂組成物の溶液を調製した。樹脂組成物の溶液をはく離ライナー(三菱樹脂社 ダイヤホイルMRA50 (シリコーン離型処理した厚み50μmのポリエチレンテレフタレートフィルム))に塗布した。130℃で2分間乾燥させることにより、平均厚み20μmの半導体裏面保護フィルムを作製した。
ハンドローラーを用いてダイシングフィルム(日東電工社製 V−8−AR)に半導体裏面保護フィルムをはりあわせることにより、実施例2のシートを得た。実施例2のシートは、ダイシングフィルムと、ダイシングフィルムの粘着剤層上に位置する半導体裏面保護フィルムとを有する。
アクリル酸エステル共重合体(ナガセケムテックス社製 SG−70L)の固形分―溶剤を除く固形分―100重量部に対して、エポキシ樹脂(大日本インキ社製 HP―4700)10重量部と、フェノール樹脂(明和化成社製 MEH7851−H)10重量部と、球状シリカ(アドマテックス社製 SO−25R 平均粒径0.5μm)70重量部と、染料(オリエント化学工業社製 OIL BLACK BS)10重量部と、触媒(四国化成社製 2PHZ)10重量部とをメチルエチルケトンに溶解して、固形分濃度23.6重量%の樹脂組成物の溶液を調製した。樹脂組成物の溶液をはく離ライナー(三菱樹脂社 ダイヤホイルMRA50 (シリコーン離型処理した厚み50μmのポリエチレンテレフタレートフィルム))に塗布した。130℃で2分間乾燥させることにより、平均厚み20μmの半導体裏面保護フィルムを作製した。
ハンドローラーを用いてダイシングフィルム(日東電工社製 V−8−AR)に半導体裏面保護フィルムをはりあわせることにより、比較例1のシートを得た。比較例1のシートは、ダイシングフィルムと、ダイシングフィルムの粘着剤層上に位置する半導体裏面保護フィルムとを有する。
東京化工社製のベアウエハを厚み0.7mmになるように研削した。研削ホイールは、Z1としてGF01−SD320−BT100−50、Z2としてBGT−270 IF−01−9−4/6−B−K09を用いた。表面ドライポリッシュのためにホイールDPW-018 DP-F05 450x11Tx60を用いた。研削後、ダイシングし、3mm×3mm×厚み0.7mmのシリコンチップAと、9.5mm×9.5mm×厚み0.7mmのシリコンチップBを得た。
70℃のシリコンチップA(3mm×3mm×厚み0.7mm)に裏面保護フィルムをはりあわせ、裏面保護フィルムのはみ出しを切断し除いた。これにより、切断後裏面保護フィルムと、切断後裏面保護フィルムの第1面に接するシリコンチップAとから構成された構造を得た。切断後裏面保護フィルムの第2面に70℃のシリコンチップB(9.5mm×9.5mm×厚み0.7mm)をつけ、120℃2時間加熱した。これにより、シリコンチップAと、シリコンチップBと、シリコンチップAおよびシリコンチップBの間に位置する硬化後裏面保護フィルムとから構成された物体を得た。Dage社製シリーズ4000を用い、せん断速度500μm/sec、25℃で、シリコンチップAの側面に荷重をかけ、シリコンチップAと硬化後裏面保護フィルムとのせん断はく離に要した荷重を測定した。結果を表1に示す。
Dage社製シリーズ4000のステージ温度を100℃に設定し、ステージで物体―シリコンチップAと、シリコンチップBと、シリコンチップAおよびシリコンチップBの間に位置する硬化後裏面保護フィルムとから構成された物体―を1分間加熱したということ以外は、25℃せん断接着力と同じ方法で100℃せん断接着力を測定した。結果を表1に示す。
シートの半導体裏面保護フィルムにウエハ(裏面研磨処理された、直径8インチ厚み0.2mmのシリコンミラーウエハ)をロールで70℃で圧着した。シートに固定されたウエハをダイシングすることにより、ボンディング前チップを形成した。ボンディング前チップは、シリコンチップと、シリコンチップに固定されたダイシング後半導体裏面保護フィルムとを有する。図7に示すように、切込深さZ1―シリコンチップ表面からの深さ―が45μmとなるように調整した。切込深さZ2がダイシングテープの粘着剤層厚みの1/2までとなるように、切込深さZ2を調整した。
ダイシング条件
ダイシング装置:商品名「DFD−6361」ディスコ社製
ダイシングリング:「2−8−1」(ディスコ社製)
ダイシング速度:30mm/sec
ダイシングブレード:
Z1;ディスコ社製「203O−SE 27HCDD」
Z2;ディスコ社製「203O−SE 27HCBB」
ダイシングブレード回転数:
Z1;40,000r/min
Z2;45,000r/min
カット方式:ステップカット
チップサイズ:2.0mm角
11 半導体裏面保護フィルム
12 ダイシングフィルム
121 基材層
122 粘着剤層
122A 第1部分
122B 第2部分
13 はく離ライナー
71 シート
5 ボンディング前チップ
6 被着体
8 吸着台
41 半導体チップ
51 バンプ
61 導電材
111 ダイシング後半導体裏面保護フィルム
Claims (4)
- 基材層および前記基材層上に位置する粘着剤層を含むダイシングフィルムと、
前記粘着剤層上に位置する半導体裏面保護フィルムとを含み、
前記半導体裏面保護フィルムは、1.7kgf/mm2以上のシリコンチップに対する25℃せん断接着力を有する、
シート。 - 前記半導体裏面保護フィルムが、熱可塑性樹脂および熱硬化性樹脂を含み、
前記熱可塑性樹脂の前記熱硬化性樹脂に対する比の値が1以下である、請求項1に記載のシート。 - はく離ライナーと、
前記はく離ライナー上に位置する、請求項1または2に記載のシートと
を含む、テープ。 - 請求項1または2に記載のシートの前記半導体裏面保護フィルムと半導体ウエハとをはりあわせる工程と、
前記半導体裏面保護フィルムを硬化させる工程と、
硬化後の前記半導体裏面保護フィルム上に位置する前記半導体ウエハをダイシングする工程と
を含む半導体装置の製造方法。
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JP2016094499A JP6579996B2 (ja) | 2016-05-10 | 2016-05-10 | シート、テープおよび半導体装置の製造方法 |
KR1020170056753A KR102444114B1 (ko) | 2016-05-10 | 2017-05-04 | 시트, 테이프, 및 반도체 장치의 제조 방법 |
TW106114994A TWI713739B (zh) | 2016-05-10 | 2017-05-05 | 薄片、膠帶及半導體裝置的製造方法 |
US15/588,996 US20170330785A1 (en) | 2016-05-10 | 2017-05-08 | Sheet, tape, and method for manufacturing semiconductor device |
CN201710325250.6A CN107393857B (zh) | 2016-05-10 | 2017-05-10 | 片材、胶带及半导体装置的制造方法 |
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DE102020110896A1 (de) | 2020-04-22 | 2021-10-28 | Infineon Technologies Ag | Elektronische Komponente mit einem Halbleiterchip, der einen niederohmigen Teil mit einem aktiven Bereich und einen hochohmigen Teil auf einer dielektrischen Schicht aufweist |
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JP2003347358A (ja) * | 2002-05-28 | 2003-12-05 | Sumitomo Bakelite Co Ltd | 半導体用接着フィルム、半導体装置、及び半導体装置の製造方法 |
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JP5157255B2 (ja) * | 2006-09-05 | 2013-03-06 | 日立化成株式会社 | 感光性接着剤組成物、及びそれを用いた接着フィルム、接着シート、接着剤パターン、並びに半導体装置 |
KR101485612B1 (ko) * | 2008-04-25 | 2015-01-22 | 신에쓰 가가꾸 고교 가부시끼가이샤 | 반도체 웨이퍼용 보호 필름 |
JP4927187B2 (ja) * | 2010-02-19 | 2012-05-09 | 日東電工株式会社 | ダイシング・ダイボンドフィルム |
KR20130143015A (ko) * | 2010-08-20 | 2013-12-30 | 쓰리엠 이노베이티브 프로퍼티즈 컴파니 | 저온 경화성 에폭시 테이프 및 그의 제조 방법 |
JP2012079936A (ja) * | 2010-10-01 | 2012-04-19 | Nitto Denko Corp | ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法 |
JP6144868B2 (ja) * | 2010-11-18 | 2017-06-07 | 日東電工株式会社 | フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、及び、フリップチップ型半導体裏面用フィルムの製造方法 |
JP5828706B2 (ja) * | 2011-08-03 | 2015-12-09 | 日東電工株式会社 | ダイシング・ダイボンドフィルム |
WO2014092200A1 (ja) | 2012-12-14 | 2014-06-19 | リンテック株式会社 | 保護膜形成用フィルム |
JP6405556B2 (ja) * | 2013-07-31 | 2018-10-17 | リンテック株式会社 | 保護膜形成フィルム、保護膜形成用シートおよび検査方法 |
JP6272729B2 (ja) * | 2014-05-16 | 2018-01-31 | 日東電工株式会社 | ダイシングテープ一体型半導体裏面用フィルム、及び、半導体装置の製造方法 |
JP2015222896A (ja) | 2014-05-23 | 2015-12-10 | 大日本印刷株式会社 | 色調整装置及び色調整方法 |
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2017
- 2017-05-04 KR KR1020170056753A patent/KR102444114B1/ko active IP Right Grant
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- 2017-05-08 US US15/588,996 patent/US20170330785A1/en not_active Abandoned
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JP2017204526A (ja) | 2017-11-16 |
CN107393857A (zh) | 2017-11-24 |
KR20170126796A (ko) | 2017-11-20 |
TWI713739B (zh) | 2020-12-21 |
TW201806013A (zh) | 2018-02-16 |
KR102444114B1 (ko) | 2022-09-19 |
US20170330785A1 (en) | 2017-11-16 |
CN107393857B (zh) | 2023-05-09 |
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