JP6554303B2 - Method of manufacturing multilayer wiring board - Google Patents

Description

  The present invention relates to a method for manufacturing a multilayer wiring board and a multilayer wiring board.

  With the trend toward high performance and miniaturization of electronic devices in recent years, high density and high functionality of circuit components are further required. From this point of view, even modules with circuit components are required to support high density and high functionality. At present, in order to meet such a demand, a multilayer wiring board in which the wiring board is multilayered is actively made.

  In such a multilayer wiring board, a method of laminating a wiring layer by a buildup method on a core substrate having a through hole penetrating the entire laminate (see Patent Documents 1 and 2), a circuit board and an insulating material There is a method in which a necessary number of layers are stacked and a through hole is formed in the entire laminated body and then through hole plating is performed (see Patent Document 3).

  However, according to the methods described in Patent Document 1 and Patent Document 2, since it is necessary to increase the number of build-up steps as the number of layers increases, a deviation occurs in the laminated state of the wiring layers, which reduces the yield. There was a problem that the cost would increase. Further, since the lead time becomes longer, the manufacturing cost is further increased.

  Further, in the method described in Patent Document 3, since the aspect ratio of the through hole is increased, drill breakage occurs when a hole is drilled, and further, the difficulty of through-hole plating is high, resulting in a decrease in yield. It has arisen, and the problem that manufacturing cost increases has arisen. Furthermore, in the method described in Patent Document 2, since the plating process is performed on the through holes with a high aspect ratio, the variation of the plating thickness in the through holes becomes large, and the plating layer is caused by the heat generated during use. There is a problem that cracks and the like are generated in the substrate and reliability is lowered.

  On the other hand, in the multilayer wiring board of the all-stack laser via, peeling occurs between the insulating material and the via due to the heat generated during use due to the difference in linear expansion coefficient between the insulating material and copper used for the via. As a result, there has also been a problem that reliability can not be ensured because the electrical connectivity of vias can not be sufficiently secured.

JP, 2006-332115, A JP 2013-74153 A JP, 2010-275603, A

  An object of the present invention is, for example, to reduce the lead time, reduce the manufacturing cost, and further improve the reliability in a multilayer wiring board having 10 or more wiring layers.

In order to achieve the above object, the present invention is
A first wiring board unit and a second wiring board unit in which at least a pair of wiring layers are formed via an insulating member and the at least a pair of wiring layers are electrically connected by metal vias are prepared. 1 process,
A second step of applying a conductive paste on the wiring layer of the first wiring board unit to form a bump made of the conductive paste;
A third step of forming an insulating resin layer on the first wiring board unit such that the upper end portion of the bump penetrates;
On the first wiring board unit, the second wiring board unit is pressed under heating through the insulating resin layer, and the upper end of the bump is pressed against the wiring layer of the second wiring board. A fourth step of curing the insulating resin layer and the bump, and electrically connecting the first wiring board unit and the second wiring board unit via the bump;
The present invention relates to a method of manufacturing a multilayer wiring board, comprising:

  According to the present invention, first, at least a pair of wiring layers are formed through an insulating member, and the first wiring board (the first wiring board) is formed by electrically connecting the at least one pair of wiring layers with metal vias. In the present specification, in order to identify it as a final multilayer wiring board, in order to identify it as a final multilayer wiring board (also referred to as a “first wiring board unit”) and a second wiring board (also in the present specification) , “Second wiring board unit”).

  From the viewpoint of reducing the lead time, the first wiring board unit and the second wiring board unit are formed simultaneously through the same process, for example, or after manufacturing a large wiring board, The wiring board is cut into a first wiring board unit and a second wiring board unit.

  Next, a conductive paste is applied on the wiring of the first wiring board unit to form a bump made of the conductive paste, and after drying as appropriate, the insulating resin layer is formed so that the upper end portion of the bump penetrates. Then, the second wiring board unit is laminated on the first wiring board unit via the insulating resin layer, and the first wiring board unit (wiring layer thereof) and the second wiring are pressed by the bumps pressed at that time. The wiring board units (wiring layers thereof) are electrically joined to manufacture a multilayer wiring board.

  As described above, according to the present invention, the first wiring board unit and the second wiring board unit on which a plurality of wiring layers are formed in advance are prepared, and these first wiring board unit and the second wiring board unit are prepared. A multilayer wiring board is obtained simply by stacking layers. Therefore, the number of build-up processes of the first wiring board unit or the second wiring board unit can be reduced at least as compared with the case where the multilayer wiring board is manufactured by forming the wiring layer by the build-up method. Since the stacking state of the layers is deviated, it is possible to avoid the problem of yield reduction and the accompanying increase in manufacturing cost. Further, the lead time can be shortened, and the manufacturing cost can be further reduced.

  In addition, since it is not necessary to form a through hole with a high aspect ratio, it is possible to prevent the breakage of the drill at the time of forming the through hole. Furthermore, since through-hole plating can be performed relatively easily, a decrease in yield can be suppressed and an increase in manufacturing cost can also be suppressed. In addition, it is possible to suppress the variation of the plating thickness as in the case of performing the plating process on a high aspect ratio through hole, and the plating layer is cracked due to the heat generated during use, resulting in a decrease in reliability. The problem of ending up can also be avoided.

  In addition, due to the difference in coefficient of linear expansion between the insulating material and copper used for the via, as in the multilayer wiring board for all-stack laser vias, peeling occurs between the insulating material and the via due to heat generated during use. It is possible to avoid the problem that the electrical connectivity of the vias cannot be sufficiently secured and the reliability is lowered.

  In the present invention, the “upper end portion of the bump” refers to a part of the bump area to be coupled to the second wiring board unit, that is, the wiring layer.

  In one example of the present invention, in the first step, at least a pair of wiring layers are formed on both main surfaces of the support plate via a release film and an insulating member, and the at least a pair of wiring layers are metal. Forming a first buildup layer and a second buildup layer electrically connected by vias, and peeling the first buildup layer and the second buildup layer from the support plate The first wiring board unit can be composed of a first buildup layer, and the second wiring board unit can be composed of a second buildup layer.

  In this case, at least a pair of wiring layers are formed on the both main surfaces of the support plate via the release film via the insulating member on both main surfaces of the support board, in the first wiring board unit and the second wiring board unit described above A first buildup layer and a second buildup layer in which at least a pair of wiring layers are electrically connected by metal vias are formed, and then a first build is formed from a support plate via a release film. The up layer and the second buildup layer are peeled off. Then, the first wiring board unit and the second wiring board unit are constituted by the first buildup layer and the second buildup layer.

  Therefore, since the first wiring board unit and the second wiring board unit can be prepared by a simple method, the above-described effects of the present invention can be achieved more reliably.

  In one example of the present invention, in the second step, a conductive paste is applied on a first metal foil to be a wiring layer of a first wiring board unit to form a bump made of the conductive paste. A process can be included.

  Furthermore, in the example of the present invention, in the third step, the insulating resin layer containing no fibrous filler and the resin adhesive film are pressed at a first temperature against the first metal foil to form the insulating resin layer. The method may include the steps of fluidizing, peeling the resin adhesive film, removing the insulating resin layer remaining on the upper end of the bump, and exposing the upper end from the resin insulating layer.

  Further, in the example of the present invention, the fourth step includes, with respect to the first metal foil, a second metal foil to be a wiring layer of the second wiring board unit via an insulating resin layer. Pressing at a second temperature higher than the temperature of 1 to cure the insulating resin layer and the bump, and laminating a second metal foil (second wiring board unit) on the insulating resin layer. be able to.

  In these cases, after the bumps made of the conductive paste are formed on the first metal foil, the insulating resin layer and the resin adhesive film containing no fibrous filler are made to the first metal foil at the first temperature. I'm trying to press. At this time, since the viscosity of the insulating resin layer is lowered as the temperature rises and becomes fluidized, the insulating resin layer remaining on the upper end portion of the bump is eliminated at the time of pressing, and the insulating upper end portion is insulated Only a thin skin consisting of a part of the resin layer remains.

  At this time, the resin adhesive film is in close contact with the thin skin of the resin insulation layer remaining on the upper end portion of the bump. Since the thin skin of the insulating resin layer is mostly made of resin, the homogeneous material of which most or all is made of resin is more than the adhesion to the bumps of the dissimilar material which is mostly made of metal. The adhesion strength to the resin adhesion film is greater.

  Therefore, when the resin adhesive film is to be peeled from the insulating resin layer, the thin skin of the resin insulating layer is brought into close contact with the resin adhesive film and peeled together. As a result, the thin skin of the resin insulating layer remaining on the upper end of the bump is peeled off, and the upper end of the bump is exposed.

  Therefore, when the second metal foil is pressed against the first metal foil again at a second temperature higher than the first temperature later to perform the lamination press, the second metal foil is an insulating resin layer. The first metal foil and the second metal foil, which will later become the wiring layer, become securely coupled with the upper end of the cured bump (via) exposed from Will be connected to As a result, the electrical connection between the wiring layers can be sufficiently retained by the interlayer connector (via), and a multilayer wiring board having excellent reliability can be provided.

  In one example of the present invention, the shape of the bump can be a conical shape. In this case, since the upper end portion of the bump has an acute angle, when laminating the insulating resin layer on the first wiring board unit, the insulating resin layer can be easily penetrated.

By passing through the steps of the manufacturing method as described above, the present invention
A first wiring layer that includes at least a pair of wiring layers facing each other, an insulating member interposed between the pair of wiring layers, and a metal interlayer connection member that penetrates the insulating member and electrically connects the pair of wiring layers. Wiring board unit,
A second interconnecting layer including at least a pair of wiring layers facing each other, an insulating member interposed between the pair of wiring layers, and a metal interlayer connector that penetrates the insulating member and electrically connects the pair of wiring layers Wiring board unit,
An insulating member interposed between the first wiring board unit and the second wiring board unit, and a wiring layer of the first wiring board unit and the second wiring board unit penetrating the insulating member An interlayer connector made of a conductive composition electrically connecting the wiring layers of
A multilayer wiring board can be obtained, characterized in that

  In the multilayer wiring board of the present invention, an interlayer connector (via) made of a conductive paste (conductive composition) excellent in elasticity is formed between the first wiring board unit and the second wiring board unit. Therefore, the tensile stress and the like in the vertical direction in the multilayer wiring board can be relaxed. Therefore, a multilayer wiring board having high strength and excellent reliability can be obtained.

  As described above, according to the present invention, in a multilayer wiring board having, for example, ten or more wiring layers, the lead time can be shortened, the manufacturing cost can be reduced, and the reliability can be further improved.

It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 1st Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 1st Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 1st Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 1st Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 2nd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 2nd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 2nd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 2nd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 3rd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 3rd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 3rd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 3rd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 3rd Embodiment. It is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of 3rd Embodiment.

  Hereinafter, specific features of the present invention will be described based on embodiments for carrying out the invention.

First Embodiment
1 to 4 are cross-sectional views for explaining the method of manufacturing a multilayer wiring board according to the present embodiment.

  First, as shown in FIG. 1, the first wiring board unit 10 and the second wiring board unit 20 are prepared (first step). In the present embodiment, both the first wiring board unit 10 and the second wiring board unit 20 have the core substrate 11 and the buildup layers 12 and 13 stacked on both sides of the core substrate 11. There is.

  In the core substrate 11, the first wiring layer 121 and the second wiring layer 122 are provided on both main surfaces of the insulating member 111, and the third wiring layer 123 and the fourth wiring layer are formed in the insulating member 111. A configuration in which the wiring layer 124 is formed is adopted. These wiring layers are arranged in parallel with each other and facing each other. In addition, the first wiring layer 121 and the second wiring layer 122 formed on both main surfaces of the core substrate 11 are electrically connected by the through hole via 113 formed so as to penetrate the insulating member 111. ing.

  The buildup layer 12 formed on one main surface of the core substrate 11 includes an insulating member 121 and a wiring layer 122 that are sequentially stacked on the first wiring layer 121 of the core substrate 11. The first wiring layer 121 of the core substrate 11 and the wiring layer 122 of the buildup layer 12 are electrically connected by an interlayer connector (via) 123 made of metal such as copper, for example.

  The buildup layer 13 formed on the other main surface of the core substrate 11 includes an insulating member 131 and a wiring layer 132 that are sequentially stacked on the second wiring layer 122 of the core substrate 11. The second wiring layer 122 of the core substrate 11 and the wiring layer 132 of the buildup layer 13 are electrically connected by an interlayer connector (via) 133 made of metal such as copper, for example.

  In addition, since the first wiring board unit 10 and the second wiring board unit 20 as shown in FIG. 1 have the same configuration, they can be manufactured in the same process as each other, and large-sized wiring After the substrate is manufactured, the wiring substrate can also be cut as appropriate.

  The fact that the first wiring board unit 10 and the second wiring board unit 20 can be manufactured in the same process by having such an identical configuration is, as described below, various in the present embodiment. You can enjoy the effects.

  However, as long as the first wiring board unit 10 and the second wiring board unit 20 can be manufactured in the same process, these forms are not limited to those as shown in FIG. can do.

  The insulating member 111 in the core substrate 11 and the insulating members 121 and 131 in the build-up layers 12 and 13 are, for example, epoxy resin, bismaleimide triazine resin, polyimide resin, phenol resin, polyester resin, melamine resin, or butadiene rubber, respectively. It can be composed of sheets of thermosetting resin such as raw rubber such as butyl rubber, natural rubber, neoprene rubber and silicone rubber. These synthetic resins may be used alone, but may contain fillers of insulating inorganic substances or organic substances. Further, it may be combined with a reinforcing material such as glass cloth or mat, organic synthetic fiber cloth or mat, or paper.

  In addition, the first wiring layer 121 and the like in the core substrate 11, the wiring layers 122 and 132 in the buildup layers 12 and 13, the interlayer connectors (vias) 123 and 133, and the through hole vias 113 are electrically It can be composed of a good conductor such as gold, silver, copper, aluminum or the like.

  Next, as shown in FIG. 2, a conductive paste is applied onto the second wiring layer 122 of the first wiring board unit 10 by any method such as screen printing, dispensing or inkjet, and the conductive paste is applied. Bumps 15X made of conductive paste are formed (second step).

  The bump 15X, that is, the conductive paste includes, for example, conductive powder such as silver, gold, copper, and solder powder, alloy powder or composite (mixed) metal powder, and polycarbonate resin, polysulfone resin, polyester resin, phenoxy resin, It is composed of a conductive composition prepared by mixing a binder component such as a phenol resin or a polyimide resin. The bump 15X can also contain tin, bismuth, or the like as a sintering aid.

  Next, after the bump 15X is dried and cured, as shown in FIG. 3, the upper end of the bump 15X penetrates the first wiring board unit 10 using a device (not shown) such as a roll laminator or a vacuum laminator. Thus, the insulating resin layer 16X is formed (third step).

  This insulating resin layer 16X is made of, for example, epoxy resin, bismaleimide triazine resin, polyimide resin, phenol resin, polyester resin, melamine resin, or butadiene rubber, butyl rubber, natural rubber, like the insulating member 111 in the core substrate 11 described above. It can be composed of sheets of thermosetting resin such as raw rubber such as neoprene rubber and silicone rubber. These synthetic resins may be used alone, but may contain fillers of insulating inorganic substances or organic substances. Further, it may be combined with a reinforcing material such as glass cloth or mat, organic synthetic fiber cloth or mat, or paper.

Further, when forming the insulating resin layer 16X, the melt viscosity is set to, for example, 1 × 10 ¹ Pa · s or more and 1 × 10 ⁵ Pa · s or less. In addition, the said melt viscosity is a value calculated | required from the minimum melt viscosity by performing a rheometer measurement by TA instrument company make (model number ARES-G2) using the test piece of 300 mm-500 mm □ and thickness 300 micrometers.

  Then, as shown in FIG. 4, the second wiring board unit 20 is heated and pressed on the first wiring board unit 10 via the insulating resin layer 16X, and the upper end portion of the bump 15X is the second wiring board The insulating resin layer 16X and the bumps 15X are cured while being in pressure contact with the wiring layer 122 of the first buildup layer 12 of the unit 20, and the first wiring board unit 10 and the second wiring board unit 20 are bump 15X. The second wiring board unit 20 is stacked on the first wiring board unit 10 via the insulating resin layer 16X (insulating member 16) while being electrically connected via the (interlayer connection body (via) 15). A multilayer wiring board 30 is obtained.

  Thus, according to the present embodiment, the core substrate 11 on which the plurality of wiring layers 121, 122, 123, 124 are formed in advance, and the first buildup layer 12 formed on both main surfaces of the core substrate 11 And 13, and preparing the first wiring board unit 10 and the second wiring board unit 20 of the same aspect, and laminating the first wiring board unit 10 and the second wiring board unit 20 only in multiple layers. The wiring board 30 is obtained.

  The first wiring board unit 10 and the second wiring board unit 20 have the same wiring rules and can be manufactured in the same process. Therefore, the number of build-up steps of at least the first wiring board unit 10 or the second wiring board unit 20 can be reduced as compared with the case where the multilayer wiring board is manufactured by forming the wiring layer by the build-up method. Thus, it is possible to avoid the problem of yield reduction due to the occurrence of misalignment in the stacked state of the wiring layers, and the increase in manufacturing cost associated therewith. Further, the lead time can be shortened, and the manufacturing cost can be further reduced.

  In addition, since it is not necessary to form a through hole with a high aspect ratio, it is possible to prevent the breakage of the drill at the time of forming the through hole. Furthermore, since through-hole plating can be performed relatively easily, a decrease in yield can be suppressed and an increase in manufacturing cost can also be suppressed. In addition, it is possible to suppress the variation of the plating thickness as in the case of performing the plating process on a high aspect ratio through hole, and the plating layer is cracked due to the heat generated during use, resulting in a decrease in reliability. The problem of ending up can also be avoided.

  In addition, due to the difference in coefficient of linear expansion between the insulating material and copper used for the via as in the multilayer wiring board of all-stack laser vias, peeling occurs between the insulating material and the via due to heat generated during use, etc. Therefore, it is possible to avoid the problem that the reliability is lowered because the electrical connectivity of the vias can not be sufficiently secured.

  In addition, according to the multilayer wiring board 30 of the present embodiment, an interlayer connector made of a conductive paste (conductive composition) excellent in elasticity between the first wiring board unit 10 and the second wiring board unit 20 ( Since the vias 15 are formed, tensile stress or the like in the longitudinal direction of the multilayer wiring board 30 can be relaxed. Therefore, the multilayer wiring board 30 having high strength and excellent reliability can be obtained.

  In the above-described embodiment, only the first wiring board unit 10 and the second wiring board unit 20 having the same form are prepared, and the multilayer wiring board 30 is manufactured by laminating them through the insulating resin layer 16X. It is like that. However, if three or more wiring board units of the same form are manufactured and prepared, and these wiring board units are stacked on one another via the insulating resin layer 16X as described above, the above-described effects can be obtained. A method of manufacturing a multilayer wiring board having a larger number of layers can be provided, and a multilayer wiring board having the above-described effects can also be obtained.

  Further, for example, the first wiring board unit 10 and the second wiring board unit 20 having different forms may be separately prepared, and the multilayer wiring board 30 may be manufactured by laminating these through the insulating resin layer 16X. it can.

Second Embodiment
5-8 is sectional drawing for demonstrating the manufacturing method of the multilayer wiring board of this embodiment. In addition, about the component similar to the component shown in FIGS. 1-4 of 1st Embodiment, or the same, it represents using the same or same code | symbol.

  First, as shown in FIG. 5, the first buildup layer 13 and the second buildup layer 14 are formed on both main surfaces of the support plate 11 via the release film 42.

  The support plate 11 can be a metal substrate. By using a metal substrate, it is possible to maintain good handling properties in the manufacturing process. In addition, when the substrate is partially removed and these remaining portions are to function as a support frame, the strength of the build-up layer can be sufficiently reinforced, and the function as a support frame is sufficient. Can do it. For example, Cu, Cu alloy, SUS (JIS standard), Fe—Ni alloy, Al, Al alloy, Invar, Invar alloy, or the like can be used.

  The release film 42 is, for example, a sheet-like film in which a cushion material made of a thermoplastic resin is sandwiched between a pair of films, and the periphery thereof is sealed with the film. As the cushioning material, a thermoplastic resin (trade name: Pacotan Plus) having flexibility (weak elasticity) is used. Instead of using such a cushion material, a PET film, a fluororesin (registered trademark: Teflon) film, or the like may be used.

  The first buildup layer 13 is a first wiring layer 131, a first insulating layer 135, a second wiring layer 132, and a second insulating layer 136 in order from the main surface of the support plate 11 outward. And the third wiring layer 133 are stacked, and the first wiring layer 131 and the second wiring layer 132 are electrically connected by the first interlayer connector 137, and the second wiring layer 132 is formed. The third wiring layer 133 is electrically connected by a second interlayer connector 138.

  The second buildup layer 14 is a first wiring layer 141, a first insulating layer 145, a second wiring layer 142, and a second insulating layer 146 in order from the main surface of the support plate 11 outward. And the third wiring layer 143 are stacked, and the first wiring layer 141 and the second wiring layer 142 are electrically connected by the first interlayer connector 147, and the second wiring layer 142 is formed. The third wiring layer 143 is electrically connected by a second interlayer connector 148.

  Note that the first buildup layer 13 and the second buildup layer 14 as shown in FIG. 5 have similar wiring rules, and thus can be manufactured in the same process as each other, but different processes Can also be manufactured by

  However, the fact that the first build-up layer 13 and the second build-up layer 14 can be manufactured in the same process by having the same configuration as described above is as follows. Various effects can be enjoyed.

  The first wiring layers 131 and 141 etc. and the interlayer connectors 137 and 147 etc. in the buildup layers 13 and 14 can be made of an electrically good conductor such as gold, silver, copper, aluminum or the like.

  The first insulating members 135 and 145 in the build-up layers 13 and 14 are, for example, epoxy resin, bismaleimide triazine resin, polyimide resin, phenol resin, polyester resin, melamine resin, or butadiene rubber, butyl rubber, natural rubber, neoprene rubber, It can be composed of sheets of thermosetting resin such as raw rubber such as silicone rubber. These synthetic resins may be used alone, but may contain fillers of insulating inorganic substances or organic substances. Further, it may be combined with a reinforcing material such as glass cloth or mat, organic synthetic fiber cloth or mat, or paper.

  Next, as shown in FIG. 6, after the first buildup layer 13 and the second buildup layer 14 are peeled from the support plate 11 through the release film 42 (first step), the second build A conductive paste is applied onto the third wiring layer 143 of the up layer 14 by any method such as screen printing, dispensing, or inkjet method, for example, to form bumps 15 X made of the conductive paste (second Process).

  The bump 15X, that is, the conductive paste includes, for example, conductive powder such as silver, gold, copper, and solder powder, alloy powder or composite (mixed) metal powder, and polycarbonate resin, polysulfone resin, polyester resin, phenoxy resin, It is composed of a conductive composition prepared by mixing a binder component such as a phenol resin or a polyimide resin. The bump 15X can also contain tin, bismuth, or the like as a sintering aid.

  Next, as shown in FIG. 7, after the bump 15X is dried and cured, the upper end portion of the bump 15X penetrates the second buildup layer 14 using an apparatus (not shown) such as a roll laminator or a vacuum laminator. Thus, the insulating resin layer 16X is formed (third step).

  This insulating resin layer 16X is, for example, an epoxy resin, a bismaleimide triazine resin, a polyimide resin, a phenol resin, a polyester resin, a melamine resin, like the first insulating members 135 and 145 in the buildup layers 13 and 14 described above. Alternatively, it can be composed of sheets of thermosetting resin such as raw rubber such as butadiene rubber, butyl rubber, natural rubber, neoprene rubber, and silicone rubber. These synthetic resins may be used alone, but may contain fillers of insulating inorganic substances or organic substances. Further, it may be combined with a reinforcing material such as glass cloth or mat, organic synthetic fiber cloth or mat, or paper.

Further, when forming the insulating resin layer 16X, the melt viscosity is set to, for example, 1 × 10 ¹ Pa · s or more and 1 × 10 ⁵ Pa · s or less. In addition, the said melt viscosity is a value calculated | required from the minimum melt viscosity by performing a rheometer measurement by TA instrument company make (model number ARES-G2) using the test piece of 300 mm-500 mm □ and thickness 300 micrometers.

  Next, as shown in FIG. 8, the first buildup layer 13 is heated and pressed on the second buildup layer 14 via the insulating resin layer 16X, and the upper end of the bump 15X is subjected to the first buildup The first buildup layer 13 and the second buildup layer 14 are bumps 15X (interlayer connection body (interlayer connection body (interlayer connection body (interlayer connection body)) by pressing the third wiring layer 133 of the layer 13 and pressing the insulating resin layer 16X and the bumps 15X. Multilayer wiring in which the first buildup layer 14 is laminated on the second buildup layer 14 via the insulating resin layer 16X (insulation member 16) while being electrically connected via the vias 15) A substrate 30 is obtained (fourth step).

  Thus, according to the present embodiment, the first buildup layer 13 having the plurality of wiring layers 131 to 133 in advance using the support plate 11 and the second build having the plurality of wiring layers 141 to 143 By preparing the up layer 14 and laminating the first buildup layer 13 and the second buildup layer 14, the multilayer wiring board 30 is obtained.

  Therefore, the number of build-up steps of at least the first build-up layer 13 or the second build-up layer 14 can be reduced compared to the case of forming a wiring layer by the build-up method to manufacture a multilayer wiring board. Thus, it is possible to avoid the problem of yield reduction due to the occurrence of misalignment in the stacked state of the wiring layers, and the increase in manufacturing cost associated therewith. Further, the lead time can be shortened, and the manufacturing cost can be further reduced.

  In addition, since it is not necessary to form a through hole with a high aspect ratio, it is possible to prevent the breakage of the drill at the time of forming the through hole. Furthermore, since through-hole plating can be performed relatively easily, a decrease in yield can be suppressed and an increase in manufacturing cost can also be suppressed. In addition, it is possible to suppress the variation of the plating thickness as in the case of performing the plating process on a high aspect ratio through hole, and the plating layer is cracked due to the heat generated during use, resulting in a decrease in reliability. The problem of ending up can also be avoided.

  In addition, due to the difference in coefficient of linear expansion between the insulating material and copper used for the via as in the multilayer wiring board of all-stack laser vias, peeling occurs between the insulating material and the via due to heat generated during use, etc. Thus, it is possible to avoid the problem that the electrical connectivity of the via cannot be sufficiently secured and the reliability is lowered.

  Furthermore, by making the first buildup layer 13 and the second buildup layer 14 adopt similar wiring rules, the first buildup layer 13 and the second buildup layer 13 and the second buildup layer 14 can have the same lead time on the support plate. Build-up layer 14 can be formed. Therefore, the lead time for manufacturing the entire multilayer wiring board 30 can also be reduced.

  In addition, according to the multilayer wiring board 30 of the present embodiment, an interlayer connector made of a conductive paste (conductive composition) excellent in elasticity between the first buildup layer 13 and the second buildup layer 14 ( Since the vias 15 are formed, tensile stress or the like in the longitudinal direction of the multilayer wiring board 30 can be relaxed. Therefore, the multilayer wiring board 30 having high strength and excellent reliability can be obtained.

  Furthermore, in the present embodiment, the first wiring board unit and the second wiring board unit are respectively outward from the main surface of the support plate 11 via the release films 42 on both main surfaces of the support plate 11. First buildup layer in which the first wiring layer 131, the first insulating layer 135, the second wiring layer 132, the second insulating layer 136, and the third wiring layer 133 are sequentially stacked. 13, the first wiring layer 141, the first insulating layer 145, the second wiring layer 142, the second insulating layer 146, and the third wiring layer in order from the main surface of the support plate 11 to the outside. The wiring layer 143 includes a second buildup layer 14 that is laminated. Therefore, since the first wiring board unit and the second wiring board unit can be prepared by a simple method, the above-described effects of the present invention can be achieved more reliably.

  In the above embodiment, a single support plate is used, and the single first buildup layer 13 and the single second buildup layer 14 are formed on both main surfaces, respectively. If a first buildup layer 13 and a second buildup layer 14 are formed on both main surfaces using a support plate, a multilayer wiring board having a larger number of layers having the above-described effects can be obtained. A manufacturing method can be provided, and a multilayer wiring board having the above-described effects can also be obtained.

Third Embodiment
9 to 14 are cross-sectional views for explaining the method of manufacturing the multilayer wiring board according to the present embodiment. In order to clarify the features of the present embodiment, an area near one bump is enlarged and shown. ing. In the present embodiment, specific examples from the second step to the fourth step in the first embodiment will be described.

  First, as shown in FIG. 9, on the first metal foil 132X to be the wiring layer 132 in the buildup layer 13 of the first wiring board unit 10, any method such as screen printing, dispensing, or inkjet method is used. The conductive paste is applied by the method described above to form bumps 15X made of the conductive paste.

  The first metal foil 132X is made of an electrically good conductor such as copper (Cu), gold (Au), silver (Ag), or aluminum (Al) because the wiring layer of the multilayer wiring board will be formed later. The thickness t1 of the first metal 132X is, for example, 1.5 μm to 40 μm.

  The conductive paste constituting the bumps 15X is, for example, conductive powder such as silver, gold, copper and Ag solder powder, alloy powder of these or composite (mixed) metal powder and, for example, epoxy resin, phenol resin, polyimide resin And a conductive composition prepared by mixing a binder component such as a polysulfone resin, a polyester resin, or a polycarbonate resin.

  The conductive paste constituting the bumps 15X includes at least conductive powders such as Sn, Bi, Cu, and Ag, alloy powders thereof or composite (mixed) metal powders, and epoxy resins, phenol resins, polyimide resins, polysulfones, for example. It can be comprised from the conductive composition etc. which were prepared by mixing binder components, such as resin, polyester resin, and polycarbonate resin.

  In this case, as described below, after forming a bump made of a conductive paste and drying it appropriately, an insulating resin layer not containing a fibrous filler is disposed and heated on the first metal foil, After the upper end portion of the bump is exposed from the insulating resin layer, when the second metal foil is pressed under heating via the insulating resin layer, copper, tin or bismuth among the metals constituting the bump is sintered For example, the bump becomes a metal sintered body containing a binder component such as a resin.

  As a result, as compared with the conventional case where particles such as silver are contained in the bumps (vias after heat curing) constituting the multilayer wiring board, the bumps (vias) due to the reduction of the interface between the particles are obtained. Since the surface area is reduced, the surface area of the bumps (vias) is reduced to reduce the conductor loss due to the skin effect during high speed transmission. Furthermore, an alloy layer is formed between the bump (via) and the second metal foil 14. As a result, the problem that signal delay occurs can be suppressed.

  In the present embodiment, the bump 15X has a truncated cone shape, the height h thereof can be set in the range of 15 μm to 200 μm, for example, and the lower surface diameter R can be set in the range of 10 μm to 200 μm. . In addition, the shape of the bump 15X can be an arbitrary shape such as a conical shape.

  Next, as shown in FIG. 10, the insulating resin layer 16 and the resin adhesive film 54 containing no fibrous filler are disposed on the first metal foil 132X, and as shown in FIG. 11, a roll laminator or vacuum laminator is provided. The insulating resin layer 16 and the resin adhesion film 54 are pressed at the first temperature against the first metal foil 132X using a pressing device (not shown) such as the above.

  The insulating resin layer 16 has a thickness t2 of, for example, 10 μm to 40 μm, and is fluidized by heating at the first temperature, and the insulating resin layer 16 remaining on the upper end 15XA of the bump 15X is shown by an arrow in the figure. As shown, the bump 15X flows from the upper end portion 15XA toward the side surface 15XB, and only the thin skin 161 made of the insulating resin layer 16 having a thickness of, for example, several nm to 3 μm remains on the upper end portion 15XA of the bump 15X.

For this purpose, the upper limit of the melt viscosity at the first temperature of the insulating resin layer 16 is preferably 1 × 10 ⁵ Pa · s, and more preferably 1 × 10 ⁴ Pa · s. When the melt viscosity exceeds the above value, the insulating resin layer 16 cannot flow sufficiently, and a relatively large amount of resin residue is present at the upper end portion 15XA of the bump 15X, and the resin adhesion film 54 has a thickness that can be removed. In some cases, thin skin 161 can not be formed.

The lower limit value of the melt viscosity at the first temperature of the insulating resin layer 16 is preferably 1 × 10 ¹ Pa · s, and more preferably 1 × 10 ² Pa · s. When the melt viscosity is smaller than the above value, it may be difficult to control the thickness of the insulating resin layer 16.

  In addition, the said melt viscosity is a value calculated | required from the lowest melt viscosity by rheometer measurement by TA instrument company make (model number ARES-G2) using a test piece of 300 mm-500 mm * and 300 micrometers in thickness.

  As an insulating resin which comprises the insulating resin layer 16, an epoxy resin, a polyimide resin, polyphenylene ether resin, cyanate resin, etc. can be mentioned.

  Moreover, when the insulating resin layer 16 is comprised from the above insulating resins, the said 1st temperature can be set to the range of 80 to 160 degreeC, for example.

  The resin adhesion film 54 has a thickness t3 in the range of, for example, 20 μm to 100 μm. For example, when the resin adhesion film 54 adheres to the thin skin 161 of the resin insulating layer 16 remaining on the upper end portion 15XA of the bump 15X, It is necessary that the adhesion force to the thin skin 161 is larger than the adhesion force to the bump. From this point of view, examples of the resin constituting the resin adhesion film 54 include a PTFE resin, a PET resin, a polycarbonate resin, and a polyimide resin.

  Next, as shown in FIG. 12, the resin adhesion film 54 is peeled from the insulating resin layer 16. At this time, the resin adhesion film 54 is in close contact with the thin skin 161 of the resin insulating layer 16 remaining on the upper end portion 15XA of the bump 15X. Since the thin skin 161 of the insulating resin layer 16 is mainly made of resin, most or all of the thin film 161 is made of resin rather than the adhesion to the bumps 15X of different materials, which are mostly made of metal. The adhesion of the same kind of material to the resin adhesion film 54 is greater.

  Therefore, when the resin adhesion film 54 is to be peeled off, the thin skin 161 of the resin insulating layer 16 is brought into close contact with the resin adhesion film 54 and peeled off together. As a result, the thin skin 161 of the resin insulation layer 16 remaining on the upper end 15XA of the bump 15X is peeled off, and the bump 15X upper end 15XA is exposed from the resin insulation layer 16.

  Next, as shown in FIGS. 13 and 14, the first wiring layer in the first buildup layer 12 of the second wiring board unit 20 is further applied to the first metal foil 132X by a pressing device (not shown). The second metal foil 122X to be 122 is pressed through the insulating resin layer 16 at a second temperature higher than the first temperature to cure the insulating resin layer 16 and the bumps 15X, and at the same time the insulating resin layer 16 A second metal foil 122X is laminated thereon (lamination press). As a result, the first metal foil 132X becomes the wiring layer 132 in the buildup layer 13 of the first wiring board unit 10, and the second metal foil 122X becomes the first buildup of the second wiring board unit 20. It becomes the first wiring layer 122 in the layer 12.

  The second metal foil 122X is also made of an electrically good conductor such as copper (Cu), gold (Au), silver (Ag) or aluminum (Al) because it will later constitute the wiring layer of the multilayer wiring board. The thickness t4 of the second metal foil 122X is, for example, 1.5 μm to 40 μm.

  The second temperature is higher than the first temperature and is a temperature at which the insulating resin layer 16 and the bumps 15X are cured. Therefore, the second temperature can be set, for example, in a temperature range of 160 ° C to 230 ° C.

  As described above, according to the manufacturing method of the present embodiment, after the bumps 15X made of the conductive paste are formed on the first metal foil 132X, the fibrous filler is added to the first metal foil 132X. The insulating resin layer 16 and the resin adhesion film 54 that are not included are pressed at the first temperature. At this time, since the viscosity of the insulating resin layer 16 is lowered as the temperature rises and becomes fluid, the insulating resin layer 16 remaining on the upper end portion 15XA of the bump 15X is eliminated in pressing. Only the thin skin 161 remains in the portion 15XA. The thin skin 161 is peeled off by the resin adhesion film 54 so that the upper end portion 15XA of the bump 15X is exposed from the insulating resin layer 16.

  Therefore, when the second metal foil 122X is pressed against the first metal foil 132X again at a second temperature higher than the first temperature to perform a lamination press, the second metal foil 122X The hardened bumps (vias) 15X exposed from the resin layer 16 are securely bonded to the upper end portions 15XA of the cured bumps (vias) 15X, whereby the first metal foil 132X and the second metal foil 122X that later become wiring layers are high. It becomes electrically connected with reliability. As a result, the electrical connection between the wiring layers can be sufficiently retained by the interlayer connector (via), and a multilayer wiring board having excellent reliability can be provided.

  Further, in the present embodiment, since the insulating member constituting the multilayer wiring board is formed of the insulating resin layer 16 which does not contain the fibrous filler, the thickness of the insulating member can be narrowed. Therefore, miniaturization and high density of the multilayer wiring board can be achieved.

  In the present embodiment, the elastic modulus of the resin adhesion film 54 is preferably 500 MPa or less. In this case, when the insulating resin layer containing no fibrous filler and the resin adhesive film are pressed at the first temperature with respect to the first metal foil, the resin adhesive film suppresses the change in the shape of the bumps. be able to.

  Although the lower limit of the elastic modulus of the resin adhesive film 54 is not particularly limited, it may be, for example, 100 MPa. When the lower limit value of the elastic modulus of the resin adhesive film 54 is smaller than the above value, the film 54 follows the portion where the upper end portion of the bump (via) 15X contacts the resin adhesive film 54, and the bump (via ) The resin layer on 15X cannot be thinned. For this reason, after the bumps (vias) 15X penetrate the insulating resin layer 16, the resin layer may remain at the tips of the bumps (vias) 15X, and the resin may remain at the interface even after pressing. Therefore, the connection reliability between the bump (via) 15X and the second metal foil 122X may be reduced.

  The above elastic modulus was obtained by cutting a 100 mm square test piece from the resin adhesion film 54 and using an ultra-fine indentation hardness tester (model number ENT-1100a) manufactured by Elionix Co., Ltd., with a test load of 5 mN and a holding time of 1 s. Is the value obtained in

  Further, in the present embodiment, specific examples from the second step to the fourth step in the first embodiment have been described, but specific examples from the second step to the fourth step in the second embodiment This can also be explained in the same manner.

  As mentioned above, although the present invention was explained in detail based on the above-mentioned example, the present invention is not limited to the above-mentioned example, and various modification and change are possible unless it deviates from the category of the present invention.

DESCRIPTION OF SYMBOLS 10 1st wiring board unit 11 Core board | substrate, support plate 12, 13 1st buildup layer 13, 14 2nd buildup layer 15X Bump which consists of conductive paste 15 Interlayer connection body (via)
16X resin insulating layer 16 insulating member 20 second wiring board unit 30 multilayer wiring board 42 release film 54 resin adhesive film

Claims (7)

A first wiring board unit and a second wiring board unit in which at least a pair of wiring layers are formed via an insulating member and the at least a pair of wiring layers are electrically connected by metal vias are prepared. 1 process,
A second step of applying a conductive paste on the wiring layer of the first wiring board unit to form a bump made of the conductive paste;
A third step of forming an insulating resin layer on the first wiring board unit such that the upper end portion of the bump penetrates;
On the first wiring board unit, the second wiring board unit is pressed under heating through the insulating resin layer, and the upper end portion of the bump is pressed against the wiring layer of the second wiring board unit. And the fourth step of curing the insulating resin layer and the bump and electrically connecting the first wiring board unit and the second wiring board unit via the bump;
The equipped,
The second step is
Applying a conductive paste on the first metal foil serving as the wiring layer of the first wiring board unit, and forming a bump made of the conductive paste;
The third step is
With respect to the first metal foil, an insulating resin layer that does not include a fibrous filler and includes any of an epoxy resin, a polyimide resin, a polyphenylene ether resin, and a cyanate resin, and a resin adhesion film are 80 ° C to 160 ° C. Pressing at a first temperature to fluidize the insulating resin layer;
Peeling the resin adhesion film, removing the insulating resin layer remaining on the upper end portion of the bump, and exposing the upper end portion from the insulating resin layer,
The fourth step is
With respect to the first metal foil, a second metal foil serving as a wiring layer of the second wiring board unit is passed through an insulating resin layer at a second temperature of 160 to 230 ° C. higher than the first temperature. And a step of curing the insulating resin layer and the bump and laminating a second metal foil (second wiring board unit) on the insulating resin layer.
It characterized the this method of manufacturing a multilayer wiring board. The first step is
On the two main surfaces of the support plate, a first film is formed by forming at least a pair of wiring layers through a release film and an insulating member, and electrically connecting the at least a pair of wiring layers with metal vias. Forming a second buildup layer and a second buildup layer;
And exfoliating the first buildup layer and the second buildup layer from the support plate,
2. The multilayer according to claim 1, wherein the first wiring board unit is constituted by the first buildup layer, and the second wiring board unit is constituted by the second buildup layer. Method of manufacturing a wiring board. The melt viscosity of the insulating resin layer at the first temperature is equal to or less than 1 × 10 5 ^Pa · s, a method for manufacturing a multilayer wiring board according to claim 1 or 2. The melt viscosity of the insulating resin layer at the first temperature is equal to or is 1 × 10 ¹ Pa · s or higher, a method for manufacturing a multilayer wiring board according to any one of claims 1 to 3. The elastic modulus of the resin adhesive film is equal to or less than 500 MPa, a method for manufacturing a multilayer wiring board according to any one of claims 1 to 4. The method for manufacturing a multilayer wiring board according to any one of claims 1 to 5 , wherein the bumps have a conical shape.   The multilayer wiring board according to any one of claims 1 to 6, wherein the resin adhesive film has a thickness of 20 μm or more and 100 μm or less and an elastic modulus of 100 MPa or more and 500 MPa or less. Production method.

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