JP4824972B2 - Circuit wiring board and manufacturing method thereof - Google Patents

Circuit wiring board and manufacturing method thereof Download PDF

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JP4824972B2
JP4824972B2 JP2005244425A JP2005244425A JP4824972B2 JP 4824972 B2 JP4824972 B2 JP 4824972B2 JP 2005244425 A JP2005244425 A JP 2005244425A JP 2005244425 A JP2005244425 A JP 2005244425A JP 4824972 B2 JP4824972 B2 JP 4824972B2
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hole
wiring board
adhesive layer
conductive member
wiring
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JP2007059702A (en
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直行 小澤
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Fujikura Ltd
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Description

本発明は回路配線基板及びその製造方法に係り、特に多層配線構造の回路配線基板及びその製造方法に関する。   The present invention relates to a circuit wiring board and a manufacturing method thereof, and more particularly to a circuit wiring board having a multilayer wiring structure and a manufacturing method thereof.

近年、電子機器の小型化要求に伴い、その電子部品として使用されるプリント配線板(回路配線基板)の小形化、薄形化、軽量化及び低コスト化の要求が益々高まっている。従来、電子機器は、実装される各種電子部品やプリント配線板自体の設計上や製造上の制約等から前記要求に応え難い面があり、その制約を取り払いその要求に大きく応える手法として、両面に電子部品等の実装が可能な両面多層プリント配線板が用いられてきている。   In recent years, with the demand for downsizing of electronic devices, there are increasing demands for downsizing, thinning, weight reduction and cost reduction of printed wiring boards (circuit wiring boards) used as electronic components. Conventionally, electronic devices have difficulty in meeting the above requirements due to restrictions in design and manufacturing of various electronic components to be mounted and printed wiring boards themselves. Double-sided multilayer printed wiring boards capable of mounting electronic components and the like have been used.

この両面多層プリント配線板は、基板両面の各配線層の相互間の電気的接続のための層間導電路を必要としており、その層間導電路の形成技術としては、例えばスルーホール方式やインターステシャルビアホール(IVH:Interstitial Via Hole)方式がある。前者の方式は多層化層数が増えるに従いスルーホールが深くなり、確実な層間導電路形成のために、ホール内は基より基板両表面でのメッキ層厚が厚くなるので、基板総厚が不所望に厚くなってしまう問題やスルーホール位置への部品装着ができず、実装密度が低下し易いなどの問題がある。これに対して後者のIVH方式は、多層化層の各層毎に良好な層間導電路が確実に形成され、基板全面が連続平面を有する構造であるために高密度実装が可能であるという利点をもっている。   This double-sided multilayer printed wiring board requires an interlayer conductive path for electrical connection between the wiring layers on both sides of the board. As a technique for forming the interlayer conductive path, for example, a through-hole method or an interstitial is used. There is a via hole (IVH: Interstitial Via Hole) method. In the former method, through-holes become deeper as the number of multilayered layers increases, and the plating layer thickness on both surfaces of the substrate is thicker than the base in order to form a reliable interlayer conductive path. There is a problem that it becomes thick as desired and there is a problem that it is difficult to mount components at the through-hole position, and the mounting density tends to decrease. On the other hand, the latter IVH method has the advantage that high-density mounting is possible because a good interlayer conductive path is reliably formed for each layer of the multilayered layer and the entire surface of the substrate has a continuous plane. Yes.

従来のIVH方式を用いた両面多層プリント配線板は、一般的に、例えばポリイミド樹脂製の絶縁基板の片面に銅箔がラミネートされ反対面が露出面とされている片面銅張積層板(以下片面CCL(Copper Clad Lamination))を出発材料として、複数のCCLを重ね合わせて形成されている。   A conventional double-sided multilayer printed wiring board using the IVH system is generally a single-sided copper-clad laminate (hereinafter, single-sided) in which copper foil is laminated on one side of an insulating substrate made of polyimide resin, for example, and the opposite side is exposed. Using CCL (Copper Clad Lamination) as a starting material, a plurality of CCLs are overlapped.

即ち、一従来例としての両面多層プリント配線板は、第1及び第2の片面CCLの各絶縁基板の反対面(露出面)に例えば熱可塑性或いは熱硬化性のポリイミド樹脂接着層をそれぞれ接着する手段と、各CCLの銅箔にそれぞれ所望パターンの配線層を形成する手段と、各CCLの層間導電路予定位置に各絶縁基板及び接着層を貫通する各ビアホールを形成する手段と、各ビヤホールに導電性樹脂組成物からなる導電性ペーストを充填し、その各一端を各配線層の前記予定位置にそれぞれ接続する手段と、前記第1片面CCLの接着層上に第2片面CCLの絶縁基板の配線層側の面を重ね合わせ、第2片面CCLの接着層上に他の銅箔(上部最外層)を重ね合わせる手段と、前記各CCLの層間導電路予定位置などの必要な位置合わせを行い、前記重ね合わせ部材を一括して熱プレスすることによって貼り合わせ一体化する手段と、上部最外層の前記他の銅箔に所望パターンの配線層を形成する手段とを用いて形成されている(一例として下記特許文献1の図7参照)。
特開2003−318546号特許公開公報
That is, in the conventional double-sided multilayer printed wiring board, for example, a thermoplastic or thermosetting polyimide resin adhesive layer is bonded to the opposite surface (exposed surface) of each insulating substrate of the first and second single-sided CCLs. Means, a means for forming a wiring layer of a desired pattern on the copper foil of each CCL, a means for forming each via hole penetrating each insulating substrate and adhesive layer at a predetermined position of the interlayer conductive path of each CCL, and each via hole A conductive paste made of a conductive resin composition is filled, and means for connecting each end of the conductive paste to the predetermined position of each wiring layer, and an insulating substrate of the second single-sided CCL on the adhesive layer of the first single-sided CCL Overlaying the surface on the wiring layer side and superimposing another copper foil (upper outermost layer) on the adhesive layer of the second single-sided CCL, and necessary alignment such as the planned position of the interlayer conductive path of each CCL It is formed using means for laminating and integrating the overlapping members together by hot pressing and means for forming a wiring layer of a desired pattern on the other copper foil of the uppermost outermost layer (an example) (See FIG. 7 of Patent Document 1 below).
Japanese Patent Laid-Open No. 2003-318546

ところが、前記従来例の両面多層プリント配線板においては、その片面側の最外層の絶縁材料が前記第2片面CCL側の接着層で構成され、反対面側の最外層の絶縁材料が前記第1片面CCLの絶縁基板で構成され、これら最外層の接着層と絶縁基板とが異質材料であるために、材料配置構成上、多層配線板構造がその厚さ方向に非対称となっている。   However, in the double-sided multilayer printed wiring board of the conventional example, the outermost layer insulating material on one side is constituted by the adhesive layer on the second single-sided CCL side, and the outermost layer insulating material on the opposite side is the first. Since the outermost adhesive layer and the insulating substrate are made of different materials, the multilayer wiring board structure is asymmetric in the thickness direction due to the material arrangement.

従って、前記熱プレスにて貼り合わせされた両面多層プリント配線板は、前記接着層の収縮現象により圧縮応力が基板内に発生して、反りを生じる。更に、配線板への部品実装時のはんだ溶融温度により、接着層材料の化学的架橋が進行して圧縮応力及び配線板の反りが益々増大するという問題がある。特に、部品実装時に配線板の反りが生じると、配線板は基より、薄膜或いは厚膜素子などの電子部品にクラックや断裂が生じる可能性があり、部品並びに構成回路の信頼性の低下を招き易い。   Therefore, the double-sided multilayer printed wiring board bonded by the hot press generates a compressive stress in the substrate due to the shrinkage phenomenon of the adhesive layer, and warps. Furthermore, there is a problem in that the chemical melting of the adhesive layer material progresses due to the solder melting temperature at the time of component mounting on the wiring board, and the compressive stress and the warping of the wiring board increase. In particular, if the wiring board is warped during component mounting, the wiring board may crack or rupture in the electronic component such as a thin film or thick film element, leading to a decrease in the reliability of the component and the constituent circuit. easy.

本発明は、前記従来の問題点を解決するもので、特に多層配線構造に好適な回路配線基板及びその製造方法を提供することを目的とする。   The present invention solves the above-mentioned conventional problems, and an object thereof is to provide a circuit wiring board suitable for a multilayer wiring structure and a manufacturing method thereof.

請求項1に記載の本発明の回路配線基板は、フィルム状の第1接着層の両面にそれぞれ対称的に重ね合わされた第1及び第2絶縁基板と、前記第1及び第2絶縁基板の前記第1接着層とは反対の各面にそれぞれ設けられた第1及び第2配線層と、前記第1及び第2配線層の相対向する各一部分にそれぞれ設けられた第1及び第2コンタクト部と、前記第1及び第2コンタクト部相互間に前記第1及び第2絶縁基板及び前記第1接着層を貫通して設けられた貫通孔と、前記貫通孔内に設けられ前記各コンタクト部を相互接続する第1層間導電部材とを備え、前記貫通孔は、前記第1絶縁基板を貫通する第1孔、第1接着層を貫通する第2孔、及び第2絶縁基板を貫通する第3孔を有し、前記第3孔は前記第2孔よりも大きな孔径を有し、前記第1層間導電部材の第2コンタクト部との接触面積が第1コンタクト部との接触面積よりも大きいことを特徴とするものである。
請求項2に記載の本発明は、請求項1に記載の回路配線基板において、前記第1孔及び前記第2孔が同一孔径で形成され、前記第1層間導電部材は、導電性樹脂組成物で形成され、前記第2コンタクト部に押し付けられることによって押し潰され、前記第3孔内に膨出した圧潰部を有していることを特徴とするものである。
According to a first aspect of the present invention, there is provided the circuit wiring board according to the first aspect of the invention, wherein the first and second insulating substrates are symmetrically overlapped on both surfaces of the film-like first adhesive layer, and the first and second insulating substrates are the same. First and second wiring layers provided on the respective surfaces opposite to the first adhesive layer, and first and second contact portions provided on respective opposing portions of the first and second wiring layers, respectively. A through hole provided through the first and second insulating substrates and the first adhesive layer between the first and second contact parts, and the contact parts provided in the through hole. comprising: a first interlayer conductive member interconnecting the said through-hole penetrates the first first hole penetrating an insulating substrate, a second hole penetrating the first adhesive layer, and a second insulating substrate first has a third hole, the third hole has a larger pore size than said second hole, said Contact area between the second contact portions of the first interlayer conductive member is characterized in that greater than the contact area between the first contact portion.
According to a second aspect of the present invention, in the circuit wiring board according to the first aspect, the first hole and the second hole are formed with the same hole diameter, and the first interlayer conductive member is formed of a conductive resin composition. And a crushing portion that is crushed by being pressed against the second contact portion and bulged into the third hole.

請求項に記載の本発明は、請求項1または2に記載の回路配線基板において、前記第1及び第2コンタクト部の少なくとも一方と前記第1層間導電部材との間に介在され、前記第1層間導電部材よりも高い導電度を有するコンタクト層を備えたことを特徴とするものである。 According to a third aspect of the present invention, there is provided the circuit wiring board according to the first or second aspect , wherein the circuit wiring board is interposed between at least one of the first and second contact portions and the first interlayer conductive member. A contact layer having a conductivity higher than that of the one-layer conductive member is provided.

請求項に記載の本発明は、請求項1から3のいずれか1つに記載の回路配線基板において、前記第1及び第2配線層の各一部表面にそれぞれ設けられた第3及び第4コンタクト部と、前記第1配線層側及び第2配線層側にそれぞれ重ね合わせられた第2及び第3接着層と、前記第2及び第3接着層の各表面にそれぞれ重ね合わされた第3及び第4絶縁基板と、前記第3及び第4絶縁基板の前記各接着層とは反対の各面にそれぞれ設けられた第3及び第4配線層と、前記第3及び第4コンタクト部にそれぞれ対向して前記第3及び第4配線層の各一部分にそれぞれ設けられた第5及び第6コンタクト部と、前記第3及び第5コンタクト部相互間に第3絶縁基板及び第2接着層を貫通して設けられた第2層間導電部材と、前記第4及び第6コンタクト部相互間に第4絶縁基板及び第3接着層を貫通して設けられた第3層間導電部材とを備えたことを特徴とするものである。 According to a fourth aspect of the present invention, there is provided the circuit wiring board according to any one of the first to third aspects, wherein the third and second surfaces provided on the partial surfaces of the first and second wiring layers, respectively. 4 contact portions, second and third adhesive layers superimposed on the first wiring layer side and second wiring layer side, respectively, and a third superimposed on each surface of the second and third adhesive layers, respectively. And the fourth insulating substrate, the third and fourth wiring layers provided on the surfaces of the third and fourth insulating substrates opposite to the adhesive layers, respectively, and the third and fourth contact portions, respectively. Oppositely, a fifth and a sixth contact part respectively provided in each part of the third and fourth wiring layers, and a third insulating substrate and a second adhesive layer are penetrated between the third and fifth contact parts. A second interlayer conductive member provided in the form of a fourth conductor and a fourth conductor A third interlayer conductive member provided through the fourth insulating substrate and the third adhesive layer between the defect part each other and characterized in that it comprises a.

請求項に記載の本発明の回路配線基板の製造方法は、第1コンタクト部を有する第1配線層用の導電層が一方の面に設けられた第1絶縁基板の他方の面に第1接着層を重ね合わせ、前記第1コンタクト部に対向する位置に前記第1絶縁基板を貫通する第1孔及び前記第1接着層を貫通して第1孔に連通する第2孔を設け、前記第1及び第2孔に導電性ペーストを充填して一端が前記第1コンタクト部に接続された第1層間導電部材を設けることによって第1配線用基板材を形成する工程と、一方の面が前記第1接着層に対面配置される第2絶縁基板の他方の面に前記第1コンタクト部に対向する第2コンタクト部を有する第2配線層用の導電層を設け、前記第2コンタクト部に対向する位置に前記第2絶縁基板を貫通し、前記第2孔よりも大きな孔径に形成されている第3孔を設けることによって第2配線用基板材を形成する工程と、前記第1層間導電部材の他端が前記第2コンタクト部に接触するように前記第1及び第2配線用基板材を相互に重ね合わせて、前記第1接着層両面に前記第1及び第2絶縁基板を対称的に貼り合わせ、前記第1層間導電部材よって前記第1及び第2コンタクト部相互を接続する工程とを備えたことを特徴とするものである。 According to a fifth aspect of the present invention, there is provided a circuit wiring board manufacturing method according to the first aspect of the present invention, wherein the first insulating substrate is provided with a conductive layer for a first wiring layer having a first contact portion on one surface. Overlaying the adhesive layer, providing a first hole penetrating the first insulating substrate and a second hole penetrating the first adhesive layer and communicating with the first hole at a position facing the first contact portion, Forming a first wiring substrate material by filling the first and second holes with a conductive paste and providing a first interlayer conductive member having one end connected to the first contact portion; A conductive layer for a second wiring layer having a second contact portion opposed to the first contact portion is provided on the other surface of the second insulating substrate disposed facing the first adhesive layer, and the second contact portion is provided with the second contact portion. said second insulating substrate penetrates into opposing positions, than the second hole Forming a second wiring board material by providing a third bore formed in Kina pore size, the first to the other end of the first interlayer conductive member is in contact with the second contact portion and a second wiring board material superposed on each other, bonding the first and second insulating substrate to said first adhesive layer both sides symmetrically, the first interlayer conductive member thus the first and second a step of connecting the contact portions cross, is characterized in that it comprises a.

請求項に記載の本発明は、請求項に記載の回路配線基板の製造方法において、前記第1配線用基板材を形成する工程は、前記第1孔及び前記第2孔が同一孔径で形成され、前記導電性ペーストが導電性樹脂組成物であり、前記第1層間導電部材が、前記第1層間導電部材の他端を前記第1接着層から突出させると共に、前記第1層間導電部材の突出高さが前記第2絶縁基板の肉厚寸法よりも大きい高さ寸法で形成され、前記第1及び第2コンタクト部相互を接続する工程は、前記第1及び第2配線用基板材を相互に重ね合わせて熱プレスし、前記第1層間導電部材の他端に、前記第2コンタクト部に押し付けられることによって押し潰され、前記第3孔内に膨出した圧潰部を形成することを特徴とするものである。 According to a sixth aspect of the present invention, in the method for manufacturing a circuit wiring board according to the fifth aspect , in the step of forming the first wiring board material, the first hole and the second hole have the same hole diameter. The conductive paste is a conductive resin composition, and the first interlayer conductive member causes the other end of the first interlayer conductive member to protrude from the first adhesive layer, and the first interlayer conductive member And the step of connecting the first and second contact portions to each other includes the step of connecting the first and second wiring substrate materials to each other. hot pressed superimposed on each other, the other end of the first interlayer conductive member, the second crushed by being pressed against the contact portion, to form a pinch that bulges into the third bore Rukoto It is characterized by.

本発明の回路配線基板によれば、回路配線基板は、その厚さ方向において、前記接着層が中央部に位置し、配線層を積層した各絶縁基板が、前記接着層の両側に対称的に重ね合わされて両面最外層位置に配置された対称構造となるので、前記接着層の収縮現象が生じようとしても、回路配線基板内の応力分布が均等化されるために、反り発生が著しく抑制される。また、前記第3孔が前記第2孔よりも大きな孔径となっているために、前記第2配線層の第2コンタクト部と前記第1層間導電部材とが大きな接触面積をもって電気的及び物理的に確実に接続できる。   According to the circuit wiring board of the present invention, in the circuit wiring board, in the thickness direction, the adhesive layer is located in the center, and each insulating substrate on which the wiring layers are laminated is symmetrically on both sides of the adhesive layer. Since the layers are symmetrically arranged at the outermost layer positions on both sides, even if the shrinkage phenomenon of the adhesive layer occurs, the stress distribution in the circuit wiring board is equalized, so the occurrence of warpage is remarkably suppressed. The Further, since the third hole has a larger diameter than the second hole, the second contact portion of the second wiring layer and the first interlayer conductive member have a large contact area and are electrically and physically Can be securely connected.

本発明の回路配線基板の製造方法によれば、前記第1層間導電部材の他端を前記第2コンタクト部に接触するように位置合わせして、前記第1及び第2配線用基板材を相互に重ね合わせ、前記第1接着層両面に前記第1及び第2絶縁基板を貼り合わせることにより、前記第1層間導電部材よって前記第1及び第2コンタクト部相互を接続すると共に、前記対称構造をもって反りのない回路配線基板を簡単なプロセスで容易に製造することができるという効果を奏することができる。 According to the method of manufacturing a circuit wiring board of the present invention, the other end of the first interlayer conductive member is aligned so as to contact the second contact portion, and the first and second wiring board materials are mutually connected. superimposed, said by bonding the first and second insulating substrate on both surfaces first adhesive layer, while connected to the first interlayer conductive member thus said first and second contact portions mutually, the symmetrical structure Therefore, it is possible to easily produce a circuit wiring board having no warp by a simple process.

以下、本発明の回路配線基板の一実施形態について図1を参照して説明する。図1(a)は回路配線基板の完成直前の状態を示す分解断面図であり、図1(b)は完成後の回路配線基板を示す断面図である。   Hereinafter, an embodiment of a circuit wiring board of the present invention will be described with reference to FIG. FIG. 1A is an exploded sectional view showing a state immediately before completion of the circuit wiring board, and FIG. 1B is a sectional view showing the circuit wiring board after completion.

第1配線用基板材1は、平板状或いはフィルム状の可撓性の第1絶縁基板2と、その片面に積層され層間導電路予定位置に第1コンタクト部c1を有する第1配線層3と、前記絶縁基板2の反対面に全体的に接着された平板状或いはフィルム状の第1接着層4と、一端が前記第1コンタクト部c1に電気的及び物理的に接続され前記絶縁基板2及び接着層4を貫通して設けられた第1層間導電部材5とを備えて構成されている。   The first wiring board material 1 includes a flat first or film-like flexible first insulating substrate 2, a first wiring layer 3 that is laminated on one side of the first wiring layer 3 and has a first contact portion c 1 at a predetermined position of an interlayer conductive path. A flat or film-like first adhesive layer 4 entirely bonded to the opposite surface of the insulating substrate 2, and one end electrically and physically connected to the first contact portion c1, and the insulating substrate 2 and And a first interlayer conductive member 5 provided through the adhesive layer 4.

前記第1絶縁基板2及び第1接着層4の前記貫通部分には、前記第1層間導電部材5と同軸関係にあり相互に同一孔径の第1孔h1及び第2孔h2がそれぞれ形成されている。また、前記第1層間導電部材5は、前記第1及び第2孔h1、h2内に後述する導電ペーストを充填することによってほぼ柱状に形成されており、その根元部分を含む大部分が前記孔h1、h2内に位置し、その先端部が前記第1接着層4の露出面から所望高さに突出した形状となっている。   A first hole h1 and a second hole h2 that are coaxial with the first interlayer conductive member 5 and have the same hole diameter are formed in the penetrating portions of the first insulating substrate 2 and the first adhesive layer 4, respectively. Yes. In addition, the first interlayer conductive member 5 is formed in a substantially columnar shape by filling the first and second holes h1 and h2 with a conductive paste described later, and most of the first interlayer conductive member 5 including the root portion is the hole. It is located in h1 and h2, and has a shape in which its tip protrudes from the exposed surface of the first adhesive layer 4 to a desired height.

前記第1配線用基板材1の第1接着層4側に対向配置された第2配線用基板材11は、前記第1絶縁基板2と同様な材料を用いた平板状或いはフィルム状の可撓性の第2絶縁基板12と、その片面(前記第1接着層4とは反対側)に積層され前記第1コンタクト部c1に対応する層間導電路予定位置に第2コンタクト部c2を有する第2配線層13と、前記層間導電路予定位置に第2絶縁基板12を貫通して設けられた第3孔h3とを備えて構成されている。   The second wiring substrate material 11 disposed opposite to the first adhesive substrate 4 side of the first wiring substrate material 1 is a flat or film-like flexible material using the same material as the first insulating substrate 2. Second insulating substrate 12, and a second contact portion c2 which is laminated on one side (opposite side to the first adhesive layer 4) and has a second contact portion c2 at a predetermined position of an interlayer conductive path corresponding to the first contact portion c1. The wiring layer 13 is provided with a third hole h3 provided through the second insulating substrate 12 at the planned position of the interlayer conductive path.

前記第1乃至第3孔h1乃至h3は相互に同軸配置で連通し合う関係をもつものであり、前記第3孔h3は第2孔部分h2よりも大きな孔径とされている。また、前記第1層間導電部材5先端部の突出高さは、前記第2絶縁基板12の肉厚寸法よりも大きい高さ寸法となるように形成されている。   The first to third holes h1 to h3 are in communication with each other in a coaxial arrangement, and the third hole h3 has a larger diameter than the second hole portion h2. Further, the protruding height of the front end portion of the first interlayer conductive member 5 is formed to be a height dimension larger than the thickness dimension of the second insulating substrate 12.

そして、図1(a)に示すように、前記第1層間導電部材5の突出端部が前記第2コンタクト部c2に同軸的に対向接触するように位置合わせされた状態で、相対向する前記第1及び第2配線用基板材1、11を上下から挟むように一括して熱プレスすることによって一体化された図1(b)のような両面(多層)配線構造の回路配線基板が形成される。   Then, as shown in FIG. 1A, the projecting end portions of the first interlayer conductive member 5 are opposed to each other with the second contact portions c2 being coaxially opposed to and in contact with each other. A circuit wiring board having a double-sided (multi-layer) wiring structure as shown in FIG. 1B is formed by heat-pressing the first and second wiring board materials 1 and 11 together so as to be sandwiched from above and below. Is done.

このように一体化された前記回路配線基板においては、前記第1乃至第3孔h1乃至h3は、前記第1コンタクト部c1と第2コンタクト部c2との間で前記第1及び第2絶縁基板及び第1接着層を貫通する貫通孔を構成する。   In the circuit wiring board integrated in this way, the first to third holes h1 to h3 are formed between the first contact portion c1 and the second contact portion c2 in the first and second insulating substrates. And a through hole penetrating the first adhesive layer.

前記第1層間導電部材5の突出端部は、前記第2コンタクト部c2に押し付けることによって押し潰された圧潰部D5を有する形状となっていて、その圧潰部D5は、前記第2孔部分h2よりも大きな孔径の第3孔h3内にて膨出した状態となり、第2コンタクト部c2に広い範囲に亘って大きな接触面積(電気的接触抵抗小)をもって強固に圧着されており、電気的及び物理的に優れた接続構造が得られている。また、前記圧潰部D5が前記第3孔h3を埋め尽くすと前記接触面積は更に増大する。埋め尽くされない場合でも、前記第1接着層1の一部が前記熱プレスによりその隙間を埋めて部材間の接着強度を高めることができる。   The protruding end portion of the first interlayer conductive member 5 has a shape having a crushed portion D5 that is crushed by pressing against the second contact portion c2, and the crushed portion D5 is formed by the second hole portion h2. The third hole h3 has a larger diameter than the third hole h3, and is firmly crimped to the second contact portion c2 with a large contact area (low electrical contact resistance) over a wide range. A physically excellent connection structure is obtained. In addition, when the crushing portion D5 fills the third hole h3, the contact area further increases. Even when the first adhesive layer 1 is not filled, a part of the first adhesive layer 1 can be filled with the hot press to increase the adhesive strength between the members.

前記実施形態の本発明の回路配線基板によれば、回路配線基板は、その厚さ方向において、前記接着層4が中央部に位置し、同様な材料で構成できる第1及び第2絶縁基板2、12が、前記接着層1の両側に対称的に重ね合わされて両面の最外層位置に配置された対称構造となるので、前記接着層1の収縮や架橋の進行が生じようとしても、回路配線基板内の応力分布が均等化されるために、反り発生が著しく抑制される。   According to the circuit wiring board of the present invention of the above-described embodiment, the first and second insulating substrates 2 that can be composed of the same material with the adhesive layer 4 positioned at the center in the thickness direction of the circuit wiring board. , 12 are symmetrically superimposed on both sides of the adhesive layer 1 and have a symmetrical structure arranged at the outermost layer positions on both sides. Therefore, even if the adhesive layer 1 is contracted or cross-linked, the circuit wiring Since the stress distribution in the substrate is equalized, the occurrence of warpage is remarkably suppressed.

従って、部品実装時の配線板の反りも抑制され、配線基板、薄膜或いは厚膜素子などの電子部品にクラックや断裂が生じるおそれがなくなり、部品並びに構成回路の高い信頼性が得られる。   Accordingly, warping of the wiring board during component mounting is suppressed, and there is no possibility that cracks or tears occur in electronic components such as a wiring board, thin film, or thick film element, and high reliability of the components and constituent circuits can be obtained.

また、前記第3孔h3が前記第2孔h2よりも大きな孔径となっているために、前記第2配線層13の第2コンタクト部c2と前記第1層間導電部材5とが大きな接触面積をもって電気的及び物理的に確実に接続される。   Further, since the third hole h3 has a larger diameter than the second hole h2, the second contact part c2 of the second wiring layer 13 and the first interlayer conductive member 5 have a large contact area. Securely connected electrically and physically.

前記各絶縁基板及び前記各配線層の基材として、例えばポリミド樹脂フィルム(絶縁基板材)の片面に例えば銅箔(配線層用導電材)をラミネートした市販の片面CCLを用いれば、前記第1及び第2絶縁基板2、12は相互に同様な材料としての均質な材料特性を容易に得ることができる。   As a base material for each of the insulating substrates and the wiring layers, for example, a commercially available single-sided CCL obtained by laminating, for example, a copper foil (conductive material for wiring layers) on one side of a polyimide resin film (insulating substrate material) is used. In addition, the second insulating substrates 2 and 12 can easily obtain uniform material characteristics as the same material.

また、前記第1層間導電部材5用の導電ペースト(導電性樹脂組成物)は、例えばフェノール系樹脂製のバインダーに導電材料としての金属フィラー(金属粉末)を混入し、溶剤を含む粘性媒体を混ぜ合わせてペースト状に形成したものである。   In addition, the conductive paste (conductive resin composition) for the first interlayer conductive member 5 includes a viscous medium containing a solvent, for example, a metal filler (metal powder) as a conductive material mixed in a binder made of phenol resin. They are mixed to form a paste.

一般的な導電ペーストは、金属フィラー同士の接触によって導電性をもたせてあるが、ここでは、金属フィラーとして、前記配線層用の導電層材料をCCLのように銅箔とした場合、例えば錫、銀、銅、インジウム、ビスマス、亜鉛のうち、前記銅箔と融合し易い少なくとも2元素の粒子の組合せとすることが好ましい。   A general conductive paste has conductivity by contact between metal fillers, but here, as the metal filler, when the conductive layer material for the wiring layer is a copper foil like CCL, for example, tin, Of silver, copper, indium, bismuth, and zinc, a combination of particles of at least two elements that are easily fused with the copper foil is preferable.

この粒子組合せとしては、例えば錫と銀、或いは錫とビスマスなどの組合せなどがあり、このようにすると、前記第1層間導電部材5は、その金属フィラーが前記第1及び第2配線層3、13と融合して接続されるために、各配線層3、13に対して物理的に密着して強固に接続され接触抵抗の小さい電気的接続が得られる。   Examples of the particle combination include a combination of tin and silver or tin and bismuth. In this case, the first interlayer conductive member 5 has the metal filler as the first and second wiring layers 3, Therefore, electrical connection with a small contact resistance can be obtained because the wiring layers 3 and 13 are physically connected and firmly connected.

また、この密着性により、前記第1層間導電部材5と各配線層3、13とのコンタクト界面への前記接着層1の侵入が妨げられ、そのコンタクト接触抵抗の増加が起こり難く、高温/高湿環境下での経時的劣化が防がれて耐湿熱性の向上も得られるなどの利点がある。   In addition, the adhesion prevents the adhesion layer 1 from entering the contact interface between the first interlayer conductive member 5 and the wiring layers 3 and 13, and the contact contact resistance hardly increases. There are advantages such that deterioration with time in a wet environment is prevented and an improvement in heat and moisture resistance is obtained.

次に、前記一実施形態の回路配線基板に係る製造方法の一実施例について図2(a)乃至(g)の工程図を参照して説明する。図2において、図1に示された部分と同一部分には同一符号を付してその説明を省略する。   Next, an example of the manufacturing method according to the circuit wiring board of the embodiment will be described with reference to the process diagrams of FIGS. In FIG. 2, the same parts as those shown in FIG.

まず、図2(a)の工程では、平板状またはフィルム状の例えばポリイミド系或いはポリエステル系樹脂製の可撓性の絶縁基板材21の一方の面(上面)全体に配線層用の導電層としての銅箔31を重ね合わせてラミネートされた片面CCLを用意する。   First, in the step of FIG. 2A, a conductive layer for a wiring layer is formed on one surface (upper surface) of a flexible insulating substrate material 21 made of, for example, a polyimide or polyester resin in a flat or film shape. A single-sided CCL laminated with the copper foil 31 is prepared.

図2(b)の工程では、例えばフォトリソグラフィ技術により前記銅箔31に回路配線パターンマスク(図示せず)を形成し、前記銅箔31を選択的に例えばケミカルエッチングして配線パタ−ニングを行い、所望パターン形状の第1配線層3を形成する。   In the step of FIG. 2B, a circuit wiring pattern mask (not shown) is formed on the copper foil 31 by, for example, photolithography, and the copper foil 31 is selectively etched, for example, to perform wiring patterning. The first wiring layer 3 having a desired pattern shape is formed.

図2(c)の工程では、前記絶縁基板材21の他方の面(下面)全体に、例えば熱硬化性エポキシ樹脂または熱可塑性ポリイミド樹脂を主成分とする接着樹脂フィルムを用いた第1接着層基材41が重ね合わされる。そして、短時間(約1〜10分)の加熱(約80〜120℃)により、第1接着層基材41が前記絶縁基板材21に仮貼りされる。   In the step of FIG. 2C, a first adhesive layer using an adhesive resin film mainly composed of, for example, a thermosetting epoxy resin or a thermoplastic polyimide resin, on the other surface (lower surface) of the insulating substrate material 21. The base material 41 is overlaid. Then, the first adhesive layer base material 41 is temporarily attached to the insulating substrate material 21 by heating (about 80 to 120 ° C.) for a short time (about 1 to 10 minutes).

図2(d)の工程では、前記接着層基材41の前記第1配線層3とは反対面(下面)全体に、例えばポリミド樹脂或いはPET(ポリエチレンテレフタレート)製のマスキングフィルム61が仮貼りされる。   In the step of FIG. 2D, a masking film 61 made of, for example, polyimide resin or PET (polyethylene terephthalate) is temporarily attached to the entire surface (lower surface) opposite to the first wiring layer 3 of the adhesive layer base material 41. The

図2(e)の工程では、層間導電路予定位置に相当する位置において、重ね合わされた前記絶縁基板材21と接着層基材41とマスキングフィルム61との重ね合わせ体を貫通する第1貫通孔(ビアホール)H1の一部を構成する第1孔h1、第2孔h2が形成され、前記第1配線層3の第1コンタクト部c1が露出される。このビアホール形成によって前記第1絶縁基板2及び第1接着層4が形造くられる。   In the step of FIG. 2 (e), a first through hole penetrating the overlapped body of the insulating substrate material 21, the adhesive layer base material 41, and the masking film 61 at a position corresponding to the planned position of the interlayer conductive path. (Via hole) A first hole h1 and a second hole h2 constituting a part of H1 are formed, and the first contact portion c1 of the first wiring layer 3 is exposed. By forming the via hole, the first insulating substrate 2 and the first adhesive layer 4 are formed.

前記ビアホールH1は、ここでは、ドリル加工よりも微細加工に適したレーザービーム加工技術により形成され、レーザー加工機として例えば炭酸ガス(CO2)レーザー、UV−YAGレーザー或いはエキシマレーザーを用いて高寸法精度に開口される。この加工において、前記ビアホール内に不所望なスミア或いは残滓が生じるので、例えばプラズマによるデスミア処理を行って清浄化する。   Here, the via hole H1 is formed by a laser beam processing technique more suitable for fine processing than drilling, and has high dimensional accuracy using, for example, a carbon dioxide (CO2) laser, a UV-YAG laser, or an excimer laser as a laser processing machine. Is opened. In this processing, undesired smears or residues are generated in the via hole. For example, a desmear process using plasma is performed for cleaning.

次に、図2(f)の工程では、前記ビアホールH1内に、前述したような樹脂バインダーに金属フィラーを混入した導電ペーストが、例えばスクイジング印刷により前記マスキングフィルム61の露出表面位置まで穴埋め充填され、前記第1層間導電部材5が形成される。   Next, in the step of FIG. 2F, the conductive paste in which the metal filler is mixed into the resin binder as described above is filled in the via hole H1 to the exposed surface position of the masking film 61 by, for example, squeezing printing. The first interlayer conductive member 5 is formed.

その後、前記マスキングフィルム61が第1接着層4から剥がされ、前記第1層間導電部材5の一端は前記第1コンタクト部c1に接続され、その他端は前記第1接着層4の露出面(下面)から突出した形状となり、前述の第1配線用基板材1が完成する。   Thereafter, the masking film 61 is peeled off from the first adhesive layer 4, one end of the first interlayer conductive member 5 is connected to the first contact part c1, and the other end is an exposed surface (lower surface) of the first adhesive layer 4. The first wiring board material 1 described above is completed.

前記第1層間導電部材5の前記突出端の高さ寸法は前記マスキングフィルム61の厚さ寸法に相当するものであり、所望の突出高さは前記マスキングフィルム61の厚さ選択により調整できる。この工程(f)において、前記突出高さを前述した第2絶縁基板12の厚さ寸法の1倍を超え2倍程度に調整しておくと、熱プレス時に、前記第1層間導電部材5の突出端に、図1(b)に示すような膨出した圧潰部D5が確実に形成され、第2コンタクト部c2との電気的及び物理的な良好な接続状態が得られる。   The height dimension of the protruding end of the first interlayer conductive member 5 corresponds to the thickness dimension of the masking film 61, and the desired protruding height can be adjusted by selecting the thickness of the masking film 61. In this step (f), if the protrusion height is adjusted to be more than 1 times and twice the thickness dimension of the second insulating substrate 12 described above, the first interlayer conductive member 5 is heated during hot pressing. The bulging crushing part D5 as shown in FIG. 1B is reliably formed at the projecting end, and a good electrical and physical connection state with the second contact part c2 is obtained.

図2(g)の工程では、図2(a)に示されたような片面CCLを別の出発材料として用意し、図2(b)の工程同様に、例えばフォトリソグラフィ技術により銅箔に回路配線パターンマスク(図示せず)が形成され、前記銅箔が選択的に例えばケミカルエッチングして配線パタ−ニングされ、所望パターン形状の第2配線層13が形成される。   In the step of FIG. 2 (g), a single-sided CCL as shown in FIG. 2 (a) is prepared as another starting material, and a circuit is formed on a copper foil by, for example, a photolithography technique as in the step of FIG. 2 (b). A wiring pattern mask (not shown) is formed, and the copper foil is selectively subjected to, for example, chemical etching and wiring patterning to form a second wiring layer 13 having a desired pattern shape.

そして、前述したようなレーザービーム加工技術によって、前記第2配線層13の第2コンタクト部c2の位置にて第2絶縁基板12を貫通する第3孔h3(ビヤホール)が
、前記第2孔h2よりも径大に形成され、第2配線用基板材11が完成する。
A third hole h3 (via hole) that penetrates the second insulating substrate 12 at the position of the second contact portion c2 of the second wiring layer 13 is formed by the laser beam processing technique as described above. The second wiring board material 11 is completed.

そこで、図1に示すように、前記第1層間導電部材5の突出端部が前記第2コンタクト部c2に同軸的に対向接触するように位置合わせされた状態で、相対向する前記第1及び第2配線用基板材1、11を上下から挟むように一括して熱プレスすることによって、一体化された両面(多層)配線構造の回路配線基板が得られる。   Therefore, as shown in FIG. 1, the first and second opposing first and second conductive members 5 are positioned so that the protruding end portions of the first interlayer conductive member 5 are coaxially opposed to and in contact with the second contact portion c2. A circuit wiring board having an integrated double-sided (multilayer) wiring structure can be obtained by hot-pressing the second wiring board materials 1 and 11 in a lump so as to be sandwiched from above and below.

前記第1層間導電部材5と前記第2コンタクト部c2との位置合わせは、例えば画像処理技術などを用いて行われる。   The alignment between the first interlayer conductive member 5 and the second contact portion c2 is performed using, for example, an image processing technique.

また、前記一括熱プレスは、例えば真空プレス機やキュアプレス機を用いて、150乃至250℃程度の加熱温度条件下で、1乃至5MPa程度の圧力を印加し、30分乃至2時間程度の間プレス保持するように行われる。   In addition, the batch heat press applies a pressure of about 1 to 5 MPa under a heating temperature of about 150 to 250 ° C. using a vacuum press or a curing press, for example, for about 30 minutes to 2 hours. This is done to hold the press.

前記製造方法の一実施例によれば、フォトリソグラフィ技術による各配線層のパターニング、レ−ザー加工によるビヤホール形成及び一括熱プレスなどの一連の工程により、高い加工精度をもって、前述のような対称構造の回路配線基板が簡単に製作される。   According to one embodiment of the manufacturing method, the symmetrical structure as described above is obtained with a high processing accuracy by a series of processes such as patterning of each wiring layer by photolithography technology, via hole formation by laser processing and collective heat pressing. The circuit wiring board can be easily manufactured.

また、第3孔h3(ビヤホール)が前記第2孔h2よりも径大に形成されているために、仮に、ビヤホールの位置ずれが生じていても、第2絶縁基板12に邪魔されることなく、前記第1層間導電部材5の突出端部が前記第2コンタクト部c2に対して確実に接続され、その突出端部に熱プレスにより膨出した圧潰部D5が形成されて接触面積が拡大される。   Further, since the third hole h3 (via hole) is formed to have a diameter larger than that of the second hole h2, even if the via hole is misaligned, the second insulating substrate 12 is not disturbed. The protruding end portion of the first interlayer conductive member 5 is securely connected to the second contact portion c2, and a crushing portion D5 bulged by hot pressing is formed on the protruding end portion, thereby increasing the contact area. The

なお、前記第1及び第2配線層3、13用の導電層のパターンニングは、前記一括熱プレス工程後におこなってもよい。   The patterning of the conductive layer for the first and second wiring layers 3 and 13 may be performed after the batch hot pressing step.

次に本発明の回路配線基板の他の実施形態について図3を参照して説明する。この実施形態は厚さ方向に6層の配線層を積層したビア・オン・ビア形の多層配線構造の回路配線基板を提供するものであり、図3(a)はその分解断面図、図3(b)はその完成断面図である。   Next, another embodiment of the circuit wiring board of the present invention will be described with reference to FIG. This embodiment provides a circuit wiring board having a via-on-via multilayer wiring structure in which six wiring layers are laminated in the thickness direction, and FIG. (B) is the completed sectional view.

この多層構造の回路配線基板は、図1に示された前記第1及び第2配線用基板材1、11からなる2層配線構造の回路配線基板をコア基板CBとして用い、図3に示すように、前記コア基板CBの両面にそれぞれ2層ずつの配線層を追加積層した構造となっている。   This multi-layer circuit wiring board uses a circuit wiring board having a two-layer wiring structure made of the first and second wiring board materials 1 and 11 shown in FIG. 1 as a core board CB, as shown in FIG. In addition, two wiring layers are additionally laminated on both surfaces of the core substrate CB.

この追加積層部分は、第3乃至第6配線用基板材1A乃至1Dによって構成されていて、前記各配線用基板材1A乃至1Dは、前記第1配線用基板材1と同様な製造方法により同様な構成部材を備えて形成されている。   This additional laminated portion is constituted by the third to sixth wiring substrate materials 1A to 1D, and each of the wiring substrate materials 1A to 1D is the same by the same manufacturing method as that of the first wiring substrate material 1. It is formed with various constituent members.

まず、前記第1配線用基板材1の第1配線層3は、その一部上表面に設けられた第3コンタクト部c3を有し、前記第2配線用基板材11の第2配線層13は、その一部表面に設けられた第4コンタクト部c4を有する。   First, the first wiring layer 3 of the first wiring substrate material 1 has a third contact portion c3 provided on a part of the upper surface thereof, and the second wiring layer 13 of the second wiring substrate material 11 is provided. Has a fourth contact portion c4 provided on a partial surface thereof.

そこで、前記第3配線用基板材1Aは、その第2接着層4aを、前記第1配線用基板材1の上側表面に重ね合わせて貼り合わせるように配置され、その第2層間導電部材5aは、前記第2接着層4a及びこの接着層4aの上側表面に重ね合わされた第3絶縁基板2aを、貫通して設けられている。前記第2層間導電部材5aは、その両端部が、前記第3絶縁基板2aの上側表面に設けられた第3配線層3aの下側表面(内側表面)の第5コンタクト部c5と、前記第3コンタクト部c3とを相互に接続するように形成されている。   Therefore, the third wiring substrate material 1A is arranged so that the second adhesive layer 4a is superposed and bonded to the upper surface of the first wiring substrate material 1, and the second interlayer conductive member 5a is The third insulating substrate 2a overlapped with the second adhesive layer 4a and the upper surface of the adhesive layer 4a is provided. The second interlayer conductive member 5a has fifth contact portions c5 on the lower surface (inner surface) of the third wiring layer 3a provided on the upper surface of the third insulating substrate 2a. The three contact portions c3 are formed so as to be connected to each other.

また、前記第4配線用基板材1Bは、その第3接着層4bを、前記第2配線用基板材11の下側表面に重ね合わせて貼り合わせるように配置され、その第3層間導電部材5bは、前記第3接着層4b及びこの接着層4bの下側表面に重ね合わされた第4絶縁基板2bを、貫通して設けられている。前記第3層間導電部材5bは、その両端部が、前記第4絶縁基板2bの下側表面に設けられた第4配線層3bの上側表面(内側表面)の第6コンタクト部c6と、前記第4コンタクト部c4とを相互に接続するように形成されている。   The fourth wiring board material 1B is arranged so that the third adhesive layer 4b is superposed and bonded to the lower surface of the second wiring board material 11, and the third interlayer conductive member 5b. Is provided penetrating through the third adhesive layer 4b and the fourth insulating substrate 2b superimposed on the lower surface of the adhesive layer 4b. The third interlayer conductive member 5b has sixth contact portions c6 at both ends thereof on the upper surface (inner surface) of the fourth wiring layer 3b provided on the lower surface of the fourth insulating substrate 2b. The four contact portions c4 are formed so as to be connected to each other.

更に、前記第5及び第6配線用基板材1C、1Dは、引用符号の図示を省略するが、いずれも前記第3配線用基板材1Aと同様な接着層、絶縁基板、配線層及び層間導電部材を有する構成となっていて、各接着層を、前記第3及び第4配線用基板材1A、1Bに重ね合わせて貼り付けるように、それぞれ対向配置される。   Further, the fifth and sixth wiring substrate materials 1C and 1D are not shown with reference numerals, but all have the same adhesive layer, insulating substrate, wiring layer, and interlayer conductivity as the third wiring substrate material 1A. Each of the adhesive layers is disposed so as to face each other so as to overlap and adhere to the third and fourth wiring substrate materials 1A and 1B.

ところで、前記第3乃至第6配線用基板材1A乃至1Dの各配線層のパターン形状は、前記第1及び第2配線用基板材1、11の各配線層と異ならせ、各基板材1A乃至1Dの各層間導電路の予定位置は、前記ビア・オン・ビア形に限らず、チップ・オン・ビア形にするなどの回路設計上の要求に応じた様々な異なった位置をとるようにしてもよい。   By the way, the pattern shapes of the wiring layers of the third to sixth wiring substrate materials 1A to 1D are different from the wiring layers of the first and second wiring substrate materials 1 and 11, respectively. The predetermined positions of the 1D interlayer conductive paths are not limited to the via-on-via type, but may take various different positions according to circuit design requirements such as a chip-on-via type. Also good.

前記各配線用基板材1、1A乃至1D及び11は前記重ね合わせ配置状態において、上下から挟むように一括して熱プレスすることによって、図3(b)に示すような一体化された6層配線構造の両面多層形の回路配線基板が得られる。   Each of the wiring board materials 1, 1A to 1D and 11 is integrally pressed as shown in FIG. 3B by hot-pressing in a lump from above and below in the overlapping arrangement state. A double-sided multilayer circuit wiring board having a wiring structure is obtained.

前記第第2及び第3層間導電部材5a、5b等は、各一端部が、図3(a)に示すように、各接着層表面から突出するように形成されていて、前記熱プレスによって前記各層間導電部材の各両端が、対向する各コンタクト部と強固に圧着接続されるようになっている。   Each of the second and third interlayer conductive members 5a, 5b and the like is formed so that each one end protrudes from the surface of each adhesive layer as shown in FIG. 3 (a). Both ends of each interlayer conductive member are firmly crimped and connected to the opposing contact portions.

但し、前記層間導電部材5a、5bの突出端は、各絶縁基板表面上の各配線層の背面の各コンタクト部に突き合わされる関係にあるので、この各配線層の厚さ分その突出高さは前記第1層間層間導電部材5の場合よりもこの各配線層の厚さ分だけ低い寸法としてもよい。勿論、前記熱プレスにより各接着層が圧縮変形することを考慮すれば、図3(a)に示された状態での、前記層間導電部材5a、5b自体の高さ寸法は、各接着層の厚さ寸法と同程度でもよい(前記層間導電部材5a、5bの前記突出がない状態)。   However, since the protruding ends of the interlayer conductive members 5a and 5b are in contact with the respective contact portions on the back surface of the wiring layers on the surfaces of the insulating substrates, the protruding heights corresponding to the thicknesses of the wiring layers. May be smaller than the first interlayer conductive member 5 by the thickness of each wiring layer. Of course, considering that each adhesive layer is compressed and deformed by the hot press, the height of the interlayer conductive members 5a and 5b itself in the state shown in FIG. It may be approximately the same as the thickness dimension (the state in which there is no protrusion of the interlayer conductive members 5a and 5b).

前記他の実施形態によれば、前記6層配線構造の回路配線基板は、その厚さ方向の中央部に位置するコア回路配線基板CBの両面側に、それぞれ配置される絶縁基板と接着層との重ね合わせ体の複数組の各絶縁基板が、コア回路配線基板CBの両面を境にして対称的に配置された構造となり、回路配線基板の反り発生が著しく抑制される。しかも、前記6層配線構造の両面の各最外層が、配線層付き絶縁基板で構成されるために、この場合も両面実装が可能である。   According to the other embodiment, the circuit wiring board having the six-layer wiring structure includes an insulating substrate and an adhesive layer disposed on both sides of the core circuit wiring board CB located at the center in the thickness direction. Each of the plurality of sets of insulating substrates of the superposed body is configured to be symmetrically arranged with respect to both surfaces of the core circuit wiring board CB, and the occurrence of warping of the circuit wiring board is remarkably suppressed. In addition, since the outermost layers on both sides of the six-layer wiring structure are formed of an insulating substrate with a wiring layer, double-sided mounting is also possible in this case.

また、前記第1配線用基板材1と同様な構成の前記前記第3乃至第6配線用基板材1A乃至1Dを前記コア回路配線基板CBの両面に順次重ね合わせ配置しておき、一括熱プレスすることによって、一括で積層されプロセスが簡略化される。   Further, the third to sixth wiring board materials 1A to 1D having the same configuration as the first wiring board material 1 are sequentially stacked on both surfaces of the core circuit wiring board CB, and then batch hot press is performed. By doing so, it is laminated at once and the process is simplified.

前記各配線用基板材1、1A乃至1D及び11の各配線層のパターンニングは、一パターニング作業にまとめて集中的に行え、前記配線用基板材1、1A乃至1Dの各層間導電部材と各コンタクト部との位置合わせは、一位置合わせ作業にまとめて集中的に行える。従って、これら各作業におけるパターンニグ及び位置合わせを各々集中的に制御してそれぞれの精度を向上させることができる。   The patterning of each wiring layer of each of the wiring substrate materials 1, 1A to 1D and 11 can be performed collectively in one patterning operation, and each interlayer conductive member of each of the wiring substrate materials 1, 1A to 1D and each The alignment with the contact portion can be performed in one centralized operation. Accordingly, it is possible to improve the accuracy of each of these operations by intensively controlling the pattern jig and the alignment.

図4は、前記各コンタクト部の改良を示すものであり、例えば第2配線層13の第2コンタクト部c2の表面及び第2絶縁基板12の第3孔h3内面に、前記層間導電部材よりも高い導電度のを有するコンタクト層Cxを、例えば銅を予めメッキすることによって形成しておけば、層間導電路の抵抗が減少し導通が向上する。前記コンタクト層Cxは、前記の例に限らず、前記第1コンタクト部c1や第3乃至第6コンタクト部c3〜c6など全てのコンタクト部に形成してもよく、その場合、層間導電路の導通をより一層向上させることができる。   FIG. 4 shows an improvement of each of the contact portions. For example, the surface of the second contact portion c2 of the second wiring layer 13 and the inner surface of the third hole h3 of the second insulating substrate 12 are more than the interlayer conductive member. If the contact layer Cx having high conductivity is formed by, for example, pre-plating copper, the resistance of the interlayer conductive path is reduced and conduction is improved. The contact layer Cx is not limited to the above example, and may be formed in all contact parts such as the first contact part c1 and the third to sixth contact parts c3 to c6. Can be further improved.

次に、本発明の更に他の実施形態を、図5を参照して説明する。ここで、図1乃至図4における回路配線基板を構成する部分と同様な部分には同一符号を付して、その説明を省略する。   Next, still another embodiment of the present invention will be described with reference to FIG. Here, the same parts as those constituting the circuit wiring board in FIGS. 1 to 4 are denoted by the same reference numerals, and the description thereof is omitted.

この実施形態における回路配線基板は、図3の例と同様に6層配線層構造であるが、大別して、ケーブル部Y、その両側にそれぞれ連結された2つの配線基板部分X1及びX2で構成されている。   The circuit wiring board in this embodiment has a six-layer wiring layer structure as in the example of FIG. 3, but is roughly composed of a cable part Y and two wiring board parts X1 and X2 respectively connected to both sides thereof. ing.

前記各配線基板部分X1及びX2は、基本的には、図3の実施形態同様に、コア回路配線基板CBの両面にそれぞれ第3乃至第6配線用基板材1A乃至1Dを配置して構成されている。   Each of the wiring board portions X1 and X2 is basically configured by arranging third to sixth wiring board materials 1A to 1D on both surfaces of the core circuit wiring board CB, as in the embodiment of FIG. ing.

前記第5配線用基板材1C及び第6配線用基板材1Dの前記ケーブル部Yに対応する各部分は除去されていて、前記第3配線用基板材1Aの第3絶縁基板2a及び前記第4配線用基板材1Bの第4絶縁基板2bは露出された状態となっている。   The portions corresponding to the cable portion Y of the fifth wiring board material 1C and the sixth wiring board material 1D are removed, and the third insulating substrate 2a and the fourth wiring board material 1A of the third wiring board material 1A are removed. The fourth insulating substrate 2b of the wiring board material 1B is exposed.

前記コア回路配線基板CBの第1接着層4の前記ケーブル部Yに対応する部分は除去されていて、前記第1絶縁基板2と第2絶縁基板12との間には空間部AGが形成されている。従って、前記ケーブル部Yは、前記空間部AGを挟んで離間して互いに並行する第1及び第2ケーブル領域y1及びy2により構成されている。前記第1ケーブル領域y1は、第1絶縁基板2、第2接着層4a及び第3絶縁基板2aの積層構造とされ、その内部には前記第1配線層3の一部が配置されている。前記第2ケーブル領域y2は、第2絶縁基板12、第3接着層4b及び第4絶縁基板2bの積層構造とされ、その内部には前記第2配線層13の一部が配置されている。   A portion corresponding to the cable portion Y of the first adhesive layer 4 of the core circuit wiring board CB is removed, and a space AG is formed between the first insulating substrate 2 and the second insulating substrate 12. ing. Accordingly, the cable portion Y is composed of first and second cable regions y1 and y2 that are spaced apart from and parallel to the space portion AG. The first cable region y1 has a laminated structure of a first insulating substrate 2, a second adhesive layer 4a, and a third insulating substrate 2a, and a part of the first wiring layer 3 is disposed therein. The second cable region y2 has a laminated structure of the second insulating substrate 12, the third adhesive layer 4b, and the fourth insulating substrate 2b, and a part of the second wiring layer 13 is disposed therein.

なお、層間導電部材の設置に関しては、図3の実施形態では、全てビア・オン・ビアの形態で示されているが、前記各配線基板部分X1及びX2の図示から分かるように、層間導電部材が設けられていない配線層の部分が存在する。即ち、層間導電部材の設置数及び位置は製品毎の回路設計に応じて適宜選択されるものであり、図示に限定されるものではない。   In addition, regarding the installation of the interlayer conductive member, in the embodiment of FIG. 3, all are shown in the form of via-on-via, but as can be seen from the illustration of the wiring board portions X1 and X2, the interlayer conductive member There is a portion of the wiring layer in which is not provided. That is, the number and positions of the interlayer conductive members are appropriately selected according to the circuit design for each product, and are not limited to the illustration.

このような実施形態によれば、前記各実施形態における発明の効果を有すると共に、特に前記空間部AGの存在により、前記ケーブル部Yの各領域y1及びy2がそれぞれ自在に変曲、屈曲或いは折り曲げし易いために、電子機器筐体内に回路配線基板を容積効率よく収納することができ、部品実装の高密度化がより一層向上する。しかも、前記空間部AGは前記コア回路配線基板CBの第1接着層4の除去によって形成され、簡単なプロセスにより前記ケーブル部Yの柔軟性が得られる。   According to such an embodiment, in addition to the effects of the invention in each of the embodiments, the regions y1 and y2 of the cable portion Y can be freely bent, bent, or bent due to the presence of the space AG. Therefore, the circuit wiring board can be accommodated in the electronic device casing in a volumetric efficiency, and the density of component mounting is further improved. Moreover, the space AG is formed by removing the first adhesive layer 4 of the core circuit wiring board CB, and the flexibility of the cable portion Y can be obtained by a simple process.

本発明の一実施形態に係る回路配線基板を示す断面図で、(a)は配線基板の分解断面図、(b)はその完成断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is sectional drawing which shows the circuit wiring board based on one Embodiment of this invention, (a) is an exploded sectional view of a wiring board, (b) is the completion sectional drawing. 本発明の一実施形態の回路配線基板の製造方法の一実施例を示す工程別断面図である。It is sectional drawing according to process which shows one Example of the manufacturing method of the circuit wiring board of one Embodiment of this invention. 本発明の他の実施形態に係る回路配線基板を示す断面図で、(a)は配線基板の分解断面図、(b)はその完成断面図である。It is sectional drawing which shows the circuit wiring board which concerns on other embodiment of this invention, (a) is an exploded sectional view of a wiring board, (b) is the completion sectional drawing. 本発明の回路配線基板のコンタクト部の一改良例を説明するための断面図である。It is sectional drawing for demonstrating the improvement example of the contact part of the circuit wiring board of this invention. 本発明の更に他の実施形態に係る回路配線基板を示す断面図である。It is sectional drawing which shows the circuit wiring board which concerns on other embodiment of this invention.

符号の説明Explanation of symbols

1、11 第1、第2配線用基板材
1A乃至1D 第3乃至第6配線用基板材
2、12、2a、2b 第1、第2、第3、第4絶縁基板
3、13、3a、3b 第1、第2、第3、第4配線層
4、4a、4b 第1、第2、第3接着層
5、5a、5b 第1、第2、第3層間導電部材
21 絶縁基板材
31 配線層用の導電層(銅箔)
41 第1接着層基材
61 マスキングフィルム
c1乃至c6 第1乃至第6コンタクト部
CB コア回路配線基板
CX コンタクト層
D5 圧潰部
H1 第1貫通孔(ビアホール)
h1乃至h3 第1乃至第3孔
X1、X2 配線基板部分
Y ケーブル部
1, 11 First and second wiring substrate materials 1A to 1D Third to sixth wiring substrate materials 2, 12, 2a, 2b First, second, third, and fourth insulating substrates 3, 13, 3a, 3b First, second, third, fourth wiring layers 4, 4a, 4b First, second, third adhesive layers 5, 5a, 5b First, second, third interlayer conductive member 21 Insulating substrate material 31 Conductive layer (copper foil) for wiring layer
41 1st adhesion layer base material 61 Masking film c1 thru | or c6 1st thru | or 6th contact part CB Core circuit wiring board CX Contact layer D5 Crushing part H1 1st through-hole (via hole)
h1 to h3 first to third holes X1 and X2 wiring board portion Y cable portion

Claims (6)

フィルム状の第1接着層の両面にそれぞれ対称的に重ね合わされた第1及び第2絶縁基板と、
前記第1及び第2絶縁基板の前記第1接着層とは反対の各面にそれぞれ設けられた第1及び第2配線層と、
前記第1及び第2配線層の相対向する各一部分にそれぞれ設けられた第1及び第2コンタクト部と、
前記第1及び第2コンタクト部相互間に前記第1及び第2絶縁基板及び前記第1接着層を貫通して設けられた貫通孔と、
前記貫通孔内に設けられ前記各コンタクト部を相互接続する第1層間導電部材と
を備え、
前記貫通孔は、前記第1絶縁基板を貫通する第1孔、第1接着層を貫通する第2孔、及び第2絶縁基板を貫通する第3孔を有し、前記第3孔は前記第2孔よりも大きな孔径を有し
前記第1層間導電部材の第2コンタクト部との接触面積が第1コンタクト部との接触面積よりも大きいことを特徴とする回路配線基板。
First and second insulating substrates that are symmetrically superimposed on both sides of the film-like first adhesive layer,
First and second wiring layers respectively provided on opposite surfaces of the first and second insulating substrates from the first adhesive layer;
First and second contact portions respectively provided in opposite portions of the first and second wiring layers;
A through hole provided through the first and second insulating substrates and the first adhesive layer between the first and second contact portions;
A first interlayer conductive member provided in the through hole and interconnecting the contact portions ;
With
The through hole has a first hole that penetrates the first insulating substrate, a second hole that penetrates the first adhesive layer, and a third hole that penetrates the second insulating substrate, and the third hole is the first hole. Having a hole diameter larger than 2 holes ,
The circuit wiring board, wherein a contact area of the first interlayer conductive member with the second contact portion is larger than a contact area with the first contact portion .
請求項1に記載の回路配線基板において、The circuit wiring board according to claim 1,
前記第1孔及び前記第2孔が同一孔径で形成され、The first hole and the second hole are formed with the same hole diameter,
前記第1層間導電部材は、導電性樹脂組成物で形成され、前記第2コンタクト部に押し付けられることによって押し潰され、前記第3孔内に膨出した圧潰部を有していることを特徴とする回路配線基板。The first interlayer conductive member is formed of a conductive resin composition, and has a crushing portion that is crushed by being pressed against the second contact portion and bulged into the third hole. Circuit wiring board.
請求項1または2に記載の回路配線基板において、
前記第1及び第2コンタクト部の少なくとも一方と前記第1層間導電部材との間に介在され、前記第1層間導電部材よりも高い導電度を有するコンタクト層を備えたことを特徴とする回路配線基板。
In the circuit wiring board according to claim 1 or 2 ,
A circuit wiring comprising a contact layer interposed between at least one of the first and second contact portions and the first interlayer conductive member and having a conductivity higher than that of the first interlayer conductive member. substrate.
請求項1から3のいずれか1つに記載の回路配線基板において、
前記第1及び第2配線層の各一部表面にそれぞれ設けられた第3及び第4コンタクト部と、
前記第1配線層側及び第2配線層側にそれぞれ重ね合わせられた第2及び第3接着層と、
前記第2及び第3接着層の各表面にそれぞれ重ね合わされた第3及び第4絶縁基板と、
前記第3及び第4絶縁基板の前記各接着層とは反対の各面にそれぞれ設けられた第3及び第4配線層と、
前記第3及び第4コンタクト部にそれぞれ対向して前記第3及び第4配線層の各一部分にそれぞれ設けられた第5及び第6コンタクト部と、
前記第3及び第5コンタクト部相互間に第3絶縁基板及び第2接着層を貫通して設けられた第2層間導電部材と、
前記第4及び第6コンタクト部相互間に第4絶縁基板及び第3接着層を貫通して設けられた第3層間導電部材と
を備えたことを特徴とする回路配線基板。
In the circuit wiring board according to any one of claims 1 to 3 ,
Third and fourth contact portions respectively provided on partial surfaces of the first and second wiring layers;
A second adhesive layer and a third adhesive layer respectively superimposed on the first wiring layer side and the second wiring layer side;
Third and fourth insulating substrates respectively superimposed on the surfaces of the second and third adhesive layers;
Third and fourth wiring layers provided on the surfaces of the third and fourth insulating substrates opposite to the adhesive layers, respectively.
Fifth and sixth contact portions respectively provided in respective portions of the third and fourth wiring layers so as to face the third and fourth contact portions, respectively.
A second interlayer conductive member provided through the third insulating substrate and the second adhesive layer between the third and fifth contact portions;
A third interlayer conductive member provided through the fourth insulating substrate and the third adhesive layer between the fourth and sixth contact portions ;
A circuit wiring board comprising:
第1コンタクト部を有する第1配線層用の導電層が一方の面に設けられた第1絶縁基板の他方の面に第1接着層を重ね合わせ、前記第1コンタクト部に対向する位置に前記第1絶縁基板を貫通する第1孔及び前記第1接着層を貫通して第1孔に連通する第2孔を設け、前記第1及び第2孔に導電性ペーストを充填して一端が前記第1コンタクト部に接続された第1層間導電部材を設けることによって第1配線用基板材を形成する工程と、
一方の面が前記第1接着層に対面配置される第2絶縁基板の他方の面に前記第1コンタクト部に対向する第2コンタクト部を有する第2配線層用の導電層を設け、前記第2コンタクト部に対向する位置に前記第2絶縁基板を貫通し、前記第2孔よりも大きな孔径に形成されている第3孔を設けることによって第2配線用基板材を形成する工程と、
前記第1層間導電部材の他端が前記第2コンタクト部に接触するように前記第1及び第2配線用基板材を相互に重ね合わせて、前記第1接着層両面に前記第1及び第2絶縁基板を対称的に貼り合わせ、前記第1層間導電部材よって前記第1及び第2コンタクト部相互を接続する工程と
を備えたことを特徴とする回路配線基板の製造方法。
A conductive layer for the first wiring layer having the first contact portion is overlaid on the other surface of the first insulating substrate provided on one surface, and the first adhesive layer is overlaid on the surface facing the first contact portion. A first hole penetrating the first insulating substrate and a second hole penetrating the first adhesive layer and communicating with the first hole are provided, the first and second holes are filled with a conductive paste, and one end is Forming a first wiring substrate material by providing a first interlayer conductive member connected to the first contact portion;
A conductive layer for a second wiring layer having a second contact portion facing the first contact portion is provided on the other surface of the second insulating substrate, one surface of which is disposed facing the first adhesive layer, 2 through the second insulating substrate at a position opposite to the contact portion, and forming a second wiring board material by providing a third hole formed in the larger pore diameter than the second hole,
The first and second wiring substrate materials are overlapped with each other so that the other end of the first interlayer conductive member is in contact with the second contact portion, and the first and second layers are disposed on both surfaces of the first adhesive layer. bonding the insulating substrate symmetrically, a step of connecting to the first interlayer conductive member thus said first and second contact portions mutually,
A method for manufacturing a circuit wiring board, comprising:
請求項5に記載の回路配線基板の製造方法において、In the manufacturing method of the circuit wiring board according to claim 5,
前記第1配線用基板材を形成する工程は、前記第1孔及び前記第2孔が同一孔径で形成され、前記導電性ペーストが導電性樹脂組成物であり、前記第1層間導電部材が、前記第1層間導電部材の他端を前記第1接着層から突出させると共に、前記第1層間導電部材の突出高さが前記第2絶縁基板の肉厚寸法よりも大きい高さ寸法で形成され、In the step of forming the first wiring substrate material, the first hole and the second hole are formed with the same hole diameter, the conductive paste is a conductive resin composition, and the first interlayer conductive member is The other end of the first interlayer conductive member is protruded from the first adhesive layer, and the protruding height of the first interlayer conductive member is formed with a height dimension larger than the thickness dimension of the second insulating substrate,
前記第1及び第2コンタクト部相互を接続する工程は、前記第1及び第2配線用基板材を相互に重ね合わせて熱プレスし、前記第1層間導電部材の他端に、前記第2コンタクト部に押し付けられることによって押し潰され、前記第3孔内に膨出した圧潰部を形成することを特徴とする回路配線基板の製造方法。The step of connecting the first and second contact portions to each other includes heat-pressing the first and second wiring substrate materials on top of each other, and connecting the second contact to the other end of the first interlayer conductive member. A method of manufacturing a circuit wiring board, comprising: forming a crushing portion that is crushed by being pressed against a portion and bulged in the third hole.
JP2005244425A 2005-08-25 2005-08-25 Circuit wiring board and manufacturing method thereof Expired - Fee Related JP4824972B2 (en)

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