JP4892924B2 - Multilayer printed wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a multilayer printed wiring board used for a mobile phone, a microminiature portable terminal, etc., a multilayer printed wiring board used for an interposer used when a semiconductor chip is mounted on a bare chip, and a manufacturing method thereof.

  2. Description of the Related Art Conventionally, as this type of multilayer printed wiring board (hereinafter simply referred to as a multilayer board), one having an IVH (inner via hole) formed at an arbitrary position is known (for example, see Patent Document 1).

  From the market, further thinning of the multilayer substrate has been desired. Hereinafter, a multilayer substrate using a film as a means for thinning the multilayer substrate will be described.

FIG. 14 is a cross-sectional view showing an example of a conventional multilayer substrate, which is an example of a multilayer wiring board in which films are laminated using an adhesive. In FIG. 14, a predetermined pattern made of the wiring 12 is formed on the film 10. The plurality of films 10 are bonded together with the copper foil 12 by an adhesive 14. Further, by forming IVH 8 in a necessary portion, the wirings 12 formed in different layers are connected to each other.
JP 2002-353619 A

  However, in the conventional configuration, since the adhesive 14 is used to connect the films 10 to each other, there is a limit to thinning.

  For example, in the case of the configuration shown in FIG. 14, since the wiring 12 is laminated using the film 10 formed on one side, when forming a four-layer multilayer substrate, the adhesive 14 has three layers and the film 10 has four layers. A total of seven layers of thickness was required, making thinning difficult.

  On the other hand, as an application of the configuration shown in FIG. 14, it was considered that two films 10 each having the wiring 12 formed on both surfaces were prepared and adhered with an adhesive 14 to form a four-layer multilayer substrate. In this case, the films 10 having the wirings 12 formed on both surfaces are pasted together with the adhesive 14. However, since the adhesive 14 softens and flows during the bonding, there is a possibility that the facing wires 12 are short-circuited.

  The present invention solves the above-described conventional problems, and an object thereof is to provide a multilayer substrate using a prepreg instead of an adhesive for laminating films.

In order to solve the above-described conventional problems, the present invention has three insulating layers, and the second insulating layer formed as the second layer counted from the surface layer has through-bump electrical connection therethrough. The second-layer wiring formed in the second layer counted from the surface layer and the third-layer wiring formed in the third layer counted from the surface layer are formed in the through-connection layer. A multilayer printed wiring board characterized by being embedded, wherein the through connection layer includes a prepreg containing fibers and through bumps, and is formed in the first and third layers counted from the surface layer. The layer insulation layer and the third insulation layer are both made of a heat-resistant resin film having a thickness of 50 μm or less having an interlayer connection portion formed by using a plating technique, and the total thickness of the prepreg is 60 μm or less. The through bump is made of a thermosetting conductive paste. It is a multilayer printed wiring board that is hardened in a convex shape on the wiring previously formed on the resin film, and double-sided printed wiring boards using a resin film having a wiring pattern formed on the back surface Are pressed and integrated with a prepreg in the middle.

  In the case of the present invention, for example, when a prepreg in which a woven fabric is impregnated with a resin is selected, the films having wirings formed on both sides are bonded to each other through the prepreg, so that even when pressed at high pressure, the prepreg is included. The short circuit between the wirings can be prevented by the woven fabric. In addition, by forming a through hole in the prepreg in advance and filling with a conductive paste, it is possible to form an IVH (inner via hole) at the same time as the adhesion between the double-sided printed wiring boards.

  In the printed wiring board and the manufacturing method thereof according to the present invention, a printed wiring board having IVH can be made extremely thin by laminating using a prepreg instead of an adhesive.

(Embodiment 1)
Hereinafter, the multilayer substrate according to Embodiment 1 of the present invention will be described with reference to the drawings.

  FIG. 1 is a cross-sectional view of a multilayer substrate according to Embodiment 1 of the present invention. In FIG. 1, 102a and 102b are films, 104a and 104b are first wirings, 106a and 106b are second wirings, 108 is an insulating layer, 110 is a through bump, 112 is an interlayer connection portion, 114a and 114b are double-sided substrates, Reference numeral 116 denotes a through connection layer. Here, the first wiring 104a is formed on one surface of the film 102a, and the second wiring 106a is formed on the other surface, and they are connected to each other using the interlayer connection portion 112 to constitute a double-sided substrate 114a. Similarly, in the double-sided substrate 114b, the first wiring 104b and the second wiring 106b are formed on both surfaces of the film 102b and are connected by the interlayer connection portion 112. The through connection layer 116 includes an insulating layer 108 and through bumps 110. The double-sided substrate 114a and the double-sided substrate 114b are connected to each other through a through connection layer 116. Similarly, the second wiring 106 a of the double-sided board 114 a and the second wiring 106 b of the double-sided board 114 b are electrically connected by the through bumps 110. Then, the second wiring 106 a formed on the double-sided substrate 114 a and the second wiring 106 b formed on the double-sided substrate 114 b are both buried in the through connection layer 116. As will be described later, through bump 110 functions as IVH (inner via hole) in the first embodiment.

  In FIG. 1, how to count wiring and insulating layers will be described. When counting FIG. 1 from the top to the bottom, the first insulating layer (which corresponds to the surface layer) counted from the surface layer is the film 102a, and the second insulating layer is counted from the surface layer. The third insulating layer, which is the third layer counted from the surface layer, corresponds to the film 102b. Similarly, the first layer wiring (or the surface layer wiring) of the first layer counted from the surface layer is the first wiring 104a, the second layer wiring counted from the surface layer is the second wiring 106a, and 3 counted from the surface layer. The wiring in the layer corresponds to the second wiring 106b, and the wiring in the fourth layer from the surface layer corresponds to the first wiring 104b. Note that FIG. 1 is a four-layer structure (meaning that there are four electrodes) and is vertically symmetrical, so there is no substantial difference between counting from top to bottom and from bottom to top. Shall in principle be counted from top to bottom.

  Thus, in the first embodiment, as shown in FIG. 1, the electrical connection penetrating through the second insulating layer (insulating layer 108 in FIG. 1) formed as the second layer from the surface layer is connected to the through bump 110. The through-connection layer 116 is formed. The second-layer wiring (second wiring 106a in FIG. 1) formed in the second layer counted from the surface layer and the third-layer wiring (second wiring in FIG. 1) formed in the third layer counted from the surface layer. Wiring 106 b) is embedded in the through connection layer 116.

  In this manner, the through bump 110 made of the through bump can be formed at an arbitrary position of the insulating layer 108 in the first embodiment. As shown in FIG. 1, the insulating layer 108 absorbs the electrode thickness (or the unevenness of the electrodes) of the plurality of double-sided substrates 114a and 114b using the film 102, and at the same time, IVH (inner via hole) including the through bumps 110 is formed. Will form.

  In the first embodiment, a prepreg can be used as the insulating member constituting the through-connection layer 116. Here, as the prepreg, for example, a glass fiber or the like impregnated with a resin is commercially available, but it is not particularly necessary to stick to this. In the present embodiment, any member that is uncured before lamination and cured after lamination can be used as a prepreg. Further, by using fibers (woven fabric, non-woven fabric), fillers described later, and the like as one component of the prepreg, it is possible to prevent a short circuit between the second wirings 106a and 106b during pressing. Such an additive may be in the form of a film, for example, without sticking to fibers or powder.

  A thermosetting conductive paste can be used as a member constituting the through bump 110. As described above, in the present invention, by using the prepreg and the through bump 110, the multilayer substrate can be thinned because no adhesive is used.

  The dimensions of the multilayer substrate are preferably about 300 mm × 500 mm ± 200 mm. If the dimensions are smaller than 100 mm × 300 mm, the number of products to be taken decreases, which may increase the cost. In addition, when the substrate size is larger than 500 mm × 700 mm, the handling property in the process, the influence on the dimensional change, etc. may appear.

  As described above, the through bumps 110 make electrical connection through the second insulating layer (corresponding to the insulating layer 108 in FIG. 1), which is the second layer counted from the surface layer. The second-layer wiring formed in the second layer from the surface layer (in the case of FIG. 1, counting from the top corresponds to the second wiring 106a formed on the double-sided substrate 114a. Similarly, counting from the bottom. Corresponding to the second wiring 106b formed on the double-sided substrate 114b) and the third-layer wiring formed on the third layer from the surface layer (in the case of FIG. 4 is equivalent to the second wiring 106b formed on the double-sided substrate 114a when counted from below, and is connected by the through-connection layer 116. A thin layer of the layer substrate is possible.

(Embodiment 2)
Hereinafter, the manufacturing method of the multilayer substrate in Embodiment 2 of this invention is demonstrated using FIGS. 2 to 4 are cross-sectional views illustrating a method for manufacturing a multilayer substrate according to the second embodiment. The second embodiment is an example of a method for manufacturing a four-layer substrate, and corresponds to an example of the method for manufacturing the four-layer substrate described in the first embodiment.

  FIG. 2 is a cross-sectional view showing an example of a bump manufacturing method using a conductive paste (for example, a thermosetting conductive paste). In FIG. 2, 118 is a first substrate material, 120 is a second substrate material, 122 is a metal plate, 124 is a conductive paste, and 126 is an arrow.

  In FIG. 2A, the first substrate material 118 and the second substrate material 120 are set facing each other while being fixed on the metal plate 122. In addition, a conductive paste 124 is previously spotted (or printed using a metal mask or the like) at a predetermined position on the surface of the first substrate material 118. Then, as indicated by an arrow 126, the first substrate material 118 and the second substrate material 120 are pressed against each other so that the conductive paste 124 is in contact with the second substrate material 120. Thereafter, the first substrate material 118 and the second substrate material 120 are peeled off in the direction of the arrow 126. Then, as shown in FIG. 2B, the conductive paste 124 is stretched in a convex shape to form bumps 128. In this way, the bumps 128 made of the conductive paste 124 are arranged in a predetermined shape. The shape of the bump 128 is preferably a convex shape (preferably a projection shape with a sharp tip). Then, the conductive paste 124 is cured to form bumps 128.

  FIG. 3 is a cross-sectional view showing a state of stacking using bumps. In FIG. 3, reference numeral 130 denotes a prepreg.

  In FIG. 3A, a double-sided substrate 114a has a first wiring 104a and a second wiring 106a formed on both surfaces of a film 102a and is connected to each other via an interlayer insulating portion 112. FIG. 3B shows a state in which bumps 128 are formed on the second wiring 106a of the double-sided substrate 114a. Note that FIG. 2 can be referred to for forming the bump 128.

  Here, it is desirable to use a heat resistant film such as a polyimide film, a polyamide film, or an aramid film as the material of the film 102. By using a high heat-resistant resin film, it is possible to suppress the thermal influence in the soldering process or the like. Further, the thickness of the film 102 is preferably 100 μm or less, particularly 5 μm or more and 50 μm or less (desirably 30 μm or less, more preferably 25 μm or less). By using such an extremely thin heat-resistant film, the total thickness of the completed multilayer substrate can be reduced. In addition, the board | substrate material (for example, CCL mentioned later) which formed copper foil on both surfaces of such a heat resistant film can be selected, without using an adhesive agent. The heat resistance and reliability of the multilayer substrate can be improved by using a heat-resistant film and a copper-clad film with a copper foil adhered without using such an adhesive.

  FIG. 3C shows a state in which the double-sided substrate 114a on which the bumps of FIG. 3B are formed, the prepreg 130, and the second double-sided substrate 114b are aligned with each other. Then, in the aligned state, heat pressing is performed with a vacuum press (the vacuum press is not shown). The sample is taken out after heating and pressurization in vacuum. FIG. 3D corresponds to a cross-sectional view of the sample after hot pressing in this way.

  When a vacuum press or the like is used, the sample is heated with a predetermined temperature profile, so that the prepreg 130 is softened and cured, and changes to the insulating layer 108. When the prepreg 130 is softened, the second wiring 106a formed on the first double-sided substrate 114a is buried to absorb the wiring thickness. Then, the prepreg 130 is cured in a state where the wiring thickness is absorbed, and becomes the insulating layer 108 to firmly fix the double-sided substrate 114a. At the same time, the bump connection layer 110 is formed by breaking through the prepreg 130 in which the bump 128 is softened (or through a gap between fibers). In this manner, the thickness (or unevenness due to the thickness) of the second wirings 106a and 106b can be reduced (or flattened).

  This will be described in more detail. First, as an example of the prepreg, a commercially available glass epoxy product (glass fiber used as a woven fabric and impregnated with an epoxy resin) was used. Next, a double-sided copper foil-clad film was prepared. Specifically, a polyimide film (thickness 10 μm) having a copper foil stretched on both sides without using an adhesive was used. Specifically, it is desirable to use a commercially available CCL (Copper Clad Laminate). Next, the copper foil part of the said double-sided copper-clad film was processed into the predetermined pattern, and it was set as the double-sided board 114a of FIG. 3 (A). It is desirable to select a CCL that does not use an adhesive. By selecting such a double-sided copper-clad film that does not use an adhesive (for example, a film that uses a thin film method as a base or the like), problems caused by the adhesive can be prevented.

  Then, bumps 128 were formed thereon as shown in FIG. 2, and as shown in FIG. 3C, the double-sided substrates 114a and 114b were aligned by a predetermined jig (not shown). Then, it was pressed and integrated at a predetermined temperature for a predetermined time. At this time, a vacuum press may be used as necessary. In addition, by setting the pressing conditions such that the prepreg 130 is softened and then hardened, the second wiring 106 a and the second wiring 106 b are electrically connected through the prepreg 130 with the bumps 128 softened.

  In this way, an ultrathin multilayer substrate as shown in FIG. Here, by reducing the thickness of the films 102a, 102b and the prepreg 130 (for example, 40 μm → 20 μm → 10 μm), the total thickness is 100 μm or less (or 60 μm or less, or even 30 μm or less). Can be manufactured.

  As described above, the through-connection layer 116 in which the electrical connection of the second-layer second insulating layer (or the portion penetrating the insulating layer), which is counted from the surface layer of the four-layer printed wiring board, is the through-bump 110. And a second-layer wiring provided in the second layer counted from the surface layer (in FIG. 1, when counted from the top, it corresponds to the second wiring 106a formed on the double-sided substrate 114a. From the top layer in FIG. 1 (corresponding to the second wiring 106b formed on the double-sided substrate 114b) and the third-layer wiring provided in the third layer from the surface layer. The second wiring 106b formed on the substrate 114b corresponds to the second wiring 106a formed on the double-sided substrate 114a when counted from below, and is embedded in the through-connection layer 116. 4 characterized by Able to create a printed wiring board.

  The “second insulating layer as the second layer counted from the surface layer of the four-layer printed wiring board” corresponds to the insulating layer 108 in FIG. The first insulating layer, which is the first layer counted from the top surface of the four-layer printed wiring board, corresponds to the film 102a in FIG. “Second-layer wiring provided from the surface layer to the second layer” is buried on the insulating layer 108 (or through-connection layer 116) side of the wiring provided on the film 102a when FIG. 1 is counted from the top. This corresponds to the formed wiring, that is, the second wiring 106a. Similarly, the “third-layer wiring provided from the surface layer to the third layer” is formed on the double-sided substrate 114b when counted from top to bottom in FIG. 1, and is on the through-connection layer 116 (or insulating layer 108) side. This corresponds to the second wiring 106a buried in.

  The softening temperature of the resin constituting the prepreg 130 is lower than the glass transition temperature of the resin constituting the bump 128 (the difference in glass transition temperature is preferably 10 ° C. or more, more preferably 20 ° C. or more. The difference in glass transition temperature is If it is less than 10 ° C., the penetrability may be affected), so that the prepreg 130 can be stably penetrated.

  Further, in the second embodiment, both the “second layer counted from the surface layer” and the “third layer counted from the surface layer” wiring (corresponding to the second wirings 106a and 106b in FIG. 1) are both penetrated similarly. Since it can be buried in the connection layer 116, it can be mounted on chip parts and semiconductor chips that require smoothness and flatness of the substrate surface during mounting (including bare chip mounting using bumps, and further including an interposer). Enhanced.

  FIG. 4 is a cross-sectional view showing a state in which bumps are formed on both double-sided substrates 114a and 114b, and corresponds to FIG. In FIG. 4, bumps 128 are formed on both the second wiring 106a of the double-sided substrate 114a and the second wiring 106b of the double-sided substrate 114b. Here, by using the method described with reference to FIG. 2 for forming the bumps 128, the bumps 128 can be formed at a predetermined position on a plurality of double-sided substrates at a time. Then, as shown in FIG. 4, bumps 128 are formed with the prepreg 130 interposed therebetween, and the double-sided substrates 114a and 114b are laminated by a vacuum press device (not shown). Then, the bump 128 penetrates through the prepreg 130 to form a through connection layer 116.

  In FIG. 4, the woven fabric included in the prepreg 130 prevents the second electrodes 106 a and 106 b facing each other from contacting and short-circuiting at a portion where the bump 128 is not formed.

  As described above, as shown in FIG. 3, the bump forming process for forming the bump 128 on the second wiring 106a, and the insulating layer 108 made of the prepreg 130 is penetrated by the through bump 110 to form the through connection layer 116. A through-connecting layer forming step, a double-sided substrate forming step of forming double-sided substrates 114a and 114b, a laminating step of laminating the double-sided substrates 114a and 114b on the front and back surfaces of the through-connecting layer 116, and hot pressing the laminate. It is possible to manufacture a printed wiring board having four or more layers by providing at least a hot pressing step for processing.

(Embodiment 3)
Hereinafter, a multilayer substrate according to Embodiment 3 of the present invention will be described with reference to the drawings. The difference between the first embodiment and the third embodiment is the number of films used for multilayering (two in the first embodiment, three in the second embodiment).

  FIG. 5 is a cross-sectional view of the multilayer substrate in the third embodiment. In FIG. 5, double-sided substrates 114a, 114b, and 114c using a film are bonded to each other using two through-connection layers 116a and 116b. Then, the second wiring 106 a formed on the surface of the double-sided substrate 114 a and the second wiring 106 b formed on the surface of the double-sided substrate 114 b are electrically connected by the through bumps 110. Similarly, the second wiring 106d formed on the double-sided substrate 114c and the second wiring 106c formed on the double-sided substrate 114b are electrically connected by the through bumps 110.

  Thus, by integrating the three double-sided boards 114a, 114b, and 114c (calculating the total number of wiring layers, 2 wiring lines × 3 = 6 layers) using the through connection layers 116a and 116b, Of the total six wiring layers, the wiring thickness of four layers can be embedded and absorbed in the through-connection layers 116a and 116b, and further thinning is possible.

  The through connection layers 116 a and 116 b are composed of the insulating layer 108 and the through bumps 110. Here, the through bumps 110 are those in which a predetermined insulating member is penetrated by the bumps 128.

  A prepreg can be used as an insulating member constituting the through connection layer 116. Further, it is desirable to use a curable conductive paste 124 as a conductive member that constitutes the through bump 110. As described above, in the present invention, by using the prepreg 130 and the curable conductive paste 124, a multilayer substrate can be configured without using an adhesive, so that the multilayer substrate can be significantly thinned.

  As described above, as the electrical connection between the second insulating layer (insulating layer 108 in FIG. 3) of at least one surface layer of the printed wiring board having five or more layers, the through bump 110 is provided. Second-layer wiring provided in the second layer from at least one surface layer (counting from the top in FIG. 5 corresponds to the second wiring 106a formed on the double-sided substrate 114a. Similarly, counting from the bottom , Corresponding to the second wiring 106d formed on the double-sided substrate 114c) and the third-layer wiring provided on the third layer from the surface layer (when counted from the top in FIG. 5, formed on the double-sided substrate 114b). The second wiring 106b corresponds to the second wiring 106c formed on the double-sided substrate 114b when counted from the bottom, and is embedded in the through-connection layer 116, so that there are five or more layers. Multi-layer print The line substrate may be formed into a thin layer.

  Here, “the through connection layer in which the electrical connection between the second insulating layer from the surface layer to the second layer is a conductive paste” refers to the through connection layers 116 a and 116 b in FIG. 5. Further, the first insulating layer as the first layer counted from the surface layer corresponds to the films 102a and 102b in FIG. The “second-layer wiring provided in the second layer counted from the surface layer” corresponds to the second wiring 106a formed in the double-sided substrates 114a and 114c and embedded in the through-connection layer 116a in FIG. The “third-layer wiring provided in the third layer from the surface layer” means the second wiring formed on both surfaces of the double-sided substrate 114b in FIG. This corresponds to the wiring 106b side.

(Embodiment 4)
Hereinafter, the manufacturing method of the multilayer substrate in Embodiment 4 of this invention is demonstrated, referring drawings. 6 and 7 are cross-sectional views for explaining a method of manufacturing a multilayer substrate in the fourth embodiment. Embodiment 4 is an example of a manufacturing method in which a plurality of films are used to form a multilayer, and for example, an example of a manufacturing method of a multilayer substrate in Embodiment 3 is shown.

  First, bumps 128 are formed on the surface of the double-sided substrate 114a as shown in FIG. 6A to obtain the state shown in FIG. In FIG. 6B, a first wiring 104 a and a second wiring 106 a are formed on the surface of the film 102 a and are electrically connected through the interlayer connection portion 112. As the film 102a, it is desirable to use a film member having a high strength and a low coefficient of thermal expansion, such as a polyimide film, a polyamide film, or an aramid film. By using the resin film 102a having a small thermal expansion coefficient (particularly a thermal expansion coefficient close to that of silicon), it is possible to cope with bare chip mounting of a semiconductor chip. The thickness of the films 102a, 102b, 102c is preferably 100 μm or less, particularly 5 μm or more and 50 μm or less (desirably 30 μm or less, more preferably 25 μm or less). By using such an extremely thin heat-resistant film, the total thickness of the completed multilayer substrate can be reduced. In addition, the board | substrate material (for example, CCL) which formed copper foil on both surfaces of such a heat resistant film, without using an adhesive agent can be selected. Since the heat resistance of the multilayer substrate can be enhanced by using a heat-resistant film and a copper-clad film in which a copper foil is bonded without using such an adhesive, mounting with lead-free solder is easy.

  FIG. 6C illustrates a state in which the prepreg 130 and the plurality of double-sided substrates 114a, 114b, and 114c are aligned with each other. Bumps 128 are formed on the surface of the second wiring 106a.

  6D is a cross-sectional view showing a state after the prepreg 130 of FIG. 6C and the double-sided substrates 114a, 114b, and 114c are integrated with each other. Specifically, the samples in the state shown in FIG. 3D are brought into close contact with each other using a vacuum press or the like, and heated with a predetermined temperature profile, whereby the prepreg 130 is softened and hardened. 108. At the same time, the softened prepreg 130 is penetrated by the bump 128 (or via a woven fabric), and electrically connects the second wirings 106a and 106b to each other.

  This will be described in more detail. For example, an aramid epoxy type can be selected as the prepreg. Next, a double-sided copper foil-clad film was prepared. Specifically, an aramid film (thickness: 10 μm) having a copper foil stretched without using an adhesive was used. Commercially available CCL (Copper Clad Laminate) can be used for such a member. Next, the copper foil part of the said double-sided copper-clad film was processed into the predetermined pattern, and it was set as the double-sided board | substrate 114a of FIG. 6 (A). It is desirable to select a CCL that does not use an adhesive. In this way, by selecting a material that does not use an adhesive for joining copper foils in a double-sided copper-clad film (for example, a material that uses a thin film method as a base or the like), problems caused by the adhesive can be prevented.

  Next, as shown in FIG. 6C, the prepreg 130 and the double-sided substrates 114a, 114b, 114c on which the bumps 128 are formed are alternately stacked and aligned. After that, pressing is performed for a predetermined time at a predetermined temperature to integrate. At this time, a vacuum press may be used if necessary. Further, by setting this pressing condition as a condition in which the prepreg 130 is softened → cured, it can be integrated as a multilayer printed wiring board. At the same time, the bump 128 penetrates (or through) the softened prepreg 130 and electrically connects the second wirings 106a and 106b.

  Thus, an extremely thin multilayer substrate as shown in FIG. Here, by reducing the thickness of the films 102a, 102b, 102c and the prepreg 130 (for example, 40 μm → 20 μm → 10 μm), the total thickness is 100 μm or less (or 60 μm or less, or even 30 μm or less). A substrate can be manufactured.

  FIG. 7 is a cross-sectional view illustrating a case where bumps are formed on both sides of a double-sided board. The difference between FIG. 7 and FIG. 6C is the bump formation position (or the number of formation surfaces). If necessary, as shown in FIG. 7, by inserting bumps 128 from both sides of one prepreg 130, penetration by the bumps of the prepreg 130 can be ensured, and the yield of interlayer connection by the through connection layer 116 can be increased. .

  In addition, even when the second wirings 106a, 106b, 106c, and 106d where the bumps 128 are not formed are strongly pressed against each other by a vacuum press or the like, they are not short-circuited by the woven fabric constituting the prepreg 130. .

  As shown in FIG. 6, the electrical connection that penetrates through the second insulating layer (second wiring 106 a sandwiched between the double-sided substrate 114 a and the insulating layer 108) formed as the second layer from at least one surface layer. Has a through-connection layer 116a that is a through-bump 110, and a second-layer wiring (second wiring 106a) formed in the second layer counted from at least one surface layer, and formed in the third layer counted from the surface layer. The third-layer wiring (second wiring 106b) thus formed is embedded in the through-connection layer 116, so that a multilayer printed wiring board having five or more layers can be thinned.

(Embodiment 5)
Hereinafter, a multilayer substrate according to Embodiment 5 of the present invention will be described. FIG. 8 is a cross-sectional view of the multilayer substrate according to the fifth embodiment. The difference between the fifth embodiment and the third embodiment is that the central portion is a two-layer substrate (third embodiment), and the central portion is a multilayer substrate having three or more layers (the fifth embodiment). In the fifth embodiment, various types of multilayer substrates are formed by using various substrates other than the double-sided substrate using a film or the like.

  In FIG. 8, 132 is a multilayer substrate, and 134 is an interlayer insulating layer. The multilayer substrate 132 includes a wiring 104 that is interlayer-insulated by an interlayer insulating layer 134 and an interlayer connection portion 112 that connects the wiring 104, and second wirings 106b and 106c are formed on the surface thereof. In FIG. 8, wirings (second wirings 106b and 106c) formed on the surface of the multilayer substrate 132 are both embedded in the through-connection layers 116a and 116b. Similarly, the second wiring 106a and the second wiring 106d formed on the surfaces of the films 102a and 102b are embedded in the through-connection layers 116a and 116b.

  Then, the second wiring 106 a on the double-sided substrate 114 a and the second wiring 106 b on the multilayer substrate 132 are buried in the through connection layer 116 a and electrically connected by the through bumps 110. Similarly, the second wiring 106 d on the double-sided substrate 114 b and the second wiring 106 c on the multilayer substrate 132 are connected by the through bumps 110.

  In this way, with the multilayer substrate 132 as the center, the double-sided substrates 114a and 114b are formed on both sides (or both sides) of the multilayer substrate 132, and the wiring thickness is absorbed and the interlayer connection is made by using the through connection layer 116. In the fifth embodiment, since no adhesive is used, problems due to the adhesive do not occur, and the thickness can be reduced by not using the adhesive.

(Embodiment 6)
In the sixth embodiment, a method for manufacturing a multilayer substrate will be described in more detail with reference to FIGS. 9 to 11 are cross-sectional views for explaining a method for manufacturing a multilayer substrate in the sixth embodiment, and correspond to, for example, the method for manufacturing the multilayer substrate in FIG. 8 described in the fifth embodiment.

  First, as shown in FIG. 9A, a double-sided substrate 114a is prepared. Next, as shown in FIG. 9B, bumps 128 are formed on the second wiring 106a of the double-sided substrate 114a.

  A multilayer substrate 132 is prepared as shown in FIG. FIG. 9C is a cross section of the multilayer substrate 132. The multilayer substrate 132 includes an interlayer insulating layer 134, an interlayer connection 112, and the first wiring 104. Then, the first wirings 104 formed in different layers are connected to each other through the interlayer connection portion 112 formed in the interlayer insulating layer 134.

  FIG. 9D is a cross-sectional view showing a state in which the multilayer substrate 132 and the double-sided substrates 114 a and 114 b are connected by the prepreg 130. In FIG. 9D, bumps 128 are formed on the side of the double-sided substrates 114a, 114b facing the prepreg 130. The bump 128 penetrates the prepreg 130 and makes an interlayer connection.

  FIG. 9E is a cross-sectional view showing a state after the members of FIG. 9D are heated and integrated. The second wirings 106a, 106b, 106c, 106d are buried in the prepreg 130 by this heating press. Here, using a vacuum press (or vacuum heating press), the prepreg 130 is softened by heating with a predetermined temperature profile, and the second wirings 106a, 106b, 106c, and 106d are placed in the prepreg 130. Then, the prepreg 130 is cured to form the insulating layer 108. At this time, the bump 128 penetrates the softened prepreg 130 and electrically connects the second wirings 106 a and 106 b or the second wirings 106 c and 106 d to form the through bump 110.

  This will be described in more detail. First, a commercially available product (thickness 30 μm, glass epoxy type) was used as the prepreg. Next, a double-sided copper foil-clad film was prepared. Specifically, a polyimide film (thickness 10 μm) having a copper foil stretched on both sides without using an adhesive was used. As such, a commercially available CCL (Copper Clad Laminate) can be used. Next, the copper foil part of the said double-sided copper-clad film was processed into the predetermined pattern, and it was set as the double-sided board 114a of FIG. 9 (A).

  Next, as shown in FIG. 9 (D), they were pressed and integrated at a predetermined temperature for a predetermined time. At this time, a vacuum press may be used as necessary. In this way, an ultrathin multilayer substrate as shown in FIG.

  Next, the prepreg will be described. Here, the prepreg (pre-impregnated sheet material) is a fiber material (or woven fabric) impregnated with an active resin, and since it is not completely cured yet, it can be cured by hot press or the like. Is. Further, as described later, fibers may be added to the prepreg. By doing so, dimensional variations in molding can be suppressed, and the strength of the completed multilayer substrate can be increased. As the resin to be impregnated, it is desirable to use a thermosetting resin. As the thermosetting resin, an epoxy resin or an imide resin can be used. As the fiber material (or woven fabric), glass fiber, imide, polyamide such as aromatic, aramid or the like can be used.

  The curing temperature of the prepreg is desirably in the range of 85 ° C to 220 ° C. When the temperature is 230 ° C. or higher, resin curing varies, which may affect dimensionality. When the temperature is lower than 85 ° C., the resin curing time increases, which may affect the cured state. In particular, when the thickness of the film is as thin as 50 μm or less, it is desirable to cure the prerig in a temperature range of 180 ° C. or higher and 220 ° C. or lower. By doing so, the second wiring 106 formed on the prepreg 130 side among the wirings formed on the surface of the double-sided substrate 114 can be buried in the prepreg 130 (or in the thickness of the prepreg).

  The pressure range is preferably 2 MPa (megapascal, unit of pressure) or more and 6 MPa or less. When the pressure is less than 2 MPa, there is a possibility that the adhesion of the multilayer substrate shown in FIG. The pressure application time is preferably 1 minute or more and less than 3 hours. When the pressure application time is less than 1 minute, variations due to pressing may occur. Further, when the pressing time exceeds 3 hours, the productivity is affected. For this reason, the pressure is preferably 2 MPa or more and 6 MPa or less (particularly 4 MPa or more and 6 MPa or less). In the case of a general multilayer substrate, it is often laminated at 2 to 3 MPa. However, in this embodiment, as the film becomes thinner, there is a possibility that the thickness of the through bump 110 and the prepreg 130 may be affected. Therefore, it is desirable to increase the stacking pressure when using the through bumps 110 to about 5 MPa (for example, 4 MPa to 6 MPa).

  This will be described more specifically. First, as the fiber-impregnated prepreg, a fiber prepreg having a size of about 50 cm square and a thickness of 50 μm and having an aramid fiber embedded in an epoxy resin (before curing) was selected. Then, this fiber-impregnated prepreg (prepreg formed by impregnating a fiber with a resin) was press-heated and pressure-bonded by a press device using a double-sided substrate on which a large number of bumps 128 were formed, and integrated. The press conditions are the press program optimized by the inventor in advance (the temperature automatically increases from room temperature to around 200 ° C and then gradually decreases to room temperature, and the pressure is changed with time. Can be used to make stable products.

  FIG. 10 is a cross-sectional view illustrating a case where bumps are formed on both surfaces of a multilayer substrate. The difference between FIG. 10 and FIG. 9D is the bump formation position (or formation surface). As shown in FIG. 10, by forming the bumps 128 on the double-sided substrate side, the bumps are formed on the multilayer substrate side instead of the ultra-thin film, so that the substrate with bumps can be easily handled.

  FIG. 11 shows an example in which bumps are formed on both the multilayer substrate and the double-sided substrate. In this way, the bump 128 is formed so as to face both sides of the prepreg 130, and the bump 128 is inserted from both sides, so that the penetration of the prepreg 130 by the bump is ensured and the variation of the bump 128 (thickness, shape, position, Therefore, the yield of interlayer connection by the through connection layer 116 can be increased.

(Embodiment 7)
Next, Embodiment 7 will be described with reference to FIG. In the seventh embodiment, a case where interlayer connection and surface layer wiring are formed using a blind via formed in the surface layer will be described.

  FIG. 12 is a cross-sectional view illustrating a method for manufacturing a multilayer substrate according to Embodiment 7, which is an example of the method for manufacturing a multilayer substrate described in Embodiment 6, for example, Embodiment 1 or Embodiment 3 Is also applicable. Particularly in the seventh embodiment, the electrode on the surface layer of the multilayer substrate (the insulating base material forming the first insulating layer as the first layer counted from the surface layer is a resin film, and the first layer as counted from the surface layer is the first layer) The feature of the present invention resides in that the interconnecting portion connected to the wiring) and the wiring connected to the wiring are integrated using a plating technique, and a finer pattern can be formed with higher performance.

  First, in FIG. 12, 136 is a blind via, and 138 is a metal film. First, description will be made with reference to FIG. FIG. 12A is a cross-sectional view of a multilayer substrate whose surface layer is a film. In FIG. 12A, a multilayer substrate 132 including an interlayer insulating layer 134, a first wiring 104a, and an interlayer connection portion 112 is formed at the center. Then, the second wiring 106b on the side facing the insulating layer 108 of the multilayer substrate 132 is a second wiring formed on the side facing the insulating layer 108 of the film 102 through the through bumps 110 as necessary. 106a is connected. In this way, the second wiring 106 b formed on the surface of the multilayer substrate 132 and the second wiring 106 a formed on the film 102 are electrically connected via the through bumps 110.

  Both surfaces of the multilayer substrate shown in FIG. 12A are covered with a film 102. Next, with reference to FIG. 12B to FIG. 12D, the manner in which wirings and the like are formed on the surface of the film 102 will be described in cross section.

  FIG. 12B is a cross-sectional view after holes are formed in the film 102 formed on both surfaces of the multilayer substrate shown in FIG. In FIG. 12B, a blind via 136 is formed in the film 102 of the surface layer, and the second via formed on the insulating layer 108 side of the film 102 in the blind via 136 (or the bottom of the blind via 136). The wirings 106a and 106d are exposed.

  FIG. 12C is a cross-sectional view showing a state in which a metal film is formed so as to fill the blind via on the film. In FIG. 12C, the metal film 138 is formed on the surface of the film 102, so that the blind via 136 is also covered with the metal film 138 at the same time. Note that the metal film 138 can be formed by a plating method, a thin film method, or the like. The metal film 138 may be formed on both sides of the substrate as shown in FIG. 12C, but may be formed only on one side as necessary. The metal film 138 formed so as to cover the blind via 136 in this way is electrically connected to the second wirings 106 a and 106 d formed on the insulating layer 108 side of the film 102.

  FIG. 12D shows a cross-sectional view after the metal film 138 is formed into a predetermined pattern by etching or the like. As shown in FIG. 12D, when the metal film 138 is patterned into a predetermined shape, the portion of the metal film 138 covering the blind via 136 also leaves the via fill (or via filling material) as it is, and the first wiring 104 is left. And Thus, the first wiring 104 is also electrically connected to the second wiring 106 through the blind via 136.

  As shown in FIGS. 12C and 12D, by forming the metal film 138 on the blind via 136, electrical connection of the first insulating layer of the first layer counted from the surface layer ( In other words, the first wiring 104 and the second wiring 106 can be electrically connected through the blind via 136 formed in the film 102), and therefore, interlayer connection with low wiring resistance is possible.

(Embodiment 8)
In the eighth embodiment, a case where a thin film method (or a combination of a thin film method and a plating method) is used instead of the plating method will be described. The difference between the eighth embodiment and the seventh embodiment is only the difference between the thin film method (Embodiment 8) and the plating method (Embodiment 7), and there are many common points, which will be described with reference to FIG.

First, as the formation of the blind via 136 shown in FIG. 12A, a laser device such as YAG or CO ₂ can be used. As a method of forming the metal film 138 on the surface of the blind via 136 or the like, first, a base layer (sometimes called a seed layer) such as NiCr is formed about 10 to 50 mm, and copper is electroplated thereon. Also good. Alternatively, copper may be electrolessly plated on the film without the seed layer. Alternatively, copper may be deposited (deposited) directly on the film using a thin film method (electron beam, sputtering, etc.). In these cases, if the thickness is 10 mm or more (desirably, a degree of conductivity that can be used for electroplating is obtained), the thickness required for wiring by electroplating copper on the conductivity is used. (For example, about 5 to 30 μm, and about 3 to 15 μm when thinning is required). Thus, by using a seed layer (or metal base) or devising a method for forming a metal film, the adhesion of the member to the film 102 can be enhanced.

  In this way, at least one of the wirings provided in the first layer and the second layer counted from the surface layer is fixed to the first insulating layer as the first layer counted from the surface layer through the sputtered film. The adhesion of the metal film 138, the first wiring 104, the second wiring 106, etc. to the surface of the film 102 can be improved.

(Embodiment 9)
The ninth embodiment will be described with reference to FIG. FIG. 13 is a cross-sectional view for explaining a method for manufacturing a multilayer substrate according to the ninth embodiment. In FIG. 13, reference numeral 140 denotes a base electrode layer. The difference between the eighth embodiment (FIG. 12) and the ninth embodiment (FIG. 13) is the presence or absence of the base electrode layer 140 on the film surface.

  First, as shown in FIG. 13A, when copper is used for the base electrode layer 140 on at least the exposed surfaces of the films 102a and 102b, the adhesion to the films 102a and 102b can be further enhanced by using the base electrode layer 140. . If necessary, a thin film such as NiCr or Cr can be further used for the base electrode layer 140 (the base electrode layer may be a single layer or a plurality of layers). In this case, about 10 to 50 mm may be formed, and copper may be electroplated thereon. If the thickness is about 10 mm or more and about 1 μm, copper is formed on the conductive film to a thickness necessary for the wiring (for example, 5 to 30 μm, and if thinning is required, about 3 to 15 μm is desirable). be able to. Thus, the adhesion to the film 102 can be enhanced by using the base electrode layer 140.

  As shown in FIG. 13B, the blind via 136 can be formed on the film 102 together with the base electrode layer 140 using a laser or the like. After that, the first wiring 104 and the interlayer connection 112 can be formed with a predetermined thickness in the same manner as in FIG.

(Embodiment 10)
In Embodiment 10, a case where a resin film in which an inorganic filler is added to an insulating layer is used will be described. The difference between the second embodiment (glass epoxy prepreg) and the sixth embodiment (aramid-containing prepreg) and the ninth embodiment (with inorganic filler) is the content of the prepreg (which is an additive). Similarly, a thermosetting resin film (prepreg state before main curing) can be used as the resin film. Since Embodiment 10 has many parts in common with Embodiment 2 and Embodiment 9, FIGS. 2 and 13 can be referred to.

  The inorganic filler added to the prepreg is preferably ceramic insulating powder such as alumina or silica. By adding an inorganic filler in advance to the prepreg in this way, the prepreg flows too much during hot pressing. (If the prepreg flows too much, the bump 128 penetrates into the scallop, resulting in variations in the total thickness of the multilayer substrate. Cause). Thus, in order to suppress softening and fluidization of the prepreg during hot pressing with a certain amount, 10 to 85 wt% (preferably 20 to 80 wt%, preferably 40 to 60 wt% when higher accuracy is required). %), It is desirable to add. Here, when the amount of the inorganic filler added is too small, the second wiring 106 can be easily buried, but the penetrating connection layer 116 may be affected. Further, when the amount of the inorganic filler added is too large, the through-connection layer 116 does not flow during hot pressing (or is difficult to shift or flow in an undesired direction), which may affect the burying property of the second wiring. (For example, the unevenness of the second wiring cannot be absorbed). Therefore, it is desirable to adjust the type, grade, and product number (for example, increase or decrease the glass transition temperature) of the thermosetting resin used in Embodiment 9 according to the thickness of the wiring, the bump formation density, and the like.

  The average particle size of the inorganic filler to be added is desirably 0.5 μm or more and 5 μm or less. When the thickness is less than 0.5 μm, the BET (specific surface area) becomes too large, which may be difficult to handle. If it exceeds 5 μm, it may affect the thinning of the multilayer substrate.

(Embodiment 11)
In the eleventh embodiment, a case where a thermosetting resin is used for the through connection layer will be described. As described in the tenth embodiment, it is not necessary to limit the insulating member constituting the through connection layer to the prepreg. A thermoplastic resin film may be used, but a thermoplastic resin having high functionality and high strength such as LCP (liquid crystal polymer resin) can also be used. By using such a high-strength thermoplastic resin, a highly accurate multilayer substrate can be manufactured.

  Further, it is desirable that the surface of the wiring connected to the through connection layer is subjected to a roughening treatment. By roughening the surface of the wiring in this way, the adhesion strength to the through connection layer 116 as well as the wiring can be increased. Here, as the surface roughening treatment of the wiring (particularly the second wiring 106), it is desirable to use a plating method (additive method). If the subtract method (etching method) is used here, the conductivity may be affected by the etching of the wiring.

  The prepreg 130 is not limited to the presence or absence of a woven fabric (or non-woven fabric or fiber) and the presence or absence of a filler as long as the prepreg 130 is cured as an insulator. Alternatively, it is sufficient if insulation can be prevented at the time of heat curing, and an appropriate short prevention member (for example, a film) can be selected instead of the woven fabric.

  As described above, the multilayer substrate and the manufacturing method thereof according to the present invention can produce an ultrathin multilayer substrate that has never been obtained by combining a film and a multilayer substrate. Therefore, various electronic devices and portable devices can be reduced in size and thickness. It can also be applied to the purpose of conversion.

Sectional drawing of the multilayer substrate in Embodiment 1 of invention Sectional drawing explaining the manufacturing method of the multilayer substrate by Embodiment 2 Sectional drawing explaining the manufacturing method of the multilayer substrate by Embodiment 2 Sectional drawing explaining the manufacturing method of the multilayer substrate by Embodiment 2 Sectional drawing of the multilayer substrate in Embodiment 3. Sectional drawing explaining the manufacturing method of the multilayer substrate in Embodiment 4 Sectional drawing explaining the manufacturing method of the multilayer substrate in Embodiment 4 Sectional drawing of the multilayer substrate of Embodiment 5. Sectional drawing explaining the manufacturing method of the multilayer substrate in Embodiment 6 Sectional drawing explaining the manufacturing method of the multilayer substrate in Embodiment 6 Sectional drawing explaining the manufacturing method of the multilayer substrate in Embodiment 6 Sectional drawing explaining the manufacturing method of the multilayer substrate of Embodiment 7 Sectional drawing explaining the manufacturing method of the multilayer substrate of Embodiment 9. Sectional drawing which shows an example of the conventional multilayer substrate

Explanation of symbols

DESCRIPTION OF SYMBOLS 102 Film 104 1st wiring 106 2nd wiring 108 Insulating layer 110 Through-bump 112 Interlayer connection part 114 Double-sided board 116 Through-connection layer 118 1st board | substrate material 120 2nd board | substrate material 122 Metal plate 124 Conductive paste 126 Arrow 128 Bump 130 Prepreg 132 Multilayer substrate 134 Interlayer insulating layer 136 Blind via 138 Metal film 140 Base electrode layer

Claims (4)

The second insulating layer, which has three insulating layers and is formed as the second layer counted from the surface layer, is a through connection layer in which the electrical connection penetrating the insulating layer is a through bump, and is counted from the surface layer. A multilayer printed wiring board characterized in that a second layer wiring formed in the second layer and a third layer wiring formed in the third layer counted from the surface layer are embedded in the through connection layer The through connection layer is composed of a prepreg containing fibers and through bumps,
The first insulating layer and the third insulating layer formed on the first and third layers counted from the surface layer are both heat-resistant with a thickness of 50 μm or less having an interlayer connection portion formed by using a plating technique. Made of resin film,
The total thickness of the prepreg is 60 μm or less,
The said through bump is a multilayer printed wiring board which consists of a thermosetting conductive paste, and was hardened in convex shape on the wiring previously formed in the said resin film. The second insulating layer, which has four or more insulating layers and is formed as the second layer counted from at least one surface layer, is a through connection layer in which the electrical connection penetrating the insulating layer is a through bump. The second-layer wiring formed in the second layer counted from at least one surface layer and the third-layer wiring formed in the third layer counted from the surface layer are embedded in the through-connection layer. A multilayer printed wiring board characterized in that the through connection layer comprises a prepreg containing fibers and through bumps,
The first insulating layer and the third insulating layer formed in the first and third layers from the surface layer are both heat-resistant with a thickness of 60 μm or less having an interlayer connection portion formed by using a plating technique. Made of resin film,
The through bump is a multilayer printed wiring board made of a thermosetting conductive paste and formed in a convex shape on a wiring previously formed on the resin film. The first insulating layer as the first layer counted from the surface layer is a resin film, and a predetermined wiring is formed on the surface of the resin film without using an adhesive. A multilayer printed wiring board according to 1. A double-sided board creating step of creating a double-sided board to be a first insulating layer and a second insulating layer; a bump forming process of forming a through bump on the wiring of the double-sided board;
A laminating step of laminating the double-sided substrate on the back surface of an insulating layer made of a prepreg containing fibers;
A through-connection layer forming step of forming a through-connection layer by penetrating the insulating layer with the through-bump by press- bonding in an aligned state ;
A method of manufacturing a multilayer printed wiring board comprising at least a hot pressing step of curing the prepreg by hot pressing the laminate obtained in the laminating step and the through-connection layer forming step,
The first insulating layer and the third insulating layer formed in the first and third layers from the surface layer are both heat-resistant with a thickness of 60 μm or less having an interlayer connection portion formed by using a plating technique. Made of resin film,
The through bumps are made of a thermosetting conductive paste, and are formed in a convex shape on wiring previously formed on the resin film.

Images