JPH02109390A - High-density flexible printed circuit board - Google Patents
High-density flexible printed circuit boardInfo
- Publication number
- JPH02109390A JPH02109390A JP26058788A JP26058788A JPH02109390A JP H02109390 A JPH02109390 A JP H02109390A JP 26058788 A JP26058788 A JP 26058788A JP 26058788 A JP26058788 A JP 26058788A JP H02109390 A JPH02109390 A JP H02109390A
- Authority
- JP
- Japan
- Prior art keywords
- thickness
- conductor layer
- circuit pattern
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims abstract description 41
- 229920001721 polyimide Polymers 0.000 claims abstract description 6
- 239000004642 Polyimide Substances 0.000 claims abstract description 5
- 229920000728 polyester Polymers 0.000 claims abstract description 3
- 239000000758 substrate Substances 0.000 claims description 14
- 239000000853 adhesive Substances 0.000 claims description 5
- 230000001070 adhesive effect Effects 0.000 claims description 5
- 238000000034 method Methods 0.000 abstract description 15
- 238000007747 plating Methods 0.000 abstract description 14
- 238000013461 design Methods 0.000 abstract description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052802 copper Inorganic materials 0.000 abstract description 9
- 239000010949 copper Substances 0.000 abstract description 9
- 238000004544 sputter deposition Methods 0.000 abstract description 3
- 230000006866 deterioration Effects 0.000 abstract description 2
- 239000007767 bonding agent Substances 0.000 abstract 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000002542 deteriorative effect Effects 0.000 abstract 1
- 238000004904 shortening Methods 0.000 abstract 1
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 238000009832 plasma treatment Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000004696 Poly ether ether ketone Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229920002530 polyetherether ketone Polymers 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004734 Polyphenylene sulfide Substances 0.000 description 1
- 238000012356 Product development Methods 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 229920000069 polyphenylene sulfide Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 235000012976 tarts Nutrition 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、高密度微細配線を施す基板に適するフレキシ
ブルプリント回路基板に係り、さらに詳しくは、回路設
計の自由度を大幅に向上できろ高密度フレキシブルプリ
ント回路基板に関するものである。Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a flexible printed circuit board suitable for a board on which high-density fine wiring is applied, and more specifically, to a flexible printed circuit board that can greatly improve the degree of freedom in circuit design. The present invention relates to a density flexible printed circuit board.
（従来の技術）
近年、プリント回路基板上へのチップ部品やＬＳＩ、あ
るいはハイブリットｆｃなど電子部品の実装密度の向上
に伴い、セラミック基板、ガラスエポキシ基板、及びフ
レキシブル基板などの回路基板に対して−ｉ高密度化、
高寸法精度化の要求が高まっている。(Prior Art) In recent years, with the increase in the mounting density of electronic components such as chip components, LSIs, and hybrid FCs on printed circuit boards, there has been an increase in the density of circuit boards such as ceramic boards, glass epoxy boards, and flexible boards. i densification,
Demand for high dimensional accuracy is increasing.
そのため上記基板は、従来の単純な片面プリント基板の
構成から、両面構成及び一部多層プリント基板構成へと
展開されつつある。Therefore, the above-mentioned circuit boards are being developed from the conventional simple single-sided printed circuit board configuration to double-sided configurations and partially multilayer printed circuit board configurations.
ところで、現在の主流である片面、あるいは両面プリン
ト回路基板においても、表面実装技術（Ｓｕｒｆａｃｅ
Ｍｏｕｎｔ Ｔｅｃｈｎｏｌｏｇｙ）の発展により、
限りなく高密度微細化が要求され、基板上の配線もそれ
らの部品に追従すべく高密度微細パターンが要求されて
いるのが実情である。By the way, surface mounting technology (Surface
With the development of Mount Technology,
The reality is that there is a demand for infinitely high-density miniaturization, and that wiring on substrates is also required to have high-density, fine patterns to follow those parts.
一般に基板上では、Ｔｉ源回路などの大電流が流れる回
路パターンが必要である。そのため、回路設計者は通常
その許容電流を考慮して導体厚、導体幅を設定する。導
体厚が薄ければ必然的に導体輻を大きくせざろを掃ず、
上記の高密度化に反することになる。Generally, on a substrate, a circuit pattern such as a Ti source circuit through which a large current flows is required. Therefore, circuit designers usually set the conductor thickness and conductor width in consideration of the allowable current. If the conductor thickness is thin, the conductor radiation will inevitably increase and the grooves will not be swept.
This goes against the above-mentioned high density.
一般に回路基板には、導体厚が３５μｍ１もしくは１８
μｍ厚の銅張り基板が用いられている。Generally, circuit boards have a conductor thickness of 35 μm1 or 18 μm.
A μm thick copper-clad substrate is used.
（発明が解決しようとする課題）
かかる基板は、大電流を必要としない信号回路、例えば
数十μＡ程度の微少電流用回路であっても、上記３５μ
ｍもしくは１８μｍ厚の導体層上に回路形成しなくては
ならない。このような厚さの導体上に形成される回路パ
ターン幅は、常法で発生するサイドエッチなどを考慮す
ると、３〜５本／朧レベルのファイン度しか得られない
のが現状である。(Problems to be Solved by the Invention) Such a board can be used for signal circuits that do not require large currents, for example, circuits for microcurrents of about several tens of μA,
The circuit must be formed on a conductor layer with a thickness of m or 18 μm. Currently, the width of a circuit pattern formed on a conductor having such a thickness can only achieve a fineness of 3 to 5 lines/vague, taking into account side etching and the like that occur in conventional methods.
しかもこれらの銅張り基板は、接着剤を介してｆＪ箔を
張り合わせた構造であって耐熱性に劣り一また寸法安定
性にに欠けるなど、高密度フレキシブルプリント基板と
して実用に供し得ないのが実状である。Moreover, these copper-clad boards have a structure in which fJ foil is pasted with an adhesive, so they have poor heat resistance and lack dimensional stability, so they cannot be put to practical use as high-density flexible printed circuit boards. It is.
実際に、回路設計者はいわゆる極薄短小化のための鋭意
検討を重ねているが、定められた基板スペース中でチッ
プ部品やＬＳＩなどをどこにマウントするか、モして又
回路パターンをどのように、どの位の導体回路幅で引き
回せるかといった回路設計に多大な時間を費している。In fact, circuit designers are diligently studying how to make the so-called ultra-thin, short, and compact circuits, but they have to worry about where to mount chip components and LSIs within the specified board space, and how to shape the circuit pattern. In addition, a large amount of time is spent on circuit design, such as deciding how wide the conductor circuit can be routed.
例えば、極薄短小化の代表と言われろカメラを例にあげ
ると、該カメラに搭載されている３〜１０枚のフレキシ
ブルプリント回路基板の設計には約−カ月を要すると言
われ、そのため、新製品の開発プログラムはその設計作
業に律速されている。For example, if we take a camera, which is said to be a representative example of ultra-thin and shortened circuit boards, it is said that it takes about months to design the 3 to 10 flexible printed circuit boards installed in the camera. Product development programs are rate-limited by their design efforts.
ちなみに、一般のカメラ内のフレキシブルプリント回路
基板で大電流が必要とされるのは、ストロボ系、フィル
ム巻き取り系、赤外セン→を−などのごくわずかな回路
にしか過ぎず、残りの大部分の回路はほとんど微少電流
用の信号系の回路である。By the way, large currents are required on flexible printed circuit boards in general cameras only for a few circuits such as the strobe system, film winding system, and infrared sensor. Most of the circuits in this section are signal system circuits for minute currents.
（課題を解決するための手段）
本発明者はこのような状況に鑑み鋭意検討を重ねた結果
、この発明を完成するに到ったのである。(Means for Solving the Problems) In view of the above-mentioned circumstances, the inventors of the present invention have made extensive studies and have completed the present invention.
即ち本発明は、ポリイミド、ポリエステルなどのフィル
ム基板の片面もしくは両面上に、接着剤なとを介するこ
となく、直接導体層を形成してなるフレキシブルプリン
ト回路基板において、該回路基板の少なくとも一面の同
一面上に、５μｍ１ｇ。That is, the present invention provides a flexible printed circuit board in which a conductive layer is directly formed on one or both sides of a film substrate made of polyimide, polyester, etc., without using an adhesive, in which at least one side of the circuit board is identical. 5μm 1g on the surface.
以下の導体層及び１８μｍ厚以上の導体層が形成されて
おり、前記５μｍ厚以下の導体層部が、２００μ鳳ピツ
チ以下のファインパターンで形成されていることを特徴
とする高密度フレキシブルプリント回路基板である。A high-density flexible printed circuit board characterized in that the following conductor layers and a conductor layer with a thickness of 18 μm or more are formed, and the conductor layer portion with a thickness of 5 μm or less is formed in a fine pattern with a pitch of 200 μm or less. It is.
以下、図面を参照して本発明の実施態様を説明する。Embodiments of the present invention will be described below with reference to the drawings.
第１図及び第２図は、本発明の実施態様の高密度プリン
ト回路基板の構造を示すものであって、第１図は基板の
片面に、第２図はその両面にパターンを形成した例であ
る。1 and 2 show the structure of a high-density printed circuit board according to an embodiment of the present invention, in which FIG. 1 shows an example in which a pattern is formed on one side of the board, and FIG. 2 shows an example in which a pattern is formed on both sides. It is.
同図における基板１としては、一般にポリイミド（ＰＩ
）、ポリエチレンテレフタレー） （ＰＥＴ）、ポリ
フェニレンサルファイド（ｐｐｓ） 、ポリエーテルエ
ーテルケトン（ＰＥＥＫ）などのフィルムが用いられろ
。The substrate 1 in the figure is generally made of polyimide (PI).
), polyethylene terephthalate (PET), polyphenylene sulfide (pps), polyether ether ketone (PEEK), etc. may be used.
該基板１上に、極薄導体層２からなる微少電流しか流れ
ない信号系の微細回路パターン（微少電流回路パターン
）４と、厚膜導体層３からなる大電流を流しうろ電源系
などの大電流回路パターン５を形成する。On the substrate 1, there is a fine circuit pattern (minimum current circuit pattern) 4 for a signal system in which only a minute current flows, which is made up of an ultra-thin conductor layer 2, and a large circuit such as a power supply system, which is made up of a thick film conductor layer 3 and which allows a large current to flow. A current circuit pattern 5 is formed.
上述の如く接着剤を介することなく、直接上記導体２，
３、そして更に高密度回路４，５を形成する手段として
は下記に示すようないくつかの方法がある。As mentioned above, the conductor 2,
3, and there are several methods for forming the high-density circuits 4 and 5 as shown below.
まず第一の方法は、上記フィルム基板】の全面に無電解
メツキ法、物理蒸着（ＰＶＤ）法、あるいは導電性ペー
ストなどにより、極薄導体層２を所望の厚さ、−具体的
には５μｍ厚以下に付着形成させる。そして大電流が流
れる大電流回路パターン５以外の部分に、スクリーン印
刷法によりメツキレジストフート（写真現像型レジスト
）を施しマスキングする。次に、電解銅メツキ法により
残余の露出部１ζ１８μｍ厚以上に銅メツキし、大電流
回路パターン５を形成する。The first method is to apply an ultra-thin conductor layer 2 to a desired thickness, specifically 5 μm, on the entire surface of the above-mentioned film substrate by electroless plating, physical vapor deposition (PVD), or conductive paste. Adhesion is formed below the thickness. Then, a plating resist foot (photo-developing type resist) is applied by screen printing to mask the portions other than the large current circuit pattern 5 through which a large current flows. Next, the remaining exposed portion 1ζ is plated with copper to a thickness of 18 μm or more using an electrolytic copper plating method to form a large current circuit pattern 5.
その後、先にメツキレジストコートした部分を写真法で
回路化することにまり徹細回路パターン４を形成し、所
望の高密度プリント回路基板を得るのである。Thereafter, a detailed circuit pattern 4 is formed by photographically converting the portion previously coated with a plating resist into a circuit, thereby obtaining a desired high-density printed circuit board.
次の第２の方法は、先づフィルム基板１の全面に、無電
解メツキ法、物理蒸着（ＰＶＤ）法、あるいは導電性ペ
ーストなどにより、極薄導体層２を所望の厚さ、具体的
には５μｍ厚以下に付着形成させる。次にエツチングレ
ジストをコートし、常法により大電流回路パターン５及
び微細回路パターン４を写真法により形成する。The second method is to first apply an ultra-thin conductor layer 2 to a desired thickness on the entire surface of the film substrate 1 by electroless plating, physical vapor deposition (PVD), or conductive paste. is deposited to a thickness of 5 μm or less. Next, an etching resist is coated, and a large current circuit pattern 5 and a fine circuit pattern 4 are formed by a photographic method using a conventional method.
その後、大電流回路パターン５のみにリード端子を付け
、電解銅メツキ法により１８μｍｊＸ以上まで厚膜化し
、最終的に高密度プリント＠路基板を得るのである。Thereafter, lead terminals are attached only to the large current circuit pattern 5, and the film is thickened to 18 μm or more by electrolytic copper plating to finally obtain a high-density printed circuit board.
又第３の方法は、所謂アディティブ鋼メツキ法により、
先づ大電流回路パターン５及び微細回路パターン４を厚
さ約５μｍ以下に形成する。次に微細回路パターン４に
メツキレジストを施してマスキングし、再度銅メツキを
行う。そして、当該メツキ部に最終的に１８μｍ厚以上
の回路パターンを形成する。次に上記メツキレジストを
剥離することにより、所望の高密度プリント回路基板を
得るのである。The third method is the so-called additive steel plating method,
First, the large current circuit pattern 5 and the fine circuit pattern 4 are formed to have a thickness of about 5 μm or less. Next, a plating resist is applied to the fine circuit pattern 4 for masking, and copper plating is performed again. Then, a circuit pattern having a thickness of 18 μm or more is finally formed on the plating portion. Next, by peeling off the plating resist, a desired high-density printed circuit board is obtained.
これらの方法の中で、作業工程数、及び得られる回路パ
ターンの情度などの点で特に第１の方法が優れている。Among these methods, the first method is particularly superior in terms of the number of work steps and the quality of the circuit pattern obtained.
そして特に、フィルム基板１の全面に物理蒸着（ＰＶＤ
）法によす、極薄導体ｒｆ１２を形成する方法は、その
導体ＮＪ２の膜厚が均一化され、また、プラズマ処理あ
るいは異種金属（Ｃｒ、Ｔｉ、Ｐｄなど）によるアンダ
ーコートを行うことにより、密着性を向上できるなどの
利点があり好ましい。In particular, physical vapor deposition (PVD) is applied to the entire surface of the film substrate 1.
) method to form the ultra-thin conductor rf12, the film thickness of the conductor NJ2 is made uniform, and by performing plasma treatment or undercoating with a different metal (Cr, Ti, Pd, etc.), This is preferable since it has advantages such as improved adhesion.
上記極薄導体層２の厚さは、微細回路パターン４のファ
イン度（１０本／−あるいは２０本／ｌｌｌ１１など）
、及びその製法等に応じ５μｍ以下が望ましく、特に１
μｍ以上３μｍ以下が好ましい。この厚さが１μｍ以下
では、ピンホールの発生やその後の工程での導体層の目
減りの可能性が考えられるからである。The thickness of the ultra-thin conductor layer 2 is determined by the fineness of the fine circuit pattern 4 (10 lines/- or 20 lines/llll11, etc.)
, and its manufacturing method, preferably 5 μm or less, especially 1
The thickness is preferably from μm to 3 μm. This is because if the thickness is 1 μm or less, there is a possibility that pinholes will occur or the conductor layer will be thinned out in subsequent steps.
また、５μｍ以上の厚さでは、エツチング時の所謂サイ
ドエッチが顕著になり、パターンの微細化、具体的には
２００μｍピッチリ下の、（ターツ形成が困難になるた
めである。In addition, if the thickness is 5 μm or more, so-called side etching becomes noticeable during etching, making it difficult to miniaturize the pattern, specifically to form tarts with a pitch below 200 μm.
次に１８μｍ厚以上の導体層が必要なのは、上述の如く
電源用回路などの大電流を流し得るためであり、例丸ば
ＩＡの電流を流す際に３５μｍ導体）１、ｌｌｌｌ１幅
の回路パターンを設計しμＪろようにしたためである。Next, the reason why a conductor layer with a thickness of 18 μm or more is necessary is to allow a large current to flow in a power supply circuit as mentioned above. This is because it was designed to have a μJ filter.
（作 用）
本発明の高密度フレキシブル回路基板においては、基板
上に接着剤を介することなく回路バタンか形成されてい
ることがら耐熱性及び寸法安定性を低下させる原因が少
なくなっている。そして上記微細＠路パターンが、大電
流用回路パターンの部分に比べ極薄の導体層により形成
されていることから、その高密度化が容易になり、従っ
て該回路のマウント位置、結線等の設計の自由度を増し
、設計時間の短縮を可能とする。(Function) In the high-density flexible circuit board of the present invention, since the circuit tabs are formed on the board without using an adhesive, there are fewer causes of deterioration of heat resistance and dimensional stability. Since the above-mentioned fine @ circuit pattern is formed of an extremely thin conductor layer compared to the large current circuit pattern, it is easy to increase the density of the circuit, and therefore the design of the circuit mounting position, wiring, etc. This increases the degree of freedom in design and reduces design time.
（実 施 例） 以下実施例によりこの発明を具体的に説明する。(Example) The present invention will be specifically explained below with reference to Examples.
実施例１
ｆ８縁基板として、厚さ５０μｍのポリイミドフィルム
（東し・デュポン製、商品名： ＫＡ、ＰＴＯＮ）を
用い、前処理として酸素プラズマ処理を１０秒間施し、
その処理面に、スパッタリング法により銅を１μｍ付着
形成させ極薄導体層を形成した。Example 1 A polyimide film with a thickness of 50 μm (manufactured by Toshi DuPont, product name: KA, PTON) was used as the f8 edge substrate, and oxygen plasma treatment was performed for 10 seconds as a pretreatment.
On the treated surface, copper was deposited to a thickness of 1 μm by sputtering to form an ultra-thin conductor layer.
次に大電流回路パターン（導体幅０．５１Ｗｌ、２本）
以外の部分に、スクリーン印刷法によりメツキレジスト
（太陽インキ製、商品名： ＰＥＲ−１０）を膜厚
８μｍ塗布してマスキングした。そして露出部（大電流
回路パターン部）に電解銅メツキ法により３５μｍ厚の
導体回路パターンを形成し大電流回路パターンを形成し
た。Next, large current circuit pattern (conductor width 0.51Wl, 2 wires)
The other parts were masked by applying a 8-μm-thick film resist (manufactured by Taiyo Ink, trade name: PER-10) using a screen printing method. Then, a 35 μm thick conductive circuit pattern was formed on the exposed portion (high current circuit pattern portion) by electrolytic copper plating to form a high current circuit pattern.
次に、前記メツキレジストによるマスク部分に常法の写
真法により微細回路パターン（導体幅２５７１ｍ１を形
成し、最終的にカメラ用フレキシブルプリント回路基板
を作成した。Next, a fine circuit pattern (conductor width 2571 m1) was formed on the masked portion of the plating resist using a conventional photographic method, and finally a flexible printed circuit board for a camera was produced.
得られた基板の回路パターンを評価したところ、従来の
フレキシブルプリント回路基板（導体厚３５μｍ）を用
いて回路設計したものと比べ、面積比が６０％にも達し
て居り、更に設計に要する時間比は５０％と大幅に改良
されることが確認された。When the circuit pattern of the obtained board was evaluated, it was found that the area ratio reached 60% compared to a circuit designed using a conventional flexible printed circuit board (conductor thickness 35 μm), and the time required for design was also reduced. It was confirmed that the improvement was significantly improved by 50%.
実施例２
絶縁基板として、厚さ１．６ｍｍ＋のアルミナ基板（Ｔ
ＤＫ製）を用い、前処理としてアルゴンプラズマ処理を
３分間施し、その処理面に、スパッタリングにより、銅
を３μｍ付着形成させしめて極薄導体層を形成した。Example 2 An alumina substrate (T
(manufactured by DK), argon plasma treatment was performed for 3 minutes as a pretreatment, and copper was deposited to a thickness of 3 μm on the treated surface by sputtering to form an ultra-thin conductor layer.
次にエツチングレジストをコートし、大電流回路パター
ン（導体幅１ｍ、２本）、及び微細回路パターン（導体
幅２５μｍ）を写真法により形成した。Next, an etching resist was coated, and a large current circuit pattern (conductor width: 1 m, 2 lines) and a fine circuit pattern (conductor width: 25 μm) were formed using a photographic method.
次に、上記大電流回路パターン部にリード端子を取付け
、電８１廂メツキ法により３５μｍ厚の導体回路パター
ンを形成し、最終的に高密度プリント回路基板を作成し
た。Next, lead terminals were attached to the large current circuit pattern portion, and a conductor circuit pattern with a thickness of 35 μm was formed by the electric 81 plating method to finally produce a high-density printed circuit board.
１得られた基板の回路パターンのＮ１価を行ったところ
、実施例１と同様に優れたものであった。1 When the circuit pattern of the obtained substrate was subjected to N1 valence test, it was found to be excellent as in Example 1.
（発明の効果）
本発明の高密度フレキシブル回路基板によれば、基板上
に接着剤を介することなく回路パターンが形成されてい
ることから耐熱性及び寸法安定性が向上される。(Effects of the Invention) According to the high-density flexible circuit board of the present invention, heat resistance and dimensional stability are improved because a circuit pattern is formed on the board without using an adhesive.
そして上記微細回路パターンが、大電流用回路パターン
の部分に比べ極薄の導体層により形成されていることか
ら、その高密度化が著しく向上され、従って該回路のマ
ウント位置、結線等の設計の自由度も大幅に向上され設
計時間が短縮される等の効果があり、その工業的効果は
非常に大きい。Since the above-mentioned fine circuit pattern is formed of an extremely thin conductor layer compared to the large current circuit pattern, its density is significantly improved, and therefore the design of the circuit mounting position, wiring, etc. The degree of freedom is greatly improved and the design time is shortened, so the industrial effects are very large.
第１図、及び第２図は本発明の実施態様の高密度プリン
ト回路基板の断面図である。
１・・フィルム基板、２・・・極薄導体層、３・・厚膜
導体層、４ ・微細回路パターン、５・・・大電流回路
シよ二１1 and 2 are cross-sectional views of a high-density printed circuit board according to an embodiment of the present invention. 1. Film substrate, 2. Ultra-thin conductor layer, 3. Thick film conductor layer, 4. Fine circuit pattern, 5. Large current circuit.
Claims (1)
片面もしくは両面上に、接着剤などを介することなく、
直接導体層を形成してなるフレキシブルプリント回路基
板において、該回路基板の少なくとも一面の同一面上に
、５μｍ厚以下の導体層及び１８μｍ厚以上の導体層が
形成されており、前記５μｍ厚以下の導体層部が、２０
０μｍピッチ以下のファインパターンで形成されている
ことを特徴とする高密度フレキシブルプリント回路基板
。(1) On one or both sides of a film substrate made of polyimide, polyester, etc., without using an adhesive, etc.
In a flexible printed circuit board in which a conductor layer is directly formed, a conductor layer with a thickness of 5 μm or less and a conductor layer with a thickness of 18 μm or more are formed on at least one side of the circuit board, and the conductor layer with a thickness of 18 μm or more is formed on at least one side of the circuit board, and The conductor layer part is 20
A high-density flexible printed circuit board characterized by being formed with a fine pattern with a pitch of 0 μm or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26058788A JPH02109390A (en) | 1988-10-18 | 1988-10-18 | High-density flexible printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26058788A JPH02109390A (en) | 1988-10-18 | 1988-10-18 | High-density flexible printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02109390A true JPH02109390A (en) | 1990-04-23 |
Family
ID=17350017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26058788A Pending JPH02109390A (en) | 1988-10-18 | 1988-10-18 | High-density flexible printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02109390A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007115955A (en) * | 2005-10-21 | 2007-05-10 | Matsushita Electric Ind Co Ltd | Multilayer printed wiring board and its manufacturing method |
| JP2016092053A (en) * | 2014-10-30 | 2016-05-23 | 京セラサーキットソリューションズ株式会社 | Wiring board |
| WO2017212966A1 (en) * | 2016-06-09 | 2017-12-14 | 三菱電機株式会社 | Flexible printed board |
| JP2021111710A (en) * | 2020-01-10 | 2021-08-02 | 住友電気工業株式会社 | Flexible printed wiring board and manufacturing method thereof |
| WO2022138355A1 (en) * | 2020-12-24 | 2022-06-30 | 株式会社村田製作所 | Multilayer board and method for manufacturing multilayer board |
-
1988
- 1988-10-18 JP JP26058788A patent/JPH02109390A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007115955A (en) * | 2005-10-21 | 2007-05-10 | Matsushita Electric Ind Co Ltd | Multilayer printed wiring board and its manufacturing method |
| JP2016092053A (en) * | 2014-10-30 | 2016-05-23 | 京セラサーキットソリューションズ株式会社 | Wiring board |
| WO2017212966A1 (en) * | 2016-06-09 | 2017-12-14 | 三菱電機株式会社 | Flexible printed board |
| GB2565453A (en) * | 2016-06-09 | 2019-02-13 | Mitsubishi Electric Corp | Flexible printed board |
| JPWO2017212966A1 (en) * | 2016-06-09 | 2019-02-21 | 三菱電機株式会社 | Flexible printed circuit board |
| GB2565453B (en) * | 2016-06-09 | 2021-09-08 | Mitsubishi Electric Corp | Flexible printed circuit board |
| JP2021111710A (en) * | 2020-01-10 | 2021-08-02 | 住友電気工業株式会社 | Flexible printed wiring board and manufacturing method thereof |
| US11696401B2 (en) | 2020-01-10 | 2023-07-04 | Sumitomo Electric Industries, Ltd. | Flexible printed circuit board and method of manufacturing flexible printed circuit board |
| WO2022138355A1 (en) * | 2020-12-24 | 2022-06-30 | 株式会社村田製作所 | Multilayer board and method for manufacturing multilayer board |
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