JP3080508B2 - Multilayer wiring board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board and a method of manufacturing the same, and more particularly to a high-density wiring for mounting a large number of LSI chips such as a multi-chip module used in an exchange or an electronic computer. The present invention relates to a suitable multilayer wiring board and a method for manufacturing the same.

[0002]

2. Description of the Related Art The development of multi-chip module mounting technology for high-density mounting of a plurality of LSI bare chips and micro-circuit components has been developed in order to increase the processing capacity such as the capacity and speed of electronic computers and exchanges. ing. As a multilayer wiring board for mounting such a module, it is essential to use a multilayer wiring board having a small dielectric constant insulating layer and a low resistance wiring layer. A multilayer wiring board using copper as a wiring layer and a polyimide insulating layer as an interlayer insulating film is known to satisfy such conditions. In addition, this kind of multilayer wiring board is here called a copper-polyimide multilayer wiring board.

Hereinafter, a conventional substrate structure and a method for manufacturing the same, which are typified by the copper-polyimide multilayer wiring board, will be described with reference to FIG. 2A and 2B, as shown in FIG. 2A, a base conductor film 2 is formed on a ceramic substrate 1 by electroless copper plating or chromium / copper sputtering.

[0004] Next, as shown in FIG. 2 (b), after a resist pattern 5 is formed on a portion 2 b of the underlying conductor film 2 excluding the wiring formation region 2 a, copper is formed on the wiring formation region 2 a by electrolytic copper plating. A conductor layer 3 is formed, and a reaction prevention film 4 (copper-polyimide reaction prevention) is laminated thereon by electrolytic chromium plating to obtain a wiring layer.

Next, as shown in FIG. 2 (c), after removing the resist pattern 5 for forming an insulating layer, the unnecessary unnecessary underlying conductor film 2b is removed by etching, and the entire surface is covered so as to cover the wiring layer. A polyimide insulating layer 6 is formed.

Then, as shown in FIG. 2D, the wiring layers formed on the same substrate are connected with a low connection resistance,
First, a hole is made in the polyimide insulating layer 6 on the wiring layer, the exposed main part of the reaction preventing film 4 is removed by etching, and the oxide on the exposed surface layer of the conductor layer 3 is removed. After that, the underlying conductor film 7 of the second wiring layer is formed on the polyimide insulating layer 6 from the exposed connection portion.

Next, by repeating the steps of FIG. 2B to FIG. 2D, a three-layer wiring structure in which the polyimide insulating layer 6 shown in FIG. 2E is used as an interlayer insulating film and copper is used as a wiring layer. Is formed.

[0008] As a technique related to this kind of technology, for example, Nikkei Microdevice, February 1989,
Pages 50 to 60.

[0009]

However, according to the above prior art, there are the following problems. That is, the copper-polyimide reaction preventing film 4 is formed only on the surface of the copper conductor 3 and is not formed on the side surface thereof. Therefore, for example, when a polyimide containing a carboxyl group is used, since the carboxyl group is acetic acid, a copper-polyimide reaction occurs due to the acetic acid in a portion where the copper conductor 3 and the polyimide insulating layer 6 are in direct contact. I will. Therefore, contact between the side surface of the copper conductor 2 and the polyimide insulating layer 6 must be prevented.

Further, as shown in FIG. 2D, when forming the interconnection between the wiring layers, it is necessary to remove the reaction preventive film 4 by etching and remove the oxide film on the exposed copper conductor 3 surface layer. In addition, there is a problem that the overetching of the reaction preventing film 4 easily occurs.

On the other hand, in the wiring layer formed directly on the ceramic substrate, the irregularities on the surface of the ceramic substrate affect the irregularities on the surface of the copper conductor 3. Unevenness occurs in the film thickness, and a thin portion occurs, and the copper-polyimide easily reacts.

When the second wiring layer is formed on the polyimide insulating layer 6, the underlying conductor film 7 is formed. However, in the conventional electroless plating, the adhesion between the polyimide insulating layer 6 and the plated conductor 7 is reduced. For this purpose, a step of roughening the polyimide insulating surface is required, and the number of steps is increased.

Further, even when the chromium / copper base conductor film (2, 7) is formed by sputtering instead of plating, the number of steps such as etching increases, and an expensive sputtering apparatus is also required. Therefore, in order to obtain an inexpensive wiring board, a method of increasing the adhesion without increasing the number of steps is required.

Accordingly, an object of the present invention is to solve these conventional problems, and a first object of the present invention is to sequentially cover a reaction prevention film and an oxidation prevention film including the surface and side surfaces of a wiring layer. The second object is to realize a highly reliable multilayer wiring board by preventing a reaction between the wiring layer and the polyimide insulating layer by forming a two-layer structure. The second object is to realize a manufacturing method with a reduced number of steps. It is in.

[0015]

The first object of the present invention is to provide a method of forming a wiring layer formed on a ceramic substrate with a base conductor film interposed therebetween by coating a reaction preventing film and an oxidation preventing film on the surface and side surfaces thereof, This is achieved by a multilayer wiring board having an organic polymer insulating layer formed as an interlayer insulating film. As the organic polymer insulating layer, polyimide is optimal, but other known organic insulating materials such as photosensitive polyimide, polyimide silicon, ladder silicon (poly ladder organosiloxane), and polyamide are used. In the following description, polyimide will be described as a representative example.

Preferably, when a new wiring layer is repeatedly formed on an interlayer insulating film made of polyimide via a base conductor film, and a multilayer wiring layer such as a second wiring layer and a third wiring layer is laminated. Another object is to form an organic polymer insulating film containing insulating fine particles thinner than the fine particle diameter on the flattened interlayer insulating film, and fix the fine particles on the surface to make the insulating layer surface uneven. Due to the surface unevenness, the underlying conductor film provided when forming a new wiring layer is firmly connected to the interlayer insulating film, and the adhesiveness is remarkably improved. As an alternative technique to the surface unevenness, there is a method of polishing the surface of the insulating layer. However, it is more convenient and preferable to fix fine particles.

As the insulating fine particles, any insulating material may be used. However, it is preferable to use fine particles of a resin such as polyimide which forms an interlayer insulating film, and those having an average particle size of about 1 to 5 μm. used.

As the reaction preventing film, a plated conductor film which does not easily react with the interlayer insulating film such as polyimide is used. For example, electroless or electrolytic plating of nickel, chromium or the like having a thickness of about 1 to 5 μm is used. However, practically, electroless nickel plating is particularly preferable.

The antioxidant film may be any conductor that is resistant to oxidation, and is usually a gold thin film (for example, 0.5 μm or less). Electroless displacement plating is particularly preferred from the relationship with the manufacturing method described later (simplification of the process and improvement of reliability).

The second object is to form a first wiring conductor layer on a ceramic substrate by electrolytic plating via a base conductor film, and to form a reaction prevention film and an oxidation prevention film on the conductor layer. Laminating sequentially by plating, covering the entire surface of the first wiring conductor layer with these two-layer films, forming an organic polymer insulating layer as an interlayer insulating film on the entire surface, Forming an opening for forming a circuit in the interlayer insulating film on the wiring conductor layer, and forming a second wiring conductor layer on the interlayer insulating film including the opening for forming the circuit via a base conductive film; And a step of successively repeating the above-mentioned steps by the number of times corresponding to the number of laminated layers of the multilayer wiring.

Preferably, subsequently, after the step of forming the organic polymer insulating layer as the interlayer insulating film, an organic polymer insulating film containing insulating fine particles is formed thinner than the fine particle diameter, and the fine particles are formed on the surface. This is achieved by a method for manufacturing a multilayer wiring board, which includes a step of making the insulating layer surface uneven by fixing.

[0022]

The operation of the present invention will be described with reference to a copper-polyimide multilayer substrate as a typical example. A reaction preventing film and an oxidation preventing film are sequentially laminated on a copper wiring conductor layer by a plating method to form the first copper wiring conductor. The entire surface of the layer is covered with these two-layer films. First, the reaction prevention film is formed by a plating method.
Since the entire surface of the copper wiring conductor layer can be uniformly covered and the copper wiring conductor layer does not directly contact the polyimide,
The reaction between the two can be completely prevented.

Next, regarding the formation of an anti-oxidation film, this is also formed by a plating method. Therefore, according to a particularly preferred displacement plating method, even if the surface layer of the reaction-prevention film serving as a base is oxidized, the plating is not formed. Since the oxidation preventing film is sometimes plated while the surface layer of the reaction preventing film is dissolved, the oxide on the surface layer of the reaction preventing film is necessarily removed as the plating of the oxidation preventing film proceeds. Therefore, the surface layer of the reaction preventing film can be removed and cleaned without performing a special etching step.

Further, conventionally, at the time of forming a wiring interlayer connection portion,
Although the reaction prevention film etching and the copper conductor surface treatment process were required, neither is required in the present invention, and the shape of the wiring interlayer connection portion can be eliminated, and the process of forming the wiring interlayer connection portion can be simplified.

Further, by forming an organic polymer insulating film containing insulating fine particles thinner than the fine particle diameter on the wiring interlayer insulating layer and fixing the fine particles to the surface, the surface of the interlayer insulating layer can be easily made uneven. As a result, when the underlying conductor layer is formed by, for example, electroless plating at the time of forming the second wiring layer, the adhesion of the electroless plating to the wiring interlayer insulating layer can be further increased due to the surface irregularities. .

Further, by forming the wiring layer on the ceramic substrate by electrolytic plating, the unevenness on the surface of the ceramic substrate can be flattened, and the coverage of the reaction preventing film can be further improved. As a result, the copper-polyimide reaction can be effectively performed. Can be prevented.

[0027]

An embodiment of the present invention will be described below with reference to the drawings. <Embodiment 1> FIG. 1 is a process sectional view showing a structure and a manufacturing process of a multilayer wiring board according to an embodiment of the present invention. Here, in order to clarify the features of the present invention, FIGS. 3 and 4 showing a conventional example are used as auxiliary drawings as necessary.

According to the process shown in FIG. 1A, a two-layer film of a chromium layer having a thickness of 0.1 μm and a copper layer having a thickness of 0.1 μm is formed on the ceramic substrate 1 according to a known sputtering film forming method. Is formed.

Next, in the step shown in FIG. 1B, a resist pattern 5 is formed on the underlying conductor film 2 in the interlayer insulating film forming region 2b excluding the first wiring layer forming region 2a. . Subsequently, electrolytic copper plating that easily flattens the surface irregularities of the ceramic substrate 1 by the leveling effect at the time of plating is performed to form the copper conductor 3 having a flat surface and a film thickness of 5 μm.

On the other hand, in the prior art, as shown in FIG. 3A, chromium is used as the underlying conductor film 2 and copper is used as the wiring conductor layer 3 on the ceramic substrate 1 by sputtering. Chromium is sequentially formed as 4 and a resist pattern 5 is selectively formed thereon as a mask for forming a wiring layer. Next, as shown in FIG.
The circuit is formed by separating the wiring by etching the layer film. At this time, in the sputtering film forming method, the unevenness on the surface of the ceramic substrate 1 and the unevenness which cannot be covered by the underlying chromium 2 are formed on the surface of the copper conductor 3, This greatly affects the formation of the reaction prevention film 4, and a film formation defective portion (polyimide-copper contact portion) 11 is generated as shown in the figure. Therefore, FIG.
As shown in FIG. 5, when polyimide is formed as the interlayer insulating film 6, the reaction between the surface of the copper conductor 3 and the polyimide 6 can be avoided due to the presence of the film formation failure portion of the reaction prevention film 4 and the polyimide-copper contact portion 11. Absent.

Next, as shown in the step of FIG. 1C, the resist pattern 5 is removed, and the underlying conductor film (two layers of chromium / copper) exposed in the interlayer insulating film formation region 2b using the copper conductor 3 as a mask. The film 2 is removed by etching, and wiring is separated. Next, nickel is formed as a reaction preventing film 4 on the surface of the copper conductor 3 by electroless plating to a thickness of 2 μm, and the surface is completely covered with nickel plating. In this way, the reaction preventing film 4 can completely prevent the copper-polyimide reaction.

Next, as shown in the step of FIG. 1D, a 0.1 μm gold is formed on the reaction preventing film 4 as the antioxidizing film 8 by displacement plating. This step is particularly important in the present invention for simplifying the step as described in detail below.

In the conventional method, as shown in FIG.
When a hole for connecting an interlayer wiring is formed in the insulating layer 6, the surface of the reaction preventing film 4 and the surface of the copper conductor 3 are etched to remove an oxide film and the like. In the hole shape for interlayer connection such as over-etching of 4, it is easy to cause a defect. To improve this, FIG.
As shown in (e), after the etching of the reaction preventing film 4, the interlayer insulating film 6 made of polyimide is again wet or dry-etched to increase the opening diameter of the hole, thereby exposing the reaction preventing film 4 made of chromium. . However, this method has a problem that the surface of the copper conductor 3 is contaminated, the surface of the polyimide 6 is deteriorated, and the like, and the defect that the base conductor film 7 is easily peeled in the next second wiring layer forming step is apt to occur.

However, in this embodiment, in order to solve these problems, as shown in FIG.
By laminating the oxidation stop film 8 thereon by displacement plating, the surface treatment step which has been conventionally required was made unnecessary, and the defective shape of the interlayer connection hole was improved.

That is, according to the displacement plating of gold formed as the oxidation stop film 8 of the present embodiment, the reaction prevention film 4 serving as a base is formed.
As the surface portion of the metal layer is dissolved, gold plating is formed on the trace. Therefore, even if the surface portion of the reaction prevention film 4 is oxidized, the surface is substantially removed by the self-cleaning action at the time of gold plating. Is dissolved and removed.

Next, as shown in FIG. 1E, a polyimide layer is formed as an interlayer insulating layer 6 on the entire surface, covering the wiring layer.

Then, as shown in the step of FIG. 1 (f), after a predetermined portion of the polyimide layer necessary for circuit connection is etched to form an interlayer connection hole, the underlying conductor film shown in FIG. 1 (a) is formed. The underlying conductor film 7 made of a two-layer chromium / copper film is formed in the same step as the formation step of Step 2.

Finally, as shown in the step of FIG. 1 (g), the steps from FIG. 1 (b) to FIG. 1 (f) were repeated to manufacture a multilayer wiring board having three wiring layers.

<Embodiment 2> This embodiment is a modification of the step of FIG. 1F in the embodiment 1, that is, the step of forming the underlying conductor film 7 after the formation of the polyimide interlayer insulating film 6, FIG. 5 shows a cross-sectional view of the main part. When the formation of the base conductor film 7 by the sputter deposition method of FIG. 1F is performed by electroless plating, the number of steps of electroless plating with a sufficient adhesive force on the polyimide interlayer insulating film 6 is not increased. Must be formed in the process.

This embodiment realizes this, and FIG.
As shown in FIG. 7, a polyimide resin 12 containing polyimide particles 9 as insulating fine particles is formed on a polyimide interlayer insulating film 6.
Is applied to form a film having a thickness equal to or less than the particle diameter of the polyimide particles 9. The surface of the polyimide interlayer insulating film 6 is made uneven according to the surface shape of the fine particles fixed by the polyimide resin 12. Is formed.

The underlying conductor film 7 was formed by a single layer of electroless copper plating instead of the chromium / copper two-layer film by the sputtering method of Example 1. Chrome / copper 2 instead of copper plating single layer
Needless to say, a layer plating film may be used. Due to the formation of the concavities and convexities, the adhesion force of the plating base conductor film 7 to the polyimide interlayer insulating film 6 could be remarkably increased.

[0042]

As described in detail above, the present invention has achieved the intended purpose. That is, when a copper-polyimide multilayer substrate is described as a representative example, a copper layer constituting a wiring layer is covered with a copper-polyimide reaction preventing film and an oxidation preventing film formed by electroless plating.
Copper-polyimide reaction can be prevented irrespective of the pattern shape, and a copper-polyimide reaction prevention film etching step and a copper conductor surface treatment step are not required at the time of forming a wiring interlayer connection portion. Thereby, the defective shape of the wiring interlayer connection portion is eliminated, and the step of forming the wiring interlayer connection portion can be simplified.

Further, by forming the wiring layer on the ceramic substrate by electrolytic plating, the unevenness on the surface of the ceramic substrate can be flattened, the coverage of the reaction preventing film is improved, and as a result, the copper-polyimide reaction is completely prevented. be able to.

Further, when the underlying conductor film is formed on the polyimide interlayer insulating film by electroless plating, the surface is made uneven by fixing insulating fine particles on the polyimide interlayer insulating film in advance, whereby the electroless plating is performed. Can be increased, and a low-resistance, low-permittivity multilayer wiring board can be provided at low cost.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of a multilayer wiring board according to one embodiment (Example 1) of the present invention.

FIG. 2 is a sectional view showing an example of a manufacturing process of a conventional multilayer wiring board.

FIG. 3 is a sectional view showing a conventional manufacturing process.

FIG. 4 is a sectional view showing a conventional manufacturing process.

FIG. 5 is a cross-sectional manufacturing process diagram of a main part of a multilayer wiring board according to another embodiment (Example 2) of the present invention.

[Explanation of symbols]

1. Ceramic substrate 2. Base conductor 2a
... Wiring formation area of base conductor, 2b. Outside area of wiring formation of base conductor, 3 ... Wiring layer (copper conductor), 4: Reaction prevention film, 5: Resist pattern, 6: Wiring interlayer insulating film (polyimide), 7 ... Ground conductor,
8: antioxidant film, 9: insulating fine particles,
10 lower chromium film, 11 polyimide-copper contact,
12. Polyimide resin containing fine particles.

──────────────────────────────────────────────────の Continued on the front page (72) Inventor Satoru Hashimoto 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Within the Information and Communication Business Division, Hitachi, Ltd. (72) Inventor Mamoru Morita 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock (56) References JP-A-3-60192 (JP, A) JP-A-2-188992 (JP, A) JP-A-48-70061 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H05K 3/46 H05K 3/38

Claims (2)

(57) [Claims] A first wiring conductor layer formed on a ceramic substrate with a first base conductor film interposed therebetween, a surface and side surfaces of the first wiring conductor layer being coated with a two-layer film of a reaction prevention film and an oxidation prevention film; Forming an organic polymer insulating layer as an interlayer insulating film;
A second wiring conductor layer is laminated thereon with a second base conductor film interposed therebetween.
In the multi-layer wiring board thus manufactured, the insulating
Organic polymer insulating film containing edge fine particles is thinner than the fine particle diameter
Formed and fixed by fine particles on the surface
Under the plating to become the second underlying conductor film
Laminating the second wiring conductor layer via a ground conductor film
A multilayer wiring board characterized by the above-mentioned . 2. A step of forming a first wiring conductor layer on a ceramic substrate by electrolytic plating via a first base conductor film; and forming a reaction preventing film and an oxidation preventing film on the first wiring conductor layer. Are sequentially laminated by a plating method, and the entire surface of the first wiring conductor layer is covered with these two-layer films;
Forming an organic polymer insulating layer as an interlayer insulating film on the entire surface, forming a circuit forming opening in the interlayer insulating film on the first wiring conductor layer, and forming the circuit forming opening Forming a second wiring conductor layer on the interlayer insulating film including the second wiring conductor layer via a second base conductor film by a plating method , and continuously performing the above-described steps by the number of times corresponding to the number of stacked multilayer wirings. A method of manufacturing a multilayer wiring board comprising the steps of :
Subsequent to the step of forming the insulating layer,
Organic polymer insulating film containing particles thinner than the particle diameter
To fix the surface of the insulating layer by fixing the fine particles on the surface.
A method for manufacturing a multilayer wiring board, characterized by adding a step of making unevenness .