JPH08250857A - Manufacture of multilayer interconnection board - Google Patents

Abstract

PURPOSE: To reduce the uneven surface of a multilayer interconnection board by forming an insulating film made of organic polymer material having a thickness substantially equal to that of the interconnection except the interconnection part on the board. CONSTITUTION: An insulating film 2 20μm thick after curing is formed on a board 1; the surface is treated, activated by a catalyst; and an electroless plated copper film is formed on the front surface of the film 2 as a substrate conductor film 3a. Thereafter, a positive photoresist layer is formed on the film 3a, the first layer interconnection pattern is exposed with a photomask, developed to obtain the first layer interconnection pattern, and then a conductor 4a is formed on the exposed substrate film 3a. Thereafter, the part of the film 3a in which the conductor 4a of the photoresist layer is not formed is removed to obtain a first layer interconnection. Then, a flattened insulating film 10a made of an organic polymer material having the thickness substantially equal to that of the interconnection is formed except the interconnection on the board formed with the first layer interconnection.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer wiring board used as a mounting board for electronic parts such as LSI.

[0002]

2. Description of the Related Art Recently, there is an increasing demand for higher density and higher speed in a circuit board on which electronic parts such as LSI are mounted. In order to achieve this, a circuit wiring is formed using photolithography technology, a low dielectric constant organic polymer material is used for the interlayer insulating film, and a method of forming a multilayer wiring is used to connect the layers by via holes. Has been done. For forming the via hole, a method of dry and wet etching the interlayer insulating film, and a method of exposing and developing the photosensitive interlayer insulating film are adopted. inside that,
In particular, when a fine wiring is to be formed, a positive photoresist is often used for forming the wiring.

A method of manufacturing a multilayer wiring board in which a photosensitive organic polymer material is used as an interlayer insulating film and wiring is formed by a semi-additive method using a positive photoresist will be described below with reference to the drawings. FIG. 3 is a cross-sectional view showing the manufacturing process of the multilayer wiring board.

First, as shown in FIG. 3A, a first layer wiring is formed on a substrate. That is, the first base conductor film 3a is formed on the entire surface of the insulating film 2 made of an organic polymer material on the substrate 1.
Is formed and a positive type photoresist layer is formed thereon, and then the first layer wiring pattern is exposed using a positive type photomask for the first layer. After that, develop it 1
After obtaining the wiring pattern of the second layer, the exposed underlying conductor film 3a
An electrolytic plating film is deposited on the above to form the first-layer conductor 4a (semi-additive method). Thereafter, the photoresist layer and the portion of the underlying conductor film 3a where the conductor 4a is not formed are removed to obtain the first-layer wiring shown in FIG.

Next, as shown in FIG. 3B, an interlayer insulating film made of an organic polymer material is formed on the substrate on which the first layer wiring is formed, and a via hole is formed in this interlayer insulating film. To do. That is, an interlayer insulating film 5 made of a negative photosensitive organic polymer material is formed on the entire surface of the substrate on which the wiring of the first layer is formed, and then a via hole pattern is exposed using a negative photomask. . After that, this is developed, and FIG.
The via hole 6 shown in (b) is formed.

After that, as shown in FIG. 3C, a base conductor film 3b is formed on the interlayer insulating film 5 and the via holes 6, and then a positive type photoresist layer 7 is formed.

Next, as shown in FIG. 3D, a second layer wiring pattern is formed. That is, a positive type photomask is used to expose the positive type photoresist layer 7 with the second wiring pattern. Further, the via hole 6 of the positive photoresist layer 7 is further exposed using a positive photomask for multiple exposure. Then, this is developed to obtain the second layer wiring pattern shown in FIG.

Next, as shown in FIG. 3 (e), an electrolytic plating film is deposited on the exposed second underlying conductor film 3b to form a second conductor 4b. Then, the photoresist 7 and the portion of the underlying conductor film 3b where the conductor 4b is not formed are removed to obtain the two-layer wiring board shown in FIG. 3 (f). When the number of layers is further increased, the same operation is repeated thereafter.

[0009]

In the conventional method of manufacturing a multilayer wiring board, when forming the wirings of the second and subsequent layers, the interlayer insulating film on the wirings of the first layer rises by the thickness of the wirings. Will end up. After that, when stacking is repeated, the effect of this undulation is succeeded and the smoothness of the substrate surface is further lost. For this reason, there is a problem that a yield such as a decrease in dimensional accuracy occurs in the photolithography process and a yield is reduced.

In order to speed up the operation of the multilayer wiring board on which electronic parts are mounted, it is effective to increase the wiring thickness of the multilayer wiring board. Since the smoothness of the surface is lost and the yield is reduced, there is a limit to increase the thickness.

Therefore, an object of the present invention is to provide a method for manufacturing a multilayer wiring board in which the unevenness on the surface of the wiring board is reduced.

[0012]

In order to achieve the above object, the method for manufacturing a multilayer wiring board of the present invention comprises the following steps. (A) a step of forming an insulating film made of an organic polymer material on a substrate and then forming a first-layer wiring on the insulating film,
(B) A step of forming an insulating film for planarization made of an organic polymer material having a thickness substantially equal to that of the wiring other than the wiring portion of the first layer on the substrate, (c) the wiring and the insulating film of the first layer A step of forming an interlayer insulating film made of an organic polymer material on the substrate having formed thereon, and forming a via hole in the interlayer insulating film,
(D) a step of forming a photoresist layer after forming a base conductor film on the interlayer insulating film and the via hole portion,
(E) exposing the photoresist layer using a photomask,
Developing to form a wiring pattern, (f) forming a conductor on the wiring pattern to form a second-layer wiring,
(G) A step of removing the photoresist and the underlying conductor film on which no conductor is formed.

The via hole is formed by exposing and developing an interlayer insulating film made of a photosensitive organic polymer material, or by dry or wet etching the interlayer insulating film made of an organic polymer material. It is characterized by being formed.

The wiring is characterized by being formed by the semi-additive method or the full-additive method.

Further, the interlayer insulating film is characterized by being a photosensitive polyimide.

[0016]

According to the method of manufacturing a multilayer wiring board of the present invention, an insulating film made of an organic polymer material having a thickness substantially equal to that of the wiring is formed in addition to the wiring portion on the board. Therefore, unlike the prior art, the interlayer insulating film on the wiring does not rise by the thickness of the wiring, and the unevenness on the surface of the multilayer wiring board is reduced.

[0017]

【Example】

(Example) An example of a method for manufacturing a multilayer wiring board according to the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view showing a manufacturing process of a multilayer wiring board of the present invention. In the figure,
10a is a flattening insulating film made of an organic polymer material having a thickness substantially equal to that of the wiring other than the wiring portion on the substrate. Since other parts are the same as those in FIG. 3, the same reference numerals are given and description thereof is omitted.

First, as shown in FIG. 1A, a first layer wiring was formed on a substrate. That is, on the alumina substrate 1 having a purity of 99.5%, an insulating film 2 made of photosensitive polyimide (for example, Photo Nice manufactured by Toray Industries, Inc .: a trade name) and having a film thickness after curing of 20 μm was formed. After that, an electroless copper plating film having a film thickness of 500 Å was formed as a base conductor film 3a using a copper sulfate plating solution on the entire surface of the insulating film 2 surface-treated with hydrazine and catalytically activated with palladium. Then, a positive photoresist layer (for example, AZ462 manufactured by Hoechst Co., Ltd.) is formed on the underlying conductor film 3a.
0: trade name) was formed, and then the first layer wiring pattern was exposed using a positive type photomask for the first layer. next,
After developing this to obtain a wiring pattern of the first layer, electrolytic copper plating using a copper sulfate plating solution is performed to deposit an electrolytic copper plating film having a thickness of about 5 μm on the exposed underlying conductor film 3a. The conductor 4a was formed. Then, the photoresist layer and the portion of the underlying conductor film 3a where the conductor 4a was not formed were removed to obtain the first-layer wiring shown in FIG.

Next, as shown in FIG. 1B, in addition to the wiring portion on the substrate on which the first-layer wiring is formed, a flattening insulating film made of an organic polymer material having a thickness almost equal to this wiring is formed. Was formed. That is, an insulating film made of polyimide, which is a negative-type photosensitive organic polymer material, having a film thickness of 5 μm is formed on the entire surface of the substrate on which the wiring of the first layer is formed, and then one layer is formed using a negative-type photomask. The parts other than the wiring part of the eyes were exposed. Then, this was developed to form a planarization insulating film 10a shown in FIG.

Thereafter, as shown in FIG. 1C, an interlayer insulating film made of an organic polymer material is formed on the substrate on which the first-layer wiring and the planarizing insulating film are formed, and the interlayer insulating film is formed. A via hole was formed in the. That is, the film thickness of 2
After forming an insulating film 5 made of polyimide, which is a negative-type photosensitive organic polymer material having a thickness of 0 μm, a via-hole pattern was exposed using a negative-type photomask. Then, this is developed and the via hole 6 shown in FIG.
Was formed.

Thereafter, as shown in FIG. 1D, after forming a base conductor film 3b on the interlayer insulating film 5 and the via hole 6, a positive type photoresist layer 7 (for example, a photoresist film 7b) is formed thereon.
Hoechst AZ4620: trade name) was formed.

After that, as shown in FIG. 1E, a second layer wiring pattern was formed. That is, a positive type photomask was used to expose the positive type photoresist layer 7 with the second wiring pattern. Further, the via hole 6 portion of the positive photoresist layer 7 was exposed using a positive photomask for multiple exposure. Then, this was developed to obtain a second layer wiring pattern shown in FIG.

Next, as shown in FIG. 3 (f), electrolytic copper plating using a copper sulfate plating solution deposits an electrolytic copper plating film having a thickness of about 5 μm on the exposed second underlying conductor film 3b. Then, the second-layer conductor 4b was formed. Then, the photoresist 7 and the portion of the underlying conductor film 3b where the conductor 4b was not formed were removed to obtain a two-layer wiring board shown in FIG. 3 (f).

Further, the same operation was repeated to obtain a three-layer wiring board. A cross-sectional view of the obtained wiring board is shown in FIG.
In the figure, 4c is a wiring of the third layer, 15 is an interlayer insulating film between the wirings of the second and third layers, and 10b is an organic polymer material having substantially the same thickness as the wiring of the second layer. The underlying conductor film is omitted. The other parts are the same as those in FIG.

(Comparative Example) For comparison, a conventional three-layer wiring board was obtained by the conventional method. It will be described with reference to FIG. 3 which is a sectional view showing a conventional manufacturing process of a multilayer wiring board.

That is, first, as shown in FIG. 3A, the first-layer wiring was formed on the substrate in the same manner as in the example.

Next, as shown in FIG. 3B, the organic polymer material is formed on the substrate on which the first-layer wiring is formed in the same manner as in the example except that the flattening insulating film is not formed. The inter-layer insulating film 5 made of is formed, and the via hole 6 is formed in the inter-layer insulating film 5.

After that, as shown in FIG. 3C, after forming the underlying conductor film 3b in the interlayer insulating film 5 and the via hole 6 in the same manner as in the embodiment, the positive photoresist layer 7 (for example, Hoechst AZ4620: trade name) was formed.

After that, as shown in FIG. 3D, a second-layer wiring pattern was formed in the same manner as in the example.

Next, as shown in FIG. 3E, a second-layer conductor 4b was formed on the exposed second-layer underlying conductor film 3b in the same manner as in the example. After that, photoresist 7,
Then, a portion of the underlying conductor film 3b where the conductor 4b was not formed was removed to obtain a two-layer wiring board shown in FIG. 3 (f).

Further, the same operation was repeated to obtain a three-layer wiring board. A cross-sectional view of the obtained wiring board is shown in FIG.
In the figure, 4c is a third layer wiring, 15 is an interlayer insulating film between the second and third wirings, and the underlying conductor film is omitted. The other parts are the same as those in FIG. 3 and are therefore assigned the same reference numerals.

The surface roughness of each of the multilayer wiring boards of Examples and Conventional Examples obtained above was measured with a surface roughness meter. As a result, the height difference (r) between the highest part and the lowest part of the substrate surface is 25 μm in the case of the conventional example, and 20 μm in the case of the example, and it is possible to reduce the unevenness on the surface of the multilayer wiring board. did it.

Although an alumina substrate having a purity of 99.5% is used as the substrate in the above embodiment, the substrate is not limited to this and various materials can be used as long as smoothness can be obtained. Can be used.

Although an electroless copper plating film is used as the underlying conductor film formed on the organic polymer layer, the present invention is not limited to this, and a metal thin film formed by sputtering or vapor deposition can be selected. Various materials that can be peeled off can be used.

As the interlayer insulating film, polyimide, which is a photosensitive organic polymer material, is used and exposed and developed to form a via hole. However, an organic polymer material having no photosensitivity is used. Alternatively, the via hole can be formed by forming a via hole pattern with a photoresist and dry or wet etching.

Although the semi-additive method of forming electroplated wiring on electroless plating is used as the wiring forming method, it is also possible to use the additive method of wiring by electroless plating. That is, after conducting a catalyst activation treatment on the surface of the organic polymer layer, the electroless plated film may be grown to a desired film thickness to form a conductor.

Further, although the polyimide film thickness is 20 μm in this embodiment, the effect of the present manufacturing method can be expected in the range of 5 to 100 μm.

[0038]

As is apparent from the above description, according to the method for manufacturing a multilayer wiring board of the present invention, an insulating film made of an organic polymer material having a thickness substantially equal to that of the wiring is provided in addition to the wiring portion on the board. Therefore, unlike the conventional case, the interlayer insulating film on the wiring does not rise by the thickness of the wiring, and the unevenness on the surface of the multilayer wiring board can be reduced.

Therefore, in the manufacture of the multilayer wiring board, it is possible to prevent a defect such as deterioration of dimensional accuracy in the photolithography process and improve the yield.

Further, it is possible to increase the speed of the operation when electronic components are mounted by increasing the thickness of the wiring of the multilayer wiring board, which has been difficult in the past due to the reduced yield.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a multilayer wiring board according to the present invention.

FIG. 2 is a cross-sectional view of a multilayer wiring board obtained by the manufacturing method of the present invention.

FIG. 3 is a cross-sectional view showing a manufacturing process of a conventional multilayer wiring board.

FIG. 4 is a cross-sectional view of a multilayer wiring board obtained by a conventional manufacturing method.

[Explanation of symbols]

 1 substrate 2 insulating film 3a, 3b base conductor film 4a, 4b, 4c conductor 5,15 interlayer insulating film 6 via hole 7 photoresist layer 10a, 10b planarizing insulating film

Claims (6)

[Claims] 1. A method for manufacturing a multilayer wiring board, which comprises the following steps. (A) a step of forming an insulating film made of an organic polymer material on the substrate and then forming a first layer wiring on the insulating film; (b) a step other than the first layer wiring portion on the substrate, A step of forming a planarization insulating film made of an organic polymer material having a thickness almost equal to that of the wiring, (c) made of an organic polymer material on the substrate on which the first layer wiring and the planarization insulating film are formed Forming an interlayer insulating film,
A step of forming a via hole in the interlayer insulating film, (d) a step of forming a photoresist layer after forming a base conductor film in the interlayer insulating film and the via hole portion, (e) a photoresist layer using a photomask Exposure,
Step of developing to form a wiring pattern, (f) Step of forming a conductor on the wiring pattern to form a second layer wiring, (g) Removing the photoresist and the underlying conductor film on which the conductor is not formed Process. 2. The method for producing a multilayer wiring board according to claim 1, wherein an interlayer insulating film made of a photosensitive organic polymer material is exposed and developed to form a via hole. 3. The method of manufacturing a multilayer wiring board according to claim 1, wherein an interlayer insulating film made of an organic polymer material is dry or wet etched to form a via hole. 4. The method for manufacturing a multilayer wiring board according to claim 1, wherein the wiring is formed by a semi-additive method. 5. The method for manufacturing a multilayer wiring board according to claim 1, wherein the wiring is formed by a full additive method. 6. The method for manufacturing a multilayer wiring board according to claim 1, wherein the interlayer insulating film is photosensitive polyimide.